RegisterInfoEmitter.cpp revision 47622e37215429c20d8278ff57496d840811cc13 
1//===- RegisterInfoEmitter.cpp - Generate a Register File Desc. -*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This tablegen backend is responsible for emitting a description of a target
11// register file for a code generator.  It uses instances of the Register,
12// RegisterAliases, and RegisterClass classes to gather this information.
13//
14//===----------------------------------------------------------------------===//
15
16#include "RegisterInfoEmitter.h"
17#include "CodeGenTarget.h"
18#include "CodeGenRegisters.h"
19#include "Record.h"
20#include "llvm/ADT/StringExtras.h"
21#include "llvm/ADT/STLExtras.h"
22#include <set>
23using namespace llvm;
24
25// runEnums - Print out enum values for all of the registers.
26void RegisterInfoEmitter::runEnums(std::ostream &OS) {
27  CodeGenTarget Target;
28  const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
29
30  std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace");
31
32  EmitSourceFileHeader("Target Register Enum Values", OS);
33  OS << "namespace llvm {\n\n";
34
35  if (!Namespace.empty())
36    OS << "namespace " << Namespace << " {\n";
37  OS << "  enum {\n    NoRegister,\n";
38
39  for (unsigned i = 0, e = Registers.size(); i != e; ++i)
40    OS << "    " << Registers[i].getName() << ", \t// " << i+1 << "\n";
41
42  OS << "  };\n";
43  if (!Namespace.empty())
44    OS << "}\n";
45  OS << "} // End llvm namespace \n";
46}
47
48void RegisterInfoEmitter::runHeader(std::ostream &OS) {
49  EmitSourceFileHeader("Register Information Header Fragment", OS);
50  CodeGenTarget Target;
51  const std::string &TargetName = Target.getName();
52  std::string ClassName = TargetName + "GenRegisterInfo";
53
54  OS << "#include \"llvm/Target/MRegisterInfo.h\"\n";
55  OS << "#include <string>\n\n";
56
57  OS << "namespace llvm {\n\n";
58
59  OS << "struct " << ClassName << " : public MRegisterInfo {\n"
60     << "  " << ClassName
61     << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
62     << "  const unsigned* getCalleeSaveRegs() const;\n"
63     << "  const TargetRegisterClass* const *getCalleeSaveRegClasses() const;\n"
64     << "  int getDwarfRegNum(unsigned RegNum) const;\n"
65     << "};\n\n";
66
67  const std::vector<CodeGenRegisterClass> &RegisterClasses =
68    Target.getRegisterClasses();
69
70  if (!RegisterClasses.empty()) {
71    OS << "namespace " << RegisterClasses[0].Namespace
72       << " { // Register classes\n";
73    for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
74      const std::string &Name = RegisterClasses[i].getName();
75
76      // Output the register class definition.
77      OS << "  struct " << Name << "Class : public TargetRegisterClass {\n"
78         << "    " << Name << "Class();\n"
79         << RegisterClasses[i].MethodProtos << "  };\n";
80
81      // Output the extern for the instance.
82      OS << "  extern " << Name << "Class\t" << Name << "RegClass;\n";
83      // Output the extern for the pointer to the instance (should remove).
84      OS << "  static TargetRegisterClass * const "<< Name <<"RegisterClass = &"
85         << Name << "RegClass;\n";
86    }
87    OS << "} // end of namespace " << TargetName << "\n\n";
88  }
89  OS << "} // End llvm namespace \n";
90}
91
92// RegisterInfoEmitter::run - Main register file description emitter.
93//
94void RegisterInfoEmitter::run(std::ostream &OS) {
95  CodeGenTarget Target;
96  EmitSourceFileHeader("Register Information Source Fragment", OS);
97
98  OS << "namespace llvm {\n\n";
99
100  // Start out by emitting each of the register classes... to do this, we build
101  // a set of registers which belong to a register class, this is to ensure that
102  // each register is only in a single register class.
103  //
104  const std::vector<CodeGenRegisterClass> &RegisterClasses =
105    Target.getRegisterClasses();
106
107  // Loop over all of the register classes... emitting each one.
108  OS << "namespace {     // Register classes...\n";
109
110  // RegClassesBelongedTo - Keep track of which register classes each reg
111  // belongs to.
112  std::multimap<Record*, const CodeGenRegisterClass*> RegClassesBelongedTo;
113
114  // Emit the register enum value arrays for each RegisterClass
115  for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
116    const CodeGenRegisterClass &RC = RegisterClasses[rc];
117
118    // Give the register class a legal C name if it's anonymous.
119    std::string Name = RC.TheDef->getName();
120
121    // Emit the register list now.
122    OS << "  // " << Name << " Register Class...\n  const unsigned " << Name
123       << "[] = {\n    ";
124    for (unsigned i = 0, e = RC.Elements.size(); i != e; ++i) {
125      Record *Reg = RC.Elements[i];
126      OS << getQualifiedName(Reg) << ", ";
127
128      // Keep track of which regclasses this register is in.
129      RegClassesBelongedTo.insert(std::make_pair(Reg, &RC));
130    }
131    OS << "\n  };\n\n";
132  }
133
134  // Emit the ValueType arrays for each RegisterClass
135  for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {
136    const CodeGenRegisterClass &RC = RegisterClasses[rc];
137
138    // Give the register class a legal C name if it's anonymous.
139    std::string Name = RC.TheDef->getName() + "VTs";
140
141    // Emit the register list now.
142    OS << "  // " << Name
143      << " Register Class Value Types...\n  const MVT::ValueType " << Name
144      << "[] = {\n    ";
145    for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i)
146      OS << "MVT::" << RC.VTs[i] << ", ";
147    OS << "MVT::Other\n  };\n\n";
148  }
149  OS << "}  // end anonymous namespace\n\n";
150
151  // Now that all of the structs have been emitted, emit the instances.
152  if (!RegisterClasses.empty()) {
153    OS << "namespace " << RegisterClasses[0].Namespace
154       << " {   // Register class instances\n";
155    for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
156      OS << "  " << RegisterClasses[i].getName()  << "Class\t"
157         << RegisterClasses[i].getName() << "RegClass;\n";
158
159    for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) {
160      const CodeGenRegisterClass &RC = RegisterClasses[i];
161      OS << RC.MethodBodies << "\n";
162      OS << RC.getName() << "Class::" << RC.getName()
163         << "Class()  : TargetRegisterClass(" << RC.getName() + "VTs" << ", "
164         << RC.SpillSize/8 << ", "
165         << RC.SpillAlignment/8 << ", " << RC.getName() << ", "
166         << RC.getName() << " + " << RC.Elements.size() << ") {}\n";
167    }
168
169    OS << "}\n";
170  }
171
172  OS << "\nnamespace {\n";
173  OS << "  const TargetRegisterClass* const RegisterClasses[] = {\n";
174  for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i)
175    OS << "    &" << getQualifiedName(RegisterClasses[i].TheDef)
176       << "RegClass,\n";
177  OS << "  };\n";
178
179  // Emit register class aliases...
180  std::map<Record*, std::set<Record*> > RegisterAliases;
181  const std::vector<CodeGenRegister> &Regs = Target.getRegisters();
182
183  for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
184    Record *R = Regs[i].TheDef;
185    std::vector<Record*> LI = Regs[i].TheDef->getValueAsListOfDefs("Aliases");
186    // Add information that R aliases all of the elements in the list... and
187    // that everything in the list aliases R.
188    for (unsigned j = 0, e = LI.size(); j != e; ++j) {
189      Record *Reg = LI[j];
190      if (RegisterAliases[R].count(Reg))
191        std::cerr << "Warning: register alias between " << getQualifiedName(R)
192                  << " and " << getQualifiedName(Reg)
193                  << " specified multiple times!\n";
194      RegisterAliases[R].insert(Reg);
195
196      if (RegisterAliases[Reg].count(R))
197        std::cerr << "Warning: register alias between " << getQualifiedName(R)
198                  << " and " << getQualifiedName(Reg)
199                  << " specified multiple times!\n";
200      RegisterAliases[Reg].insert(R);
201    }
202  }
203
204  if (!RegisterAliases.empty())
205    OS << "\n\n  // Register Alias Sets...\n";
206
207  // Emit the empty alias list
208  OS << "  const unsigned Empty_AliasSet[] = { 0 };\n";
209  // Loop over all of the registers which have aliases, emitting the alias list
210  // to memory.
211  for (std::map<Record*, std::set<Record*> >::iterator
212         I = RegisterAliases.begin(), E = RegisterAliases.end(); I != E; ++I) {
213    OS << "  const unsigned " << I->first->getName() << "_AliasSet[] = { ";
214    for (std::set<Record*>::iterator ASI = I->second.begin(),
215           E = I->second.end(); ASI != E; ++ASI)
216      OS << getQualifiedName(*ASI) << ", ";
217    OS << "0 };\n";
218  }
219
220  OS<<"\n  const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
221  OS << "    { \"NOREG\",\t0 },\n";
222
223
224  // Now that register alias sets have been emitted, emit the register
225  // descriptors now.
226  const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
227  for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
228    const CodeGenRegister &Reg = Registers[i];
229    OS << "    { \"";
230    if (!Reg.TheDef->getValueAsString("Name").empty())
231      OS << Reg.TheDef->getValueAsString("Name");
232    else
233      OS << Reg.getName();
234    OS << "\",\t";
235    if (RegisterAliases.count(Reg.TheDef))
236      OS << Reg.getName() << "_AliasSet },\n";
237    else
238      OS << "Empty_AliasSet },\n";
239  }
240  OS << "  };\n";      // End of register descriptors...
241  OS << "}\n\n";       // End of anonymous namespace...
242
243  std::string ClassName = Target.getName() + "GenRegisterInfo";
244
245  // Emit the constructor of the class...
246  OS << ClassName << "::" << ClassName
247     << "(int CallFrameSetupOpcode, int CallFrameDestroyOpcode)\n"
248     << "  : MRegisterInfo(RegisterDescriptors, " << Registers.size()+1
249     << ", RegisterClasses, RegisterClasses+" << RegisterClasses.size() <<",\n "
250     << "                 CallFrameSetupOpcode, CallFrameDestroyOpcode) {}\n\n";
251
252  // Emit the getCalleeSaveRegs method.
253  OS << "const unsigned* " << ClassName << "::getCalleeSaveRegs() const {\n"
254     << "  static const unsigned CalleeSaveRegs[] = {\n    ";
255
256  const std::vector<Record*> &CSR = Target.getCalleeSavedRegisters();
257  for (unsigned i = 0, e = CSR.size(); i != e; ++i)
258    OS << getQualifiedName(CSR[i]) << ", ";
259  OS << " 0\n  };\n  return CalleeSaveRegs;\n}\n\n";
260
261  // Emit information about the callee saved register classes.
262  OS << "const TargetRegisterClass* const*\n" << ClassName
263     << "::getCalleeSaveRegClasses() const {\n"
264     << "  static const TargetRegisterClass * const "
265     << "CalleeSaveRegClasses[] = {\n    ";
266
267  for (unsigned i = 0, e = CSR.size(); i != e; ++i) {
268    Record *R = CSR[i];
269    std::multimap<Record*, const CodeGenRegisterClass*>::iterator I, E;
270    tie(I, E) = RegClassesBelongedTo.equal_range(R);
271    if (I == E)
272      throw "Callee saved register '" + R->getName() +
273            "' must belong to a register class for spilling.\n";
274    const CodeGenRegisterClass *RC = (I++)->second;
275    for (; I != E; ++I)
276      if (RC->SpillSize < I->second->SpillSize)
277        RC = I->second;
278    OS << "&" << getQualifiedName(RC->TheDef) << "RegClass, ";
279  }
280  OS << " 0\n  };\n  return CalleeSaveRegClasses;\n}\n\n";
281
282  // Emit information about the dwarf register numbers.
283  OS << "int " << ClassName << "::getDwarfRegNum(unsigned RegNum) const {\n";
284  OS << "  static const int DwarfRegNums[] = { -1, // NoRegister";
285  for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
286    if (!(i % 16)) OS << "\n    ";
287    const CodeGenRegister &Reg = Registers[i];
288    int DwarfRegNum = Reg.TheDef->getValueAsInt("DwarfNumber");
289    OS << DwarfRegNum;
290    if ((i + 1) != e)  OS << ", ";
291  }
292  OS << "\n  };\n";
293  OS << "  assert(RegNum < (sizeof(DwarfRegNums)/sizeof(int)) &&\n";
294  OS << "         \"RegNum exceeds number of registers\");\n";
295  OS << "  return DwarfRegNums[RegNum];\n";
296  OS << "}\n\n";
297
298  OS << "} // End llvm namespace \n";
299}
300