trace.c revision 42332ad028c8616c6d8155520bdc7293b53af138
1#include "config.h" 2 3#include <sys/types.h> 4#include <sys/wait.h> 5#include <signal.h> 6#include <sys/ptrace.h> 7#include <asm/ptrace.h> 8#include <elf.h> 9#include <errno.h> 10#include <string.h> 11 12#include "proc.h" 13#include "common.h" 14#include "ptrace.h" 15#include "breakpoint.h" 16#include "type.h" 17#include "backend.h" 18 19#if (!defined(PTRACE_PEEKUSER) && defined(PTRACE_PEEKUSR)) 20# define PTRACE_PEEKUSER PTRACE_PEEKUSR 21#endif 22 23#if (!defined(PTRACE_POKEUSER) && defined(PTRACE_POKEUSR)) 24# define PTRACE_POKEUSER PTRACE_POKEUSR 25#endif 26 27void 28get_arch_dep(Process *proc) { 29 if (proc->arch_ptr == NULL) { 30 proc->arch_ptr = malloc(sizeof(proc_archdep)); 31#ifdef __powerpc64__ 32 proc->mask_32bit = (proc->e_machine == EM_PPC); 33#endif 34 } 35 36 proc_archdep *a = (proc_archdep *) (proc->arch_ptr); 37 a->valid = (ptrace(PTRACE_GETREGS, proc->pid, 0, &a->regs) >= 0) 38 && (ptrace(PTRACE_GETFPREGS, proc->pid, 0, &a->fpregs) >= 0); 39} 40 41#define SYSCALL_INSN 0x44000002 42 43unsigned int greg = 3; 44unsigned int freg = 1; 45 46/* Returns 1 if syscall, 2 if sysret, 0 otherwise. */ 47int 48syscall_p(Process *proc, int status, int *sysnum) { 49 if (WIFSTOPPED(status) 50 && WSTOPSIG(status) == (SIGTRAP | proc->tracesysgood)) { 51 long pc = (long)get_instruction_pointer(proc); 52 int insn = 53 (int)ptrace(PTRACE_PEEKTEXT, proc->pid, pc - sizeof(long), 54 0); 55 56 if (insn == SYSCALL_INSN) { 57 *sysnum = 58 (int)ptrace(PTRACE_PEEKUSER, proc->pid, 59 sizeof(long) * PT_R0, 0); 60 if (proc->callstack_depth > 0 && 61 proc->callstack[proc->callstack_depth - 1].is_syscall && 62 proc->callstack[proc->callstack_depth - 1].c_un.syscall == *sysnum) { 63 return 2; 64 } 65 return 1; 66 } 67 } 68 return 0; 69} 70 71static long 72gimme_arg_regset(enum tof type, Process *proc, int arg_num, 73 struct arg_type_info *info, 74 gregset_t *regs, fpregset_t *fpregs) 75{ 76 union { long val; float fval; double dval; } cvt; 77 78 if (info->type == ARGTYPE_FLOAT || info->type == ARGTYPE_DOUBLE) { 79 if (freg <= 13 || (proc->mask_32bit && freg <= 8)) { 80 double val = GET_FPREG(*fpregs, freg); 81 82 if (info->type == ARGTYPE_FLOAT) 83 cvt.fval = val; 84 else 85 cvt.dval = val; 86 87 freg++; 88 greg++; 89 90 return cvt.val; 91 } 92 } 93 else if (greg <= 10) { 94 return (*regs)[greg++]; 95 } else { 96#ifdef __powerpc64__ 97 if (proc->mask_32bit) 98 return ptrace (PTRACE_PEEKDATA, proc->pid, 99 proc->stack_pointer + 8 + 100 sizeof (int) * (arg_num - 8), 0) >> 32; 101 else 102 return ptrace (PTRACE_PEEKDATA, proc->pid, 103 proc->stack_pointer + 112 + 104 sizeof (long) * (arg_num - 8), 0); 105#else 106 return ptrace (PTRACE_PEEKDATA, proc->pid, 107 proc->stack_pointer + 8 + 108 sizeof (long) * (arg_num - 8), 0); 109#endif 110 } 111 112 return 0; 113} 114 115static long 116gimme_retval(Process *proc, int arg_num, struct arg_type_info *info, 117 gregset_t *regs, fpregset_t *fpregs) 118{ 119 union { long val; float fval; double dval; } cvt; 120 if (info->type == ARGTYPE_FLOAT || info->type == ARGTYPE_DOUBLE) { 121 double val = GET_FPREG(*fpregs, 1); 122 123 if (info->type == ARGTYPE_FLOAT) 124 cvt.fval = val; 125 else 126 cvt.dval = val; 127 128 return cvt.val; 129 } 130 else 131 return (*regs)[3]; 132} 133 134/* Grab functions arguments based on the PPC64 ABI. */ 135long 136gimme_arg(enum tof type, Process *proc, int arg_num, struct arg_type_info *info) 137{ 138 proc_archdep *arch = (proc_archdep *)proc->arch_ptr; 139 if (arch == NULL || !arch->valid) 140 return -1; 141 142 /* Check if we're entering a new function call to list parameters. If 143 so, initialize the register control variables to keep track of where 144 the parameters were stored. */ 145 if ((type == LT_TOF_FUNCTION || type == LT_TOF_FUNCTIONR) 146 && arg_num == 0) { 147 /* Initialize the set of registrers for parameter passing. */ 148 greg = 3; 149 freg = 1; 150 } 151 152 153 if (type == LT_TOF_FUNCTIONR) { 154 return gimme_retval(proc, arg_num, info, 155 &arch->regs, &arch->fpregs); 156 } else { 157 return gimme_arg_regset(type, proc, arg_num, info, 158 &arch->regs, &arch->fpregs); 159 } 160} 161 162 163/* The atomic skip code is mostly taken from GDB. */ 164 165/* Instruction masks used during single-stepping of atomic 166 * sequences. This was lifted from GDB. */ 167#define LWARX_MASK 0xfc0007fe 168#define LWARX_INSTRUCTION 0x7c000028 169#define LDARX_INSTRUCTION 0x7c0000A8 170#define STWCX_MASK 0xfc0007ff 171#define STWCX_INSTRUCTION 0x7c00012d 172#define STDCX_INSTRUCTION 0x7c0001ad 173#define BC_MASK 0xfc000000 174#define BC_INSN 0x40000000 175#define BRANCH_MASK 0xfc000000 176 177/* In plt.h. XXX make this official interface. */ 178int read_target_4(struct Process *proc, target_address_t addr, uint32_t *lp); 179 180int 181arch_atomic_singlestep(struct Process *proc, struct breakpoint *sbp, 182 int (*add_cb)(void *addr, void *data), 183 void *add_cb_data) 184{ 185 target_address_t ip = get_instruction_pointer(proc); 186 struct breakpoint *other = address2bpstruct(proc->leader, ip); 187 188 debug(1, "arch_atomic_singlestep pid=%d addr=%p %s(%p)", 189 proc->pid, ip, breakpoint_name(sbp), sbp->addr); 190 191 /* If the original instruction was lwarx/ldarx, we can't 192 * single-step over it, instead we have to execute the whole 193 * atomic block at once. */ 194 union { 195 uint32_t insn; 196 char buf[BREAKPOINT_LENGTH]; 197 } u; 198 if (other != NULL) { 199 memcpy(u.buf, sbp->orig_value, BREAKPOINT_LENGTH); 200 } else if (read_target_4(proc, ip, &u.insn) < 0) { 201 fprintf(stderr, "couldn't read instruction at IP %p\n", ip); 202 /* Do the normal singlestep. */ 203 return 1; 204 } 205 206 if ((u.insn & LWARX_MASK) != LWARX_INSTRUCTION 207 && (u.insn & LWARX_MASK) != LDARX_INSTRUCTION) 208 return 1; 209 210 debug(1, "singlestep over atomic block at %p", ip); 211 212 int insn_count; 213 target_address_t addr = ip; 214 for (insn_count = 0; ; ++insn_count) { 215 addr += 4; 216 unsigned long l = ptrace(PTRACE_PEEKTEXT, proc->pid, addr, 0); 217 if (l == (unsigned long)-1 && errno) 218 return -1; 219 uint32_t insn; 220#ifdef __powerpc64__ 221 insn = l >> 32; 222#else 223 insn = l; 224#endif 225 226 /* If a conditional branch is found, put a breakpoint 227 * in its destination address. */ 228 if ((insn & BRANCH_MASK) == BC_INSN) { 229 int immediate = ((insn & 0xfffc) ^ 0x8000) - 0x8000; 230 int absolute = insn & 2; 231 232 /* XXX drop the following casts. */ 233 target_address_t branch_addr; 234 if (absolute) 235 branch_addr = (void *)(uintptr_t)immediate; 236 else 237 branch_addr = addr + (uintptr_t)immediate; 238 239 debug(1, "pid=%d, branch in atomic block from %p to %p", 240 proc->pid, addr, branch_addr); 241 if (add_cb(branch_addr, add_cb_data) < 0) 242 return -1; 243 } 244 245 /* Assume that the atomic sequence ends with a 246 * stwcx/stdcx instruction. */ 247 if ((insn & STWCX_MASK) == STWCX_INSTRUCTION 248 || (insn & STWCX_MASK) == STDCX_INSTRUCTION) { 249 debug(1, "pid=%d, found end of atomic block %p at %p", 250 proc->pid, ip, addr); 251 break; 252 } 253 254 /* Arbitrary cut-off. If we didn't find the 255 * terminating instruction by now, just give up. */ 256 if (insn_count > 16) { 257 fprintf(stderr, "[%d] couldn't find end of atomic block" 258 " at %p\n", proc->pid, ip); 259 return -1; 260 } 261 } 262 263 /* Put the breakpoint to the next instruction. */ 264 addr += 4; 265 if (add_cb(addr, add_cb_data) < 0) 266 return -1; 267 268 debug(1, "PTRACE_CONT"); 269 ptrace(PTRACE_CONT, proc->pid, 0, 0); 270 return 0; 271} 272