nv50_vbo.c revision fba2eabe13b8a3f8c1396c5949db3daab0192156
1/* 2 * Copyright 2008 Ben Skeggs 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF 19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 20 * SOFTWARE. 21 */ 22 23#include "pipe/p_context.h" 24#include "pipe/p_state.h" 25#include "pipe/p_inlines.h" 26 27#include "nv50_context.h" 28 29static INLINE unsigned 30nv50_prim(unsigned mode) 31{ 32 switch (mode) { 33 case PIPE_PRIM_POINTS: return NV50TCL_VERTEX_BEGIN_POINTS; 34 case PIPE_PRIM_LINES: return NV50TCL_VERTEX_BEGIN_LINES; 35 case PIPE_PRIM_LINE_LOOP: return NV50TCL_VERTEX_BEGIN_LINE_LOOP; 36 case PIPE_PRIM_LINE_STRIP: return NV50TCL_VERTEX_BEGIN_LINE_STRIP; 37 case PIPE_PRIM_TRIANGLES: return NV50TCL_VERTEX_BEGIN_TRIANGLES; 38 case PIPE_PRIM_TRIANGLE_STRIP: 39 return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP; 40 case PIPE_PRIM_TRIANGLE_FAN: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN; 41 case PIPE_PRIM_QUADS: return NV50TCL_VERTEX_BEGIN_QUADS; 42 case PIPE_PRIM_QUAD_STRIP: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP; 43 case PIPE_PRIM_POLYGON: return NV50TCL_VERTEX_BEGIN_POLYGON; 44 default: 45 break; 46 } 47 48 NOUVEAU_ERR("invalid primitive type %d\n", mode); 49 return NV50TCL_VERTEX_BEGIN_POINTS; 50} 51 52static INLINE uint32_t 53nv50_vbo_type_to_hw(unsigned type) 54{ 55 switch (type) { 56 case PIPE_FORMAT_TYPE_FLOAT: 57 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT; 58 case PIPE_FORMAT_TYPE_UNORM: 59 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM; 60 case PIPE_FORMAT_TYPE_SNORM: 61 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM; 62 case PIPE_FORMAT_TYPE_USCALED: 63 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED; 64 case PIPE_FORMAT_TYPE_SSCALED: 65 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED; 66 /* 67 case PIPE_FORMAT_TYPE_UINT: 68 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UINT; 69 case PIPE_FORMAT_TYPE_SINT: 70 return NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SINT; */ 71 default: 72 return 0; 73 } 74} 75 76static INLINE uint32_t 77nv50_vbo_size_to_hw(unsigned size, unsigned nr_c) 78{ 79 static const uint32_t hw_values[] = { 80 0, 0, 0, 0, 81 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8, 82 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8, 83 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8_8, 84 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_8_8_8_8, 85 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16, 86 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16, 87 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16_16, 88 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_16_16_16_16, 89 0, 0, 0, 0, 90 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32, 91 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32, 92 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32_32, 93 NV50TCL_VERTEX_ARRAY_ATTRIB_SIZE_32_32_32_32 }; 94 95 /* we'd also have R11G11B10 and R10G10B10A2 */ 96 97 assert(nr_c > 0 && nr_c <= 4); 98 99 if (size > 32) 100 return 0; 101 size >>= (3 - 2); 102 103 return hw_values[size + (nr_c - 1)]; 104} 105 106static INLINE uint32_t 107nv50_vbo_vtxelt_to_hw(struct pipe_vertex_element *ve) 108{ 109 uint32_t hw_type, hw_size; 110 enum pipe_format pf = ve->src_format; 111 unsigned size = pf_size_x(pf) << pf_exp2(pf); 112 113 hw_type = nv50_vbo_type_to_hw(pf_type(pf)); 114 hw_size = nv50_vbo_size_to_hw(size, ve->nr_components); 115 116 if (!hw_type || !hw_size) { 117 NOUVEAU_ERR("unsupported vbo format: %s\n", pf_name(pf)); 118 abort(); 119 return 0x24e80000; 120 } 121 122 if (pf_swizzle_x(pf) == 2) /* BGRA */ 123 hw_size |= (1 << 31); /* no real swizzle bits :-( */ 124 125 return (hw_type | hw_size); 126} 127 128boolean 129nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start, 130 unsigned count) 131{ 132 struct nv50_context *nv50 = nv50_context(pipe); 133 struct nouveau_channel *chan = nv50->screen->tesla->channel; 134 struct nouveau_grobj *tesla = nv50->screen->tesla; 135 136 nv50_state_validate(nv50); 137 138 BEGIN_RING(chan, tesla, 0x142c, 1); 139 OUT_RING (chan, 0); 140 BEGIN_RING(chan, tesla, 0x142c, 1); 141 OUT_RING (chan, 0); 142 143 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); 144 OUT_RING (chan, nv50_prim(mode)); 145 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2); 146 OUT_RING (chan, start); 147 OUT_RING (chan, count); 148 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); 149 OUT_RING (chan, 0); 150 151 pipe->flush(pipe, 0, NULL); 152 return TRUE; 153} 154 155static INLINE void 156nv50_draw_elements_inline_u08(struct nv50_context *nv50, uint8_t *map, 157 unsigned start, unsigned count) 158{ 159 struct nouveau_channel *chan = nv50->screen->tesla->channel; 160 struct nouveau_grobj *tesla = nv50->screen->tesla; 161 162 map += start; 163 164 if (count & 1) { 165 BEGIN_RING(chan, tesla, 0x15e8, 1); 166 OUT_RING (chan, map[0]); 167 map++; 168 count--; 169 } 170 171 while (count) { 172 unsigned nr = count > 2046 ? 2046 : count; 173 int i; 174 175 BEGIN_RING(chan, tesla, 0x400015f0, nr >> 1); 176 for (i = 0; i < nr; i += 2) 177 OUT_RING (chan, (map[i + 1] << 16) | map[i]); 178 179 count -= nr; 180 map += nr; 181 } 182} 183 184static INLINE void 185nv50_draw_elements_inline_u16(struct nv50_context *nv50, uint16_t *map, 186 unsigned start, unsigned count) 187{ 188 struct nouveau_channel *chan = nv50->screen->tesla->channel; 189 struct nouveau_grobj *tesla = nv50->screen->tesla; 190 191 map += start; 192 193 if (count & 1) { 194 BEGIN_RING(chan, tesla, 0x15e8, 1); 195 OUT_RING (chan, map[0]); 196 map++; 197 count--; 198 } 199 200 while (count) { 201 unsigned nr = count > 2046 ? 2046 : count; 202 int i; 203 204 BEGIN_RING(chan, tesla, 0x400015f0, nr >> 1); 205 for (i = 0; i < nr; i += 2) 206 OUT_RING (chan, (map[i + 1] << 16) | map[i]); 207 208 count -= nr; 209 map += nr; 210 } 211} 212 213static INLINE void 214nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint32_t *map, 215 unsigned start, unsigned count) 216{ 217 struct nouveau_channel *chan = nv50->screen->tesla->channel; 218 struct nouveau_grobj *tesla = nv50->screen->tesla; 219 220 map += start; 221 222 while (count) { 223 unsigned nr = count > 2047 ? 2047 : count; 224 225 BEGIN_RING(chan, tesla, 0x400015e8, nr); 226 OUT_RINGp (chan, map, nr); 227 228 count -= nr; 229 map += nr; 230 } 231} 232 233boolean 234nv50_draw_elements(struct pipe_context *pipe, 235 struct pipe_buffer *indexBuffer, unsigned indexSize, 236 unsigned mode, unsigned start, unsigned count) 237{ 238 struct nv50_context *nv50 = nv50_context(pipe); 239 struct nouveau_channel *chan = nv50->screen->tesla->channel; 240 struct nouveau_grobj *tesla = nv50->screen->tesla; 241 struct pipe_screen *pscreen = pipe->screen; 242 void *map; 243 244 map = pipe_buffer_map(pscreen, indexBuffer, PIPE_BUFFER_USAGE_CPU_READ); 245 246 nv50_state_validate(nv50); 247 248 BEGIN_RING(chan, tesla, 0x142c, 1); 249 OUT_RING (chan, 0); 250 BEGIN_RING(chan, tesla, 0x142c, 1); 251 OUT_RING (chan, 0); 252 253 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); 254 OUT_RING (chan, nv50_prim(mode)); 255 switch (indexSize) { 256 case 1: 257 nv50_draw_elements_inline_u08(nv50, map, start, count); 258 break; 259 case 2: 260 nv50_draw_elements_inline_u16(nv50, map, start, count); 261 break; 262 case 4: 263 nv50_draw_elements_inline_u32(nv50, map, start, count); 264 break; 265 default: 266 assert(0); 267 } 268 BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); 269 OUT_RING (chan, 0); 270 271 pipe_buffer_unmap(pscreen, indexBuffer); 272 pipe->flush(pipe, 0, NULL); 273 return TRUE; 274} 275 276static INLINE boolean 277nv50_vbo_static_attrib(struct nv50_context *nv50, unsigned attrib, 278 struct nouveau_stateobj **pso, 279 struct pipe_vertex_element *ve, 280 struct pipe_vertex_buffer *vb) 281 282{ 283 struct nouveau_stateobj *so; 284 struct nouveau_grobj *tesla = nv50->screen->tesla; 285 struct nouveau_bo *bo = nouveau_bo(vb->buffer); 286 float *v; 287 int ret; 288 enum pipe_format pf = ve->src_format; 289 290 if ((pf_type(pf) != PIPE_FORMAT_TYPE_FLOAT) || 291 (pf_size_x(pf) << pf_exp2(pf)) != 32) 292 return FALSE; 293 294 ret = nouveau_bo_map(bo, NOUVEAU_BO_RD); 295 if (ret) 296 return FALSE; 297 v = (float *)(bo->map + (vb->buffer_offset + ve->src_offset)); 298 299 so = *pso; 300 if (!so) 301 *pso = so = so_new(nv50->vtxelt_nr * 5, 0); 302 303 switch (ve->nr_components) { 304 case 4: 305 so_method(so, tesla, NV50TCL_VTX_ATTR_4F_X(attrib), 4); 306 so_data (so, fui(v[0])); 307 so_data (so, fui(v[1])); 308 so_data (so, fui(v[2])); 309 so_data (so, fui(v[3])); 310 break; 311 case 3: 312 so_method(so, tesla, NV50TCL_VTX_ATTR_3F_X(attrib), 3); 313 so_data (so, fui(v[0])); 314 so_data (so, fui(v[1])); 315 so_data (so, fui(v[2])); 316 break; 317 case 2: 318 so_method(so, tesla, NV50TCL_VTX_ATTR_2F_X(attrib), 2); 319 so_data (so, fui(v[0])); 320 so_data (so, fui(v[1])); 321 break; 322 case 1: 323 so_method(so, tesla, NV50TCL_VTX_ATTR_1F(attrib), 1); 324 so_data (so, fui(v[0])); 325 break; 326 default: 327 nouveau_bo_unmap(bo); 328 return FALSE; 329 } 330 331 nouveau_bo_unmap(bo); 332 return TRUE; 333} 334 335void 336nv50_vbo_validate(struct nv50_context *nv50) 337{ 338 struct nouveau_grobj *tesla = nv50->screen->tesla; 339 struct nouveau_stateobj *vtxbuf, *vtxfmt, *vtxattr; 340 unsigned i; 341 342 /* don't validate if Gallium took away our buffers */ 343 if (nv50->vtxbuf_nr == 0) 344 return; 345 346 vtxattr = NULL; 347 vtxbuf = so_new(nv50->vtxelt_nr * 7, nv50->vtxelt_nr * 4); 348 vtxfmt = so_new(nv50->vtxelt_nr + 1, 0); 349 so_method(vtxfmt, tesla, NV50TCL_VERTEX_ARRAY_ATTRIB(0), 350 nv50->vtxelt_nr); 351 352 for (i = 0; i < nv50->vtxelt_nr; i++) { 353 struct pipe_vertex_element *ve = &nv50->vtxelt[i]; 354 struct pipe_vertex_buffer *vb = 355 &nv50->vtxbuf[ve->vertex_buffer_index]; 356 struct nouveau_bo *bo = nouveau_bo(vb->buffer); 357 uint32_t hw = nv50_vbo_vtxelt_to_hw(ve); 358 359 if (!vb->stride && 360 nv50_vbo_static_attrib(nv50, i, &vtxattr, ve, vb)) { 361 so_data(vtxfmt, hw | (1 << 4)); 362 363 so_method(vtxbuf, tesla, 364 NV50TCL_VERTEX_ARRAY_FORMAT(i), 1); 365 so_data (vtxbuf, 0); 366 continue; 367 } 368 so_data(vtxfmt, hw | i); 369 370 so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 3); 371 so_data (vtxbuf, 0x20000000 | vb->stride); 372 so_reloc (vtxbuf, bo, vb->buffer_offset + 373 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | 374 NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); 375 so_reloc (vtxbuf, bo, vb->buffer_offset + 376 ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | 377 NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); 378 379 /* vertex array limits */ 380 so_method(vtxbuf, tesla, 0x1080 + (i * 8), 2); 381 so_reloc (vtxbuf, bo, vb->buffer->size - 1, 382 NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | 383 NOUVEAU_BO_HIGH, 0, 0); 384 so_reloc (vtxbuf, bo, vb->buffer->size - 1, 385 NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | 386 NOUVEAU_BO_LOW, 0, 0); 387 } 388 389 so_ref (vtxfmt, &nv50->state.vtxfmt); 390 so_ref (vtxbuf, &nv50->state.vtxbuf); 391 so_ref (vtxattr, &nv50->state.vtxattr); 392 so_ref (NULL, &vtxbuf); 393 so_ref (NULL, &vtxfmt); 394 so_ref (NULL, &vtxattr); 395} 396 397