r600.h revision 929be6eb95c33d5885a89b36dbc82db64c1344fe
1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Jerome Glisse 25 */ 26#ifndef R600_H 27#define R600_H 28 29#include <assert.h> 30#include <stdint.h> 31#include <stdio.h> 32#include <util/u_double_list.h> 33#include <pipe/p_compiler.h> 34 35#define RADEON_CTX_MAX_PM4 (64 * 1024 / 4) 36 37#define R600_ERR(fmt, args...) \ 38 fprintf(stderr, "EE %s:%d %s - "fmt, __FILE__, __LINE__, __func__, ##args) 39 40typedef uint64_t u64; 41typedef uint32_t u32; 42typedef uint16_t u16; 43typedef uint8_t u8; 44 45struct radeon; 46struct winsys_handle; 47 48enum radeon_family { 49 CHIP_UNKNOWN, 50 CHIP_R100, 51 CHIP_RV100, 52 CHIP_RS100, 53 CHIP_RV200, 54 CHIP_RS200, 55 CHIP_R200, 56 CHIP_RV250, 57 CHIP_RS300, 58 CHIP_RV280, 59 CHIP_R300, 60 CHIP_R350, 61 CHIP_RV350, 62 CHIP_RV380, 63 CHIP_R420, 64 CHIP_R423, 65 CHIP_RV410, 66 CHIP_RS400, 67 CHIP_RS480, 68 CHIP_RS600, 69 CHIP_RS690, 70 CHIP_RS740, 71 CHIP_RV515, 72 CHIP_R520, 73 CHIP_RV530, 74 CHIP_RV560, 75 CHIP_RV570, 76 CHIP_R580, 77 CHIP_R600, 78 CHIP_RV610, 79 CHIP_RV630, 80 CHIP_RV670, 81 CHIP_RV620, 82 CHIP_RV635, 83 CHIP_RS780, 84 CHIP_RS880, 85 CHIP_RV770, 86 CHIP_RV730, 87 CHIP_RV710, 88 CHIP_RV740, 89 CHIP_CEDAR, 90 CHIP_REDWOOD, 91 CHIP_JUNIPER, 92 CHIP_CYPRESS, 93 CHIP_HEMLOCK, 94 CHIP_PALM, 95 CHIP_BARTS, 96 CHIP_TURKS, 97 CHIP_CAICOS, 98 CHIP_LAST, 99}; 100 101enum chip_class { 102 R600, 103 R700, 104 EVERGREEN, 105}; 106 107struct r600_tiling_info { 108 unsigned num_channels; 109 unsigned num_banks; 110 unsigned group_bytes; 111}; 112 113enum radeon_family r600_get_family(struct radeon *rw); 114enum chip_class r600_get_family_class(struct radeon *radeon); 115struct r600_tiling_info *r600_get_tiling_info(struct radeon *radeon); 116unsigned r600_get_clock_crystal_freq(struct radeon *radeon); 117unsigned r600_get_minor_version(struct radeon *radeon); 118unsigned r600_get_num_backends(struct radeon *radeon); 119 120/* r600_bo.c */ 121struct r600_bo; 122struct r600_bo *r600_bo(struct radeon *radeon, 123 unsigned size, unsigned alignment, 124 unsigned binding, unsigned usage); 125struct r600_bo *r600_bo_handle(struct radeon *radeon, 126 unsigned handle, unsigned *array_mode); 127void *r600_bo_map(struct radeon *radeon, struct r600_bo *bo, unsigned usage, void *ctx); 128void r600_bo_unmap(struct radeon *radeon, struct r600_bo *bo); 129void r600_bo_reference(struct radeon *radeon, struct r600_bo **dst, 130 struct r600_bo *src); 131boolean r600_bo_get_winsys_handle(struct radeon *radeon, struct r600_bo *pb_bo, 132 unsigned stride, struct winsys_handle *whandle); 133static INLINE unsigned r600_bo_offset(struct r600_bo *bo) 134{ 135 return 0; 136} 137 138 139/* R600/R700 STATES */ 140#define R600_GROUP_MAX 16 141#define R600_BLOCK_MAX_BO 32 142#define R600_BLOCK_MAX_REG 128 143 144struct r600_pipe_reg { 145 u32 offset; 146 u32 mask; 147 u32 value; 148 struct r600_bo *bo; 149}; 150 151struct r600_pipe_state { 152 unsigned id; 153 unsigned nregs; 154 struct r600_pipe_reg regs[R600_BLOCK_MAX_REG]; 155}; 156 157static inline void r600_pipe_state_add_reg(struct r600_pipe_state *state, 158 u32 offset, u32 value, u32 mask, 159 struct r600_bo *bo) 160{ 161 state->regs[state->nregs].offset = offset; 162 state->regs[state->nregs].value = value; 163 state->regs[state->nregs].mask = mask; 164 state->regs[state->nregs].bo = bo; 165 state->nregs++; 166 assert(state->nregs < R600_BLOCK_MAX_REG); 167} 168 169#define R600_BLOCK_STATUS_ENABLED (1 << 0) 170#define R600_BLOCK_STATUS_DIRTY (1 << 1) 171 172struct r600_block_reloc { 173 struct r600_bo *bo; 174 unsigned flush_flags; 175 unsigned flush_mask; 176 unsigned bo_pm4_index; 177}; 178 179struct r600_block { 180 struct list_head list; 181 unsigned status; 182 unsigned start_offset; 183 unsigned pm4_ndwords; 184 unsigned pm4_flush_ndwords; 185 unsigned nbo; 186 unsigned nreg; 187 u32 *reg; 188 u32 pm4[R600_BLOCK_MAX_REG]; 189 unsigned pm4_bo_index[R600_BLOCK_MAX_REG]; 190 struct r600_block_reloc reloc[R600_BLOCK_MAX_BO]; 191}; 192 193struct r600_range { 194 unsigned start_offset; 195 unsigned end_offset; 196 struct r600_block **blocks; 197}; 198 199/* 200 * relocation 201 */ 202#pragma pack(1) 203struct r600_reloc { 204 uint32_t handle; 205 uint32_t read_domain; 206 uint32_t write_domain; 207 uint32_t flags; 208}; 209#pragma pack() 210 211/* 212 * query 213 */ 214struct r600_query { 215 u64 result; 216 /* The kind of query. Currently only OQ is supported. */ 217 unsigned type; 218 /* How many results have been written, in dwords. It's incremented 219 * after end_query and flush. */ 220 unsigned num_results; 221 /* if we've flushed the query */ 222 unsigned state; 223 /* The buffer where query results are stored. */ 224 struct r600_bo *buffer; 225 unsigned buffer_size; 226 /* linked list of queries */ 227 struct list_head list; 228}; 229 230#define R600_QUERY_STATE_STARTED (1 << 0) 231#define R600_QUERY_STATE_ENDED (1 << 1) 232#define R600_QUERY_STATE_SUSPENDED (1 << 2) 233 234 235struct r600_context { 236 struct radeon *radeon; 237 unsigned hash_size; 238 unsigned hash_shift; 239 struct r600_range range[256]; 240 unsigned nblocks; 241 struct r600_block **blocks; 242 struct list_head dirty; 243 unsigned pm4_ndwords; 244 unsigned pm4_cdwords; 245 unsigned pm4_dirty_cdwords; 246 unsigned ctx_pm4_ndwords; 247 unsigned nreloc; 248 unsigned creloc; 249 struct r600_reloc *reloc; 250 struct radeon_bo **bo; 251 u32 *pm4; 252 struct list_head query_list; 253 unsigned num_query_running; 254 struct list_head fenced_bo; 255 unsigned max_db; /* for OQ */ 256}; 257 258struct r600_draw { 259 u32 vgt_num_indices; 260 u32 vgt_num_instances; 261 u32 vgt_index_type; 262 u32 vgt_draw_initiator; 263 u32 indices_bo_offset; 264 struct r600_bo *indices; 265}; 266 267int r600_context_init(struct r600_context *ctx, struct radeon *radeon); 268void r600_context_fini(struct r600_context *ctx); 269void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_state *state); 270void r600_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 271void r600_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 272void r600_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 273void r600_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 274void r600_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 275void r600_context_flush(struct r600_context *ctx); 276void r600_context_dump_bof(struct r600_context *ctx, const char *file); 277void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw); 278 279struct r600_query *r600_context_query_create(struct r600_context *ctx, unsigned query_type); 280void r600_context_query_destroy(struct r600_context *ctx, struct r600_query *query); 281boolean r600_context_query_result(struct r600_context *ctx, 282 struct r600_query *query, 283 boolean wait, void *vresult); 284void r600_query_begin(struct r600_context *ctx, struct r600_query *query); 285void r600_query_end(struct r600_context *ctx, struct r600_query *query); 286void r600_context_queries_suspend(struct r600_context *ctx); 287void r600_context_queries_resume(struct r600_context *ctx); 288 289int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon); 290void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *draw); 291void evergreen_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 292void evergreen_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 293void evergreen_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 294void evergreen_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 295void evergreen_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 296 297struct radeon *radeon_decref(struct radeon *radeon); 298 299#endif 300