r600_pipe.h revision 3603d157889544230f1787bbdc4915ccd7461c59
1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Jerome Glisse 25 */ 26#ifndef R600_PIPE_H 27#define R600_PIPE_H 28 29#include "../../winsys/radeon/drm/radeon_winsys.h" 30 31#include "pipe/p_state.h" 32#include "pipe/p_screen.h" 33#include "pipe/p_context.h" 34#include "util/u_math.h" 35#include "util/u_slab.h" 36#include "util/u_vbuf_mgr.h" 37#include "r600.h" 38#include "r600_public.h" 39#include "r600_shader.h" 40#include "r600_resource.h" 41 42#define R600_MAX_CONST_BUFFERS 1 43#define R600_MAX_CONST_BUFFER_SIZE 4096 44 45#ifdef PIPE_ARCH_BIG_ENDIAN 46#define R600_BIG_ENDIAN 1 47#else 48#define R600_BIG_ENDIAN 0 49#endif 50 51enum r600_pipe_state_id { 52 R600_PIPE_STATE_BLEND = 0, 53 R600_PIPE_STATE_BLEND_COLOR, 54 R600_PIPE_STATE_CONFIG, 55 R600_PIPE_STATE_SEAMLESS_CUBEMAP, 56 R600_PIPE_STATE_CLIP, 57 R600_PIPE_STATE_SCISSOR, 58 R600_PIPE_STATE_VIEWPORT, 59 R600_PIPE_STATE_RASTERIZER, 60 R600_PIPE_STATE_VGT, 61 R600_PIPE_STATE_FRAMEBUFFER, 62 R600_PIPE_STATE_DSA, 63 R600_PIPE_STATE_STENCIL_REF, 64 R600_PIPE_STATE_PS_SHADER, 65 R600_PIPE_STATE_VS_SHADER, 66 R600_PIPE_STATE_CONSTANT, 67 R600_PIPE_STATE_SAMPLER, 68 R600_PIPE_STATE_RESOURCE, 69 R600_PIPE_STATE_POLYGON_OFFSET, 70 R600_PIPE_STATE_FETCH_SHADER, 71 R600_PIPE_STATE_SPI, 72 R600_PIPE_NSTATES 73}; 74 75struct r600_screen { 76 struct pipe_screen screen; 77 struct radeon_winsys *ws; 78 struct radeon *radeon; 79 struct radeon_info info; 80 struct r600_tiling_info tiling_info; 81 struct util_slab_mempool pool_buffers; 82 unsigned num_contexts; 83 84 /* for thread-safe write accessing to num_contexts */ 85 pipe_mutex mutex_num_contexts; 86}; 87 88struct r600_pipe_sampler_view { 89 struct pipe_sampler_view base; 90 struct r600_pipe_resource_state state; 91}; 92 93struct r600_pipe_rasterizer { 94 struct r600_pipe_state rstate; 95 boolean clamp_vertex_color; 96 boolean clamp_fragment_color; 97 boolean flatshade; 98 unsigned sprite_coord_enable; 99 float offset_units; 100 float offset_scale; 101}; 102 103struct r600_pipe_blend { 104 struct r600_pipe_state rstate; 105 unsigned cb_target_mask; 106}; 107 108struct r600_pipe_dsa { 109 struct r600_pipe_state rstate; 110 unsigned alpha_ref; 111}; 112 113struct r600_vertex_element 114{ 115 unsigned count; 116 struct pipe_vertex_element elements[PIPE_MAX_ATTRIBS]; 117 struct u_vbuf_mgr_elements *vmgr_elements; 118 struct r600_bo *fetch_shader; 119 unsigned fs_size; 120 struct r600_pipe_state rstate; 121 /* if offset is to big for fetch instructio we need to alterate 122 * offset of vertex buffer, record here the offset need to add 123 */ 124 unsigned vbuffer_need_offset; 125 unsigned vbuffer_offset[PIPE_MAX_ATTRIBS]; 126}; 127 128struct r600_pipe_shader { 129 struct r600_shader shader; 130 struct r600_pipe_state rstate; 131 struct r600_bo *bo; 132 struct r600_bo *bo_fetch; 133 struct r600_vertex_element vertex_elements; 134 struct tgsi_token *tokens; 135}; 136 137struct r600_pipe_sampler_state { 138 struct r600_pipe_state rstate; 139 boolean seamless_cube_map; 140}; 141 142/* needed for blitter save */ 143#define NUM_TEX_UNITS 16 144 145struct r600_textures_info { 146 struct r600_pipe_sampler_view *views[NUM_TEX_UNITS]; 147 struct r600_pipe_sampler_state *samplers[NUM_TEX_UNITS]; 148 unsigned n_views; 149 unsigned n_samplers; 150 bool samplers_dirty; 151 bool is_array_sampler[NUM_TEX_UNITS]; 152}; 153 154struct r600_fence { 155 struct pipe_reference reference; 156 struct r600_pipe_context *ctx; 157 unsigned index; /* in the shared bo */ 158 struct list_head head; 159}; 160 161#define FENCE_BLOCK_SIZE 16 162 163struct r600_fence_block { 164 struct r600_fence fences[FENCE_BLOCK_SIZE]; 165 struct list_head head; 166}; 167 168struct r600_pipe_fences { 169 struct r600_bo *bo; 170 unsigned *data; 171 unsigned next_index; 172 /* linked list of preallocated blocks */ 173 struct list_head blocks; 174 /* linked list of freed fences */ 175 struct list_head pool; 176}; 177 178#define R600_CONSTANT_ARRAY_SIZE 256 179#define R600_RESOURCE_ARRAY_SIZE 160 180 181struct r600_pipe_context { 182 struct pipe_context context; 183 struct blitter_context *blitter; 184 enum radeon_family family; 185 enum chip_class chip_class; 186 void *custom_dsa_flush; 187 struct r600_screen *screen; 188 struct radeon *radeon; 189 struct r600_pipe_state *states[R600_PIPE_NSTATES]; 190 struct r600_context ctx; 191 struct r600_vertex_element *vertex_elements; 192 struct r600_pipe_resource_state fs_resource[PIPE_MAX_ATTRIBS]; 193 struct pipe_framebuffer_state framebuffer; 194 struct pipe_index_buffer index_buffer; 195 unsigned cb_target_mask; 196 /* for saving when using blitter */ 197 struct pipe_stencil_ref stencil_ref; 198 struct pipe_viewport_state viewport; 199 struct pipe_clip_state clip; 200 struct r600_pipe_state config; 201 struct r600_pipe_shader *ps_shader; 202 struct r600_pipe_shader *vs_shader; 203 struct r600_pipe_state vs_const_buffer; 204 struct r600_pipe_resource_state vs_const_buffer_resource[R600_MAX_CONST_BUFFERS]; 205 struct r600_pipe_state ps_const_buffer; 206 struct r600_pipe_resource_state ps_const_buffer_resource[R600_MAX_CONST_BUFFERS]; 207 struct r600_pipe_rasterizer *rasterizer; 208 struct r600_pipe_state vgt; 209 struct r600_pipe_state spi; 210 struct pipe_query *current_render_cond; 211 unsigned current_render_cond_mode; 212 struct pipe_query *saved_render_cond; 213 unsigned saved_render_cond_mode; 214 /* shader information */ 215 boolean clamp_vertex_color; 216 boolean clamp_fragment_color; 217 boolean spi_dirty; 218 unsigned sprite_coord_enable; 219 boolean flatshade; 220 boolean export_16bpc; 221 unsigned alpha_ref; 222 boolean alpha_ref_dirty; 223 unsigned nr_cbufs; 224 struct r600_textures_info vs_samplers; 225 struct r600_textures_info ps_samplers; 226 227 struct r600_pipe_fences fences; 228 229 struct u_vbuf_mgr *vbuf_mgr; 230 struct util_slab_mempool pool_transfers; 231 boolean blit; 232 boolean have_depth_texture, have_depth_fb; 233 234 unsigned default_ps_gprs, default_vs_gprs; 235}; 236 237struct r600_drawl { 238 struct pipe_draw_info info; 239 struct pipe_context *ctx; 240 unsigned index_size; 241 unsigned index_buffer_offset; 242 struct pipe_resource *index_buffer; 243}; 244 245/* evergreen_state.c */ 246void evergreen_init_state_functions(struct r600_pipe_context *rctx); 247void evergreen_init_config(struct r600_pipe_context *rctx); 248void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); 249void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); 250void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); 251void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx); 252void evergreen_polygon_offset_update(struct r600_pipe_context *rctx); 253void evergreen_pipe_init_buffer_resource(struct r600_pipe_context *rctx, 254 struct r600_pipe_resource_state *rstate); 255void evergreen_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, 256 struct r600_resource *rbuffer, 257 unsigned offset, unsigned stride, 258 enum radeon_bo_usage usage); 259boolean evergreen_is_format_supported(struct pipe_screen *screen, 260 enum pipe_format format, 261 enum pipe_texture_target target, 262 unsigned sample_count, 263 unsigned usage); 264 265/* r600_blit.c */ 266void r600_init_blit_functions(struct r600_pipe_context *rctx); 267void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture); 268void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture); 269void r600_flush_depth_textures(struct r600_pipe_context *rctx); 270 271/* r600_buffer.c */ 272struct pipe_resource *r600_buffer_create(struct pipe_screen *screen, 273 const struct pipe_resource *templ); 274struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen, 275 void *ptr, unsigned bytes, 276 unsigned bind); 277struct pipe_resource *r600_buffer_from_handle(struct pipe_screen *screen, 278 struct winsys_handle *whandle); 279void r600_upload_index_buffer(struct r600_pipe_context *rctx, struct r600_drawl *draw); 280 281 282/* r600_pipe.c */ 283void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence, 284 unsigned flags); 285 286/* r600_query.c */ 287void r600_init_query_functions(struct r600_pipe_context *rctx); 288 289/* r600_resource.c */ 290void r600_init_context_resource_functions(struct r600_pipe_context *r600); 291 292/* r600_shader.c */ 293int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader); 294void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader); 295int r600_find_vs_semantic_index(struct r600_shader *vs, 296 struct r600_shader *ps, int id); 297 298/* r600_state.c */ 299void r600_update_sampler_states(struct r600_pipe_context *rctx); 300void r600_init_state_functions(struct r600_pipe_context *rctx); 301void r600_init_config(struct r600_pipe_context *rctx); 302void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); 303void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); 304void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); 305void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx); 306void r600_polygon_offset_update(struct r600_pipe_context *rctx); 307void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx, 308 struct r600_pipe_resource_state *rstate); 309void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, 310 struct r600_resource *rbuffer, 311 unsigned offset, unsigned stride, 312 enum radeon_bo_usage usage); 313void r600_adjust_gprs(struct r600_pipe_context *rctx); 314boolean r600_is_format_supported(struct pipe_screen *screen, 315 enum pipe_format format, 316 enum pipe_texture_target target, 317 unsigned sample_count, 318 unsigned usage); 319 320/* r600_texture.c */ 321void r600_init_screen_texture_functions(struct pipe_screen *screen); 322void r600_init_surface_functions(struct r600_pipe_context *r600); 323uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format, 324 const unsigned char *swizzle_view, 325 uint32_t *word4_p, uint32_t *yuv_format_p); 326unsigned r600_texture_get_offset(struct r600_resource_texture *rtex, 327 unsigned level, unsigned layer); 328 329/* r600_translate.c */ 330void r600_translate_index_buffer(struct r600_pipe_context *r600, 331 struct pipe_resource **index_buffer, 332 unsigned *index_size, 333 unsigned *start, unsigned count); 334 335/* r600_state_common.c */ 336void r600_set_index_buffer(struct pipe_context *ctx, 337 const struct pipe_index_buffer *ib); 338void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count, 339 const struct pipe_vertex_buffer *buffers); 340void *r600_create_vertex_elements(struct pipe_context *ctx, 341 unsigned count, 342 const struct pipe_vertex_element *elements); 343void r600_delete_vertex_element(struct pipe_context *ctx, void *state); 344void r600_bind_blend_state(struct pipe_context *ctx, void *state); 345void r600_bind_dsa_state(struct pipe_context *ctx, void *state); 346void r600_bind_rs_state(struct pipe_context *ctx, void *state); 347void r600_delete_rs_state(struct pipe_context *ctx, void *state); 348void r600_sampler_view_destroy(struct pipe_context *ctx, 349 struct pipe_sampler_view *state); 350void r600_delete_state(struct pipe_context *ctx, void *state); 351void r600_bind_vertex_elements(struct pipe_context *ctx, void *state); 352void *r600_create_shader_state(struct pipe_context *ctx, 353 const struct pipe_shader_state *state); 354void r600_bind_ps_shader(struct pipe_context *ctx, void *state); 355void r600_bind_vs_shader(struct pipe_context *ctx, void *state); 356void r600_delete_ps_shader(struct pipe_context *ctx, void *state); 357void r600_delete_vs_shader(struct pipe_context *ctx, void *state); 358void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, 359 struct pipe_resource *buffer); 360void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info); 361 362/* 363 * common helpers 364 */ 365static INLINE u32 S_FIXED(float value, u32 frac_bits) 366{ 367 return value * (1 << frac_bits); 368} 369#define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y)) 370 371static inline unsigned r600_tex_aniso_filter(unsigned filter) 372{ 373 if (filter <= 1) return 0; 374 if (filter <= 2) return 1; 375 if (filter <= 4) return 2; 376 if (filter <= 8) return 3; 377 /* else */ return 4; 378} 379 380#endif 381