r600_pipe.h revision a494301f7fd4c93df67396d296a3edc6acfa44c3
1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Jerome Glisse 25 */ 26#ifndef R600_PIPE_H 27#define R600_PIPE_H 28 29#include "../../winsys/radeon/drm/radeon_winsys.h" 30 31#include "pipe/p_state.h" 32#include "pipe/p_screen.h" 33#include "pipe/p_context.h" 34#include "util/u_math.h" 35#include "util/u_slab.h" 36#include "util/u_vbuf.h" 37#include "r600.h" 38#include "r600_public.h" 39#include "r600_shader.h" 40#include "r600_resource.h" 41 42#define R600_MAX_CONST_BUFFERS 2 43#define R600_MAX_CONST_BUFFER_SIZE 4096 44 45#ifdef PIPE_ARCH_BIG_ENDIAN 46#define R600_BIG_ENDIAN 1 47#else 48#define R600_BIG_ENDIAN 0 49#endif 50 51enum r600_pipe_state_id { 52 R600_PIPE_STATE_BLEND = 0, 53 R600_PIPE_STATE_BLEND_COLOR, 54 R600_PIPE_STATE_CONFIG, 55 R600_PIPE_STATE_SEAMLESS_CUBEMAP, 56 R600_PIPE_STATE_CLIP, 57 R600_PIPE_STATE_SCISSOR, 58 R600_PIPE_STATE_VIEWPORT, 59 R600_PIPE_STATE_RASTERIZER, 60 R600_PIPE_STATE_VGT, 61 R600_PIPE_STATE_FRAMEBUFFER, 62 R600_PIPE_STATE_DSA, 63 R600_PIPE_STATE_STENCIL_REF, 64 R600_PIPE_STATE_PS_SHADER, 65 R600_PIPE_STATE_VS_SHADER, 66 R600_PIPE_STATE_CONSTANT, 67 R600_PIPE_STATE_SAMPLER, 68 R600_PIPE_STATE_RESOURCE, 69 R600_PIPE_STATE_POLYGON_OFFSET, 70 R600_PIPE_STATE_FETCH_SHADER, 71 R600_PIPE_NSTATES 72}; 73 74struct r600_pipe_fences { 75 struct r600_resource *bo; 76 unsigned *data; 77 unsigned next_index; 78 /* linked list of preallocated blocks */ 79 struct list_head blocks; 80 /* linked list of freed fences */ 81 struct list_head pool; 82 pipe_mutex mutex; 83}; 84 85struct r600_screen { 86 struct pipe_screen screen; 87 struct radeon_winsys *ws; 88 unsigned family; 89 enum chip_class chip_class; 90 struct radeon_info info; 91 struct r600_tiling_info tiling_info; 92 struct util_slab_mempool pool_buffers; 93 struct r600_pipe_fences fences; 94 95 unsigned num_contexts; 96 97 /* for thread-safe write accessing to num_contexts */ 98 pipe_mutex mutex_num_contexts; 99}; 100 101struct r600_pipe_sampler_view { 102 struct pipe_sampler_view base; 103 struct r600_pipe_resource_state state; 104}; 105 106struct r600_pipe_rasterizer { 107 struct r600_pipe_state rstate; 108 boolean flatshade; 109 boolean two_side; 110 unsigned sprite_coord_enable; 111 unsigned clip_plane_enable; 112 unsigned pa_sc_line_stipple; 113 unsigned pa_su_sc_mode_cntl; 114 unsigned pa_cl_clip_cntl; 115 float offset_units; 116 float offset_scale; 117}; 118 119struct r600_pipe_blend { 120 struct r600_pipe_state rstate; 121 unsigned cb_target_mask; 122 unsigned cb_color_control; 123}; 124 125struct r600_pipe_dsa { 126 struct r600_pipe_state rstate; 127 unsigned alpha_ref; 128 ubyte valuemask[2]; 129 ubyte writemask[2]; 130}; 131 132struct r600_vertex_element 133{ 134 unsigned count; 135 struct pipe_vertex_element elements[PIPE_MAX_ATTRIBS]; 136 struct u_vbuf_elements *vmgr_elements; 137 struct r600_resource *fetch_shader; 138 unsigned fs_size; 139 struct r600_pipe_state rstate; 140 /* if offset is to big for fetch instructio we need to alterate 141 * offset of vertex buffer, record here the offset need to add 142 */ 143 unsigned vbuffer_need_offset; 144 unsigned vbuffer_offset[PIPE_MAX_ATTRIBS]; 145}; 146 147struct r600_pipe_shader { 148 struct r600_shader shader; 149 struct r600_pipe_state rstate; 150 struct r600_resource *bo; 151 struct r600_resource *bo_fetch; 152 struct r600_vertex_element vertex_elements; 153 struct tgsi_token *tokens; 154 unsigned sprite_coord_enable; 155 unsigned flatshade; 156 unsigned pa_cl_vs_out_cntl; 157 struct pipe_stream_output_info so; 158}; 159 160struct r600_pipe_sampler_state { 161 struct r600_pipe_state rstate; 162 boolean seamless_cube_map; 163}; 164 165/* needed for blitter save */ 166#define NUM_TEX_UNITS 16 167 168struct r600_textures_info { 169 struct r600_pipe_sampler_view *views[NUM_TEX_UNITS]; 170 struct r600_pipe_sampler_state *samplers[NUM_TEX_UNITS]; 171 unsigned n_views; 172 unsigned n_samplers; 173 bool samplers_dirty; 174 bool is_array_sampler[NUM_TEX_UNITS]; 175}; 176 177struct r600_fence { 178 struct pipe_reference reference; 179 unsigned index; /* in the shared bo */ 180 struct list_head head; 181}; 182 183#define FENCE_BLOCK_SIZE 16 184 185struct r600_fence_block { 186 struct r600_fence fences[FENCE_BLOCK_SIZE]; 187 struct list_head head; 188}; 189 190#define R600_CONSTANT_ARRAY_SIZE 256 191#define R600_RESOURCE_ARRAY_SIZE 160 192 193struct r600_stencil_ref 194{ 195 ubyte ref_value[2]; 196 ubyte valuemask[2]; 197 ubyte writemask[2]; 198}; 199 200struct r600_pipe_context { 201 struct pipe_context context; 202 struct blitter_context *blitter; 203 enum radeon_family family; 204 enum chip_class chip_class; 205 unsigned r6xx_num_clause_temp_gprs; 206 void *custom_dsa_flush; 207 struct r600_screen *screen; 208 struct radeon_winsys *ws; 209 struct r600_pipe_state *states[R600_PIPE_NSTATES]; 210 struct r600_context ctx; 211 struct r600_vertex_element *vertex_elements; 212 struct r600_pipe_resource_state fs_resource[PIPE_MAX_ATTRIBS]; 213 struct pipe_framebuffer_state framebuffer; 214 unsigned cb_target_mask; 215 unsigned cb_color_control; 216 unsigned pa_sc_line_stipple; 217 unsigned pa_su_sc_mode_cntl; 218 unsigned pa_cl_clip_cntl; 219 /* for saving when using blitter */ 220 struct pipe_stencil_ref stencil_ref; 221 struct pipe_viewport_state viewport; 222 struct pipe_clip_state clip; 223 struct r600_pipe_state config; 224 struct r600_pipe_shader *ps_shader; 225 struct r600_pipe_shader *vs_shader; 226 struct r600_pipe_state vs_const_buffer; 227 struct r600_pipe_resource_state vs_const_buffer_resource[R600_MAX_CONST_BUFFERS]; 228 struct r600_pipe_state ps_const_buffer; 229 struct r600_pipe_resource_state ps_const_buffer_resource[R600_MAX_CONST_BUFFERS]; 230 struct r600_pipe_rasterizer *rasterizer; 231 struct r600_pipe_state vgt; 232 struct r600_pipe_state spi; 233 struct pipe_query *current_render_cond; 234 unsigned current_render_cond_mode; 235 struct pipe_query *saved_render_cond; 236 unsigned saved_render_cond_mode; 237 /* shader information */ 238 boolean two_side; 239 unsigned sprite_coord_enable; 240 boolean export_16bpc; 241 unsigned alpha_ref; 242 boolean alpha_ref_dirty; 243 unsigned nr_cbufs; 244 struct r600_textures_info vs_samplers; 245 struct r600_textures_info ps_samplers; 246 247 struct u_vbuf *vbuf_mgr; 248 struct util_slab_mempool pool_transfers; 249 boolean have_depth_texture, have_depth_fb; 250 251 unsigned default_ps_gprs, default_vs_gprs; 252}; 253 254/* evergreen_state.c */ 255void evergreen_init_state_functions(struct r600_pipe_context *rctx); 256void evergreen_init_config(struct r600_pipe_context *rctx); 257void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); 258void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); 259void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); 260void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx); 261void evergreen_polygon_offset_update(struct r600_pipe_context *rctx); 262void evergreen_pipe_init_buffer_resource(struct r600_pipe_context *rctx, 263 struct r600_pipe_resource_state *rstate); 264void evergreen_pipe_mod_buffer_resource(struct pipe_context *ctx, 265 struct r600_pipe_resource_state *rstate, 266 struct r600_resource *rbuffer, 267 unsigned offset, unsigned stride, 268 enum radeon_bo_usage usage); 269boolean evergreen_is_format_supported(struct pipe_screen *screen, 270 enum pipe_format format, 271 enum pipe_texture_target target, 272 unsigned sample_count, 273 unsigned usage); 274 275/* r600_blit.c */ 276void r600_init_blit_functions(struct r600_pipe_context *rctx); 277void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture); 278void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture); 279void r600_flush_depth_textures(struct r600_pipe_context *rctx); 280 281/* r600_buffer.c */ 282bool r600_init_resource(struct r600_screen *rscreen, 283 struct r600_resource *res, 284 unsigned size, unsigned alignment, 285 unsigned bind, unsigned usage); 286struct pipe_resource *r600_buffer_create(struct pipe_screen *screen, 287 const struct pipe_resource *templ); 288struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen, 289 void *ptr, unsigned bytes, 290 unsigned bind); 291void r600_upload_index_buffer(struct r600_pipe_context *rctx, 292 struct pipe_index_buffer *ib, unsigned count); 293 294 295/* r600_pipe.c */ 296void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence, 297 unsigned flags); 298 299/* r600_query.c */ 300void r600_init_query_functions(struct r600_pipe_context *rctx); 301 302/* r600_resource.c */ 303void r600_init_context_resource_functions(struct r600_pipe_context *r600); 304 305/* r600_shader.c */ 306int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader); 307void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader); 308int r600_find_vs_semantic_index(struct r600_shader *vs, 309 struct r600_shader *ps, int id); 310 311/* r600_state.c */ 312void r600_update_sampler_states(struct r600_pipe_context *rctx); 313void r600_init_state_functions(struct r600_pipe_context *rctx); 314void r600_init_config(struct r600_pipe_context *rctx); 315void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); 316void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); 317void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); 318void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx); 319void r600_polygon_offset_update(struct r600_pipe_context *rctx); 320void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx, 321 struct r600_pipe_resource_state *rstate); 322void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, 323 struct r600_resource *rbuffer, 324 unsigned offset, unsigned stride, 325 enum radeon_bo_usage usage); 326void r600_adjust_gprs(struct r600_pipe_context *rctx); 327boolean r600_is_format_supported(struct pipe_screen *screen, 328 enum pipe_format format, 329 enum pipe_texture_target target, 330 unsigned sample_count, 331 unsigned usage); 332 333/* r600_texture.c */ 334void r600_init_screen_texture_functions(struct pipe_screen *screen); 335void r600_init_surface_functions(struct r600_pipe_context *r600); 336uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format, 337 const unsigned char *swizzle_view, 338 uint32_t *word4_p, uint32_t *yuv_format_p); 339unsigned r600_texture_get_offset(struct r600_resource_texture *rtex, 340 unsigned level, unsigned layer); 341 342/* r600_translate.c */ 343void r600_translate_index_buffer(struct r600_pipe_context *r600, 344 struct pipe_index_buffer *ib, 345 unsigned count); 346 347/* r600_state_common.c */ 348void r600_set_index_buffer(struct pipe_context *ctx, 349 const struct pipe_index_buffer *ib); 350void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count, 351 const struct pipe_vertex_buffer *buffers); 352void *r600_create_vertex_elements(struct pipe_context *ctx, 353 unsigned count, 354 const struct pipe_vertex_element *elements); 355void r600_delete_vertex_element(struct pipe_context *ctx, void *state); 356void r600_bind_blend_state(struct pipe_context *ctx, void *state); 357void r600_bind_dsa_state(struct pipe_context *ctx, void *state); 358void r600_bind_rs_state(struct pipe_context *ctx, void *state); 359void r600_delete_rs_state(struct pipe_context *ctx, void *state); 360void r600_sampler_view_destroy(struct pipe_context *ctx, 361 struct pipe_sampler_view *state); 362void r600_delete_state(struct pipe_context *ctx, void *state); 363void r600_bind_vertex_elements(struct pipe_context *ctx, void *state); 364void *r600_create_shader_state(struct pipe_context *ctx, 365 const struct pipe_shader_state *state); 366void r600_bind_ps_shader(struct pipe_context *ctx, void *state); 367void r600_bind_vs_shader(struct pipe_context *ctx, void *state); 368void r600_delete_ps_shader(struct pipe_context *ctx, void *state); 369void r600_delete_vs_shader(struct pipe_context *ctx, void *state); 370void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, 371 struct pipe_resource *buffer); 372struct pipe_stream_output_target * 373r600_create_so_target(struct pipe_context *ctx, 374 struct pipe_resource *buffer, 375 unsigned buffer_offset, 376 unsigned buffer_size); 377void r600_so_target_destroy(struct pipe_context *ctx, 378 struct pipe_stream_output_target *target); 379void r600_set_so_targets(struct pipe_context *ctx, 380 unsigned num_targets, 381 struct pipe_stream_output_target **targets, 382 unsigned append_bitmask); 383void r600_set_pipe_stencil_ref(struct pipe_context *ctx, 384 const struct pipe_stencil_ref *state); 385void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info); 386 387/* 388 * common helpers 389 */ 390static INLINE u32 S_FIXED(float value, u32 frac_bits) 391{ 392 return value * (1 << frac_bits); 393} 394#define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y)) 395 396static inline unsigned r600_tex_aniso_filter(unsigned filter) 397{ 398 if (filter <= 1) return 0; 399 if (filter <= 2) return 1; 400 if (filter <= 4) return 2; 401 if (filter <= 8) return 3; 402 /* else */ return 4; 403} 404 405/* 12.4 fixed-point */ 406static INLINE unsigned r600_pack_float_12p4(float x) 407{ 408 return x <= 0 ? 0 : 409 x >= 4096 ? 0xffff : x * 16; 410} 411 412#endif 413