r600_pipe.h revision bb1f0cf3508630a9a93512c79badf8c493c46743
1/*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 *      Jerome Glisse
25 */
26#ifndef R600_PIPE_H
27#define R600_PIPE_H
28
29#include "../../winsys/radeon/drm/radeon_winsys.h"
30
31#include "pipe/p_state.h"
32#include "pipe/p_screen.h"
33#include "pipe/p_context.h"
34#include "util/u_math.h"
35#include "util/u_slab.h"
36#include "util/u_vbuf.h"
37#include "r600.h"
38#include "r600_public.h"
39#include "r600_shader.h"
40#include "r600_resource.h"
41
42#define R600_MAX_CONST_BUFFERS 1
43#define R600_MAX_CONST_BUFFER_SIZE 4096
44
45#ifdef PIPE_ARCH_BIG_ENDIAN
46#define R600_BIG_ENDIAN 1
47#else
48#define R600_BIG_ENDIAN 0
49#endif
50
51enum r600_pipe_state_id {
52	R600_PIPE_STATE_BLEND = 0,
53	R600_PIPE_STATE_BLEND_COLOR,
54	R600_PIPE_STATE_CONFIG,
55	R600_PIPE_STATE_SEAMLESS_CUBEMAP,
56	R600_PIPE_STATE_CLIP,
57	R600_PIPE_STATE_SCISSOR,
58	R600_PIPE_STATE_VIEWPORT,
59	R600_PIPE_STATE_RASTERIZER,
60	R600_PIPE_STATE_VGT,
61	R600_PIPE_STATE_FRAMEBUFFER,
62	R600_PIPE_STATE_DSA,
63	R600_PIPE_STATE_STENCIL_REF,
64	R600_PIPE_STATE_PS_SHADER,
65	R600_PIPE_STATE_VS_SHADER,
66	R600_PIPE_STATE_CONSTANT,
67	R600_PIPE_STATE_SAMPLER,
68	R600_PIPE_STATE_RESOURCE,
69	R600_PIPE_STATE_POLYGON_OFFSET,
70	R600_PIPE_STATE_FETCH_SHADER,
71	R600_PIPE_NSTATES
72};
73
74struct r600_pipe_fences {
75	struct r600_resource		*bo;
76	unsigned			*data;
77	unsigned			next_index;
78	/* linked list of preallocated blocks */
79	struct list_head		blocks;
80	/* linked list of freed fences */
81	struct list_head		pool;
82	pipe_mutex			mutex;
83};
84
85struct r600_screen {
86	struct pipe_screen		screen;
87	struct radeon_winsys		*ws;
88	unsigned			family;
89	enum chip_class			chip_class;
90	struct radeon_info		info;
91	struct r600_tiling_info		tiling_info;
92	struct util_slab_mempool	pool_buffers;
93	struct r600_pipe_fences		fences;
94
95	unsigned			num_contexts;
96
97	/* for thread-safe write accessing to num_contexts */
98	pipe_mutex			mutex_num_contexts;
99};
100
101struct r600_pipe_sampler_view {
102	struct pipe_sampler_view	base;
103	struct r600_pipe_resource_state		state;
104};
105
106struct r600_pipe_rasterizer {
107	struct r600_pipe_state		rstate;
108	boolean				clamp_vertex_color;
109	boolean				clamp_fragment_color;
110	boolean				flatshade;
111	unsigned			sprite_coord_enable;
112	float				offset_units;
113	float				offset_scale;
114};
115
116struct r600_pipe_blend {
117	struct r600_pipe_state		rstate;
118	unsigned			cb_target_mask;
119};
120
121struct r600_pipe_dsa {
122	struct r600_pipe_state		rstate;
123	unsigned			alpha_ref;
124};
125
126struct r600_vertex_element
127{
128	unsigned			count;
129	struct pipe_vertex_element	elements[PIPE_MAX_ATTRIBS];
130	struct u_vbuf_elements		*vmgr_elements;
131	struct r600_resource		*fetch_shader;
132	unsigned			fs_size;
133	struct r600_pipe_state		rstate;
134	/* if offset is to big for fetch instructio we need to alterate
135	 * offset of vertex buffer, record here the offset need to add
136	 */
137	unsigned			vbuffer_need_offset;
138	unsigned			vbuffer_offset[PIPE_MAX_ATTRIBS];
139};
140
141struct r600_pipe_shader {
142	struct r600_shader		shader;
143	struct r600_pipe_state		rstate;
144	struct r600_resource		*bo;
145	struct r600_resource		*bo_fetch;
146	struct r600_vertex_element	vertex_elements;
147	struct tgsi_token		*tokens;
148	unsigned	sprite_coord_enable;
149	struct pipe_stream_output_info	so;
150	unsigned			so_strides[4];
151};
152
153struct r600_pipe_sampler_state {
154	struct r600_pipe_state		rstate;
155	boolean seamless_cube_map;
156};
157
158/* needed for blitter save */
159#define NUM_TEX_UNITS 16
160
161struct r600_textures_info {
162	struct r600_pipe_sampler_view	*views[NUM_TEX_UNITS];
163	struct r600_pipe_sampler_state	*samplers[NUM_TEX_UNITS];
164	unsigned			n_views;
165	unsigned			n_samplers;
166	bool				samplers_dirty;
167	bool				is_array_sampler[NUM_TEX_UNITS];
168};
169
170struct r600_fence {
171	struct pipe_reference		reference;
172	unsigned			index; /* in the shared bo */
173	struct list_head		head;
174};
175
176#define FENCE_BLOCK_SIZE 16
177
178struct r600_fence_block {
179	struct r600_fence		fences[FENCE_BLOCK_SIZE];
180	struct list_head		head;
181};
182
183#define R600_CONSTANT_ARRAY_SIZE 256
184#define R600_RESOURCE_ARRAY_SIZE 160
185
186struct r600_pipe_context {
187	struct pipe_context		context;
188	struct blitter_context		*blitter;
189	enum radeon_family		family;
190	enum chip_class			chip_class;
191	void				*custom_dsa_flush;
192	struct r600_screen		*screen;
193	struct radeon_winsys		*ws;
194	struct r600_pipe_state		*states[R600_PIPE_NSTATES];
195	struct r600_context		ctx;
196	struct r600_vertex_element	*vertex_elements;
197	struct r600_pipe_resource_state	fs_resource[PIPE_MAX_ATTRIBS];
198	struct pipe_framebuffer_state	framebuffer;
199	unsigned			cb_target_mask;
200	/* for saving when using blitter */
201	struct pipe_stencil_ref		stencil_ref;
202	struct pipe_viewport_state	viewport;
203	struct pipe_clip_state		clip;
204	struct r600_pipe_state		config;
205	struct r600_pipe_shader 	*ps_shader;
206	struct r600_pipe_shader 	*vs_shader;
207	struct r600_pipe_state		vs_const_buffer;
208	struct r600_pipe_resource_state		vs_const_buffer_resource[R600_MAX_CONST_BUFFERS];
209	struct r600_pipe_state		ps_const_buffer;
210	struct r600_pipe_resource_state		ps_const_buffer_resource[R600_MAX_CONST_BUFFERS];
211	struct r600_pipe_rasterizer	*rasterizer;
212	struct r600_pipe_state          vgt;
213	struct r600_pipe_state          spi;
214	struct pipe_query		*current_render_cond;
215	unsigned			current_render_cond_mode;
216	struct pipe_query		*saved_render_cond;
217	unsigned			saved_render_cond_mode;
218	/* shader information */
219	boolean				clamp_vertex_color;
220	boolean				clamp_fragment_color;
221	unsigned			sprite_coord_enable;
222	boolean				export_16bpc;
223	unsigned			alpha_ref;
224	boolean				alpha_ref_dirty;
225	unsigned			nr_cbufs;
226	struct r600_textures_info	vs_samplers;
227	struct r600_textures_info	ps_samplers;
228
229	struct u_vbuf			*vbuf_mgr;
230	struct util_slab_mempool	pool_transfers;
231	boolean				have_depth_texture, have_depth_fb;
232
233	unsigned default_ps_gprs, default_vs_gprs;
234};
235
236/* evergreen_state.c */
237void evergreen_init_state_functions(struct r600_pipe_context *rctx);
238void evergreen_init_config(struct r600_pipe_context *rctx);
239void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
240void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
241void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve);
242void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx);
243void evergreen_polygon_offset_update(struct r600_pipe_context *rctx);
244void evergreen_pipe_init_buffer_resource(struct r600_pipe_context *rctx,
245					 struct r600_pipe_resource_state *rstate);
246void evergreen_pipe_mod_buffer_resource(struct pipe_context *ctx,
247					struct r600_pipe_resource_state *rstate,
248					struct r600_resource *rbuffer,
249					unsigned offset, unsigned stride,
250					enum radeon_bo_usage usage);
251boolean evergreen_is_format_supported(struct pipe_screen *screen,
252				      enum pipe_format format,
253				      enum pipe_texture_target target,
254				      unsigned sample_count,
255				      unsigned usage);
256
257/* r600_blit.c */
258void r600_init_blit_functions(struct r600_pipe_context *rctx);
259void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
260void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
261void r600_flush_depth_textures(struct r600_pipe_context *rctx);
262
263/* r600_buffer.c */
264bool r600_init_resource(struct r600_screen *rscreen,
265			struct r600_resource *res,
266			unsigned size, unsigned alignment,
267			unsigned bind, unsigned usage);
268struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
269					 const struct pipe_resource *templ);
270struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen,
271					      void *ptr, unsigned bytes,
272					      unsigned bind);
273void r600_upload_index_buffer(struct r600_pipe_context *rctx,
274			      struct pipe_index_buffer *ib, unsigned count);
275
276
277/* r600_pipe.c */
278void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
279		unsigned flags);
280
281/* r600_query.c */
282void r600_init_query_functions(struct r600_pipe_context *rctx);
283
284/* r600_resource.c */
285void r600_init_context_resource_functions(struct r600_pipe_context *r600);
286
287/* r600_shader.c */
288int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader);
289void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader);
290int r600_find_vs_semantic_index(struct r600_shader *vs,
291				struct r600_shader *ps, int id);
292
293/* r600_state.c */
294void r600_update_sampler_states(struct r600_pipe_context *rctx);
295void r600_init_state_functions(struct r600_pipe_context *rctx);
296void r600_init_config(struct r600_pipe_context *rctx);
297void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
298void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
299void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve);
300void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx);
301void r600_polygon_offset_update(struct r600_pipe_context *rctx);
302void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx,
303				    struct r600_pipe_resource_state *rstate);
304void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate,
305				   struct r600_resource *rbuffer,
306				   unsigned offset, unsigned stride,
307				   enum radeon_bo_usage usage);
308void r600_adjust_gprs(struct r600_pipe_context *rctx);
309boolean r600_is_format_supported(struct pipe_screen *screen,
310				 enum pipe_format format,
311				 enum pipe_texture_target target,
312				 unsigned sample_count,
313				 unsigned usage);
314
315/* r600_texture.c */
316void r600_init_screen_texture_functions(struct pipe_screen *screen);
317void r600_init_surface_functions(struct r600_pipe_context *r600);
318uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format,
319				  const unsigned char *swizzle_view,
320				  uint32_t *word4_p, uint32_t *yuv_format_p);
321unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
322					unsigned level, unsigned layer);
323
324/* r600_translate.c */
325void r600_translate_index_buffer(struct r600_pipe_context *r600,
326				 struct pipe_index_buffer *ib,
327				 unsigned count);
328
329/* r600_state_common.c */
330void r600_set_index_buffer(struct pipe_context *ctx,
331			   const struct pipe_index_buffer *ib);
332void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
333			     const struct pipe_vertex_buffer *buffers);
334void *r600_create_vertex_elements(struct pipe_context *ctx,
335				  unsigned count,
336				  const struct pipe_vertex_element *elements);
337void r600_delete_vertex_element(struct pipe_context *ctx, void *state);
338void r600_bind_blend_state(struct pipe_context *ctx, void *state);
339void r600_bind_dsa_state(struct pipe_context *ctx, void *state);
340void r600_bind_rs_state(struct pipe_context *ctx, void *state);
341void r600_delete_rs_state(struct pipe_context *ctx, void *state);
342void r600_sampler_view_destroy(struct pipe_context *ctx,
343			       struct pipe_sampler_view *state);
344void r600_delete_state(struct pipe_context *ctx, void *state);
345void r600_bind_vertex_elements(struct pipe_context *ctx, void *state);
346void *r600_create_shader_state(struct pipe_context *ctx,
347			       const struct pipe_shader_state *state);
348void r600_bind_ps_shader(struct pipe_context *ctx, void *state);
349void r600_bind_vs_shader(struct pipe_context *ctx, void *state);
350void r600_delete_ps_shader(struct pipe_context *ctx, void *state);
351void r600_delete_vs_shader(struct pipe_context *ctx, void *state);
352void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
353			      struct pipe_resource *buffer);
354struct pipe_stream_output_target *
355r600_create_so_target(struct pipe_context *ctx,
356		      struct pipe_resource *buffer,
357		      unsigned buffer_offset,
358		      unsigned buffer_size);
359void r600_so_target_destroy(struct pipe_context *ctx,
360			    struct pipe_stream_output_target *target);
361void r600_set_so_targets(struct pipe_context *ctx,
362			 unsigned num_targets,
363			 struct pipe_stream_output_target **targets,
364			 unsigned append_bitmask);
365
366
367void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info);
368
369/*
370 * common helpers
371 */
372static INLINE u32 S_FIXED(float value, u32 frac_bits)
373{
374	return value * (1 << frac_bits);
375}
376#define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
377
378static inline unsigned r600_tex_aniso_filter(unsigned filter)
379{
380	if (filter <= 1)   return 0;
381	if (filter <= 2)   return 1;
382	if (filter <= 4)   return 2;
383	if (filter <= 8)   return 3;
384	 /* else */        return 4;
385}
386
387#endif
388