r600_pipe.h revision c4519c3aec37f5cb3db8fe7e8ead13ae04e792b5
1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Jerome Glisse 25 */ 26#ifndef R600_PIPE_H 27#define R600_PIPE_H 28 29#include "../../winsys/radeon/drm/radeon_winsys.h" 30 31#include "pipe/p_state.h" 32#include "pipe/p_screen.h" 33#include "pipe/p_context.h" 34#include "util/u_math.h" 35#include "util/u_slab.h" 36#include "util/u_vbuf_mgr.h" 37#include "r600.h" 38#include "r600_public.h" 39#include "r600_shader.h" 40#include "r600_resource.h" 41 42#define R600_MAX_CONST_BUFFERS 1 43#define R600_MAX_CONST_BUFFER_SIZE 4096 44 45#ifdef PIPE_ARCH_BIG_ENDIAN 46#define R600_BIG_ENDIAN 1 47#else 48#define R600_BIG_ENDIAN 0 49#endif 50 51enum r600_pipe_state_id { 52 R600_PIPE_STATE_BLEND = 0, 53 R600_PIPE_STATE_BLEND_COLOR, 54 R600_PIPE_STATE_CONFIG, 55 R600_PIPE_STATE_SEAMLESS_CUBEMAP, 56 R600_PIPE_STATE_CLIP, 57 R600_PIPE_STATE_SCISSOR, 58 R600_PIPE_STATE_VIEWPORT, 59 R600_PIPE_STATE_RASTERIZER, 60 R600_PIPE_STATE_VGT, 61 R600_PIPE_STATE_FRAMEBUFFER, 62 R600_PIPE_STATE_DSA, 63 R600_PIPE_STATE_STENCIL_REF, 64 R600_PIPE_STATE_PS_SHADER, 65 R600_PIPE_STATE_VS_SHADER, 66 R600_PIPE_STATE_CONSTANT, 67 R600_PIPE_STATE_SAMPLER, 68 R600_PIPE_STATE_RESOURCE, 69 R600_PIPE_STATE_POLYGON_OFFSET, 70 R600_PIPE_STATE_FETCH_SHADER, 71 R600_PIPE_STATE_SPI, 72 R600_PIPE_NSTATES 73}; 74 75struct r600_screen { 76 struct pipe_screen screen; 77 struct radeon_winsys *ws; 78 struct radeon *radeon; 79 struct r600_tiling_info *tiling_info; 80 struct util_slab_mempool pool_buffers; 81 unsigned num_contexts; 82 83 /* for thread-safe write accessing to num_contexts */ 84 pipe_mutex mutex_num_contexts; 85}; 86 87struct r600_pipe_sampler_view { 88 struct pipe_sampler_view base; 89 struct r600_pipe_resource_state state; 90}; 91 92struct r600_pipe_rasterizer { 93 struct r600_pipe_state rstate; 94 boolean clamp_vertex_color; 95 boolean clamp_fragment_color; 96 boolean flatshade; 97 unsigned sprite_coord_enable; 98 float offset_units; 99 float offset_scale; 100}; 101 102struct r600_pipe_blend { 103 struct r600_pipe_state rstate; 104 unsigned cb_target_mask; 105}; 106 107struct r600_pipe_dsa { 108 struct r600_pipe_state rstate; 109 unsigned alpha_ref; 110}; 111 112struct r600_vertex_element 113{ 114 unsigned count; 115 struct pipe_vertex_element elements[PIPE_MAX_ATTRIBS]; 116 struct u_vbuf_mgr_elements *vmgr_elements; 117 struct r600_bo *fetch_shader; 118 unsigned fs_size; 119 struct r600_pipe_state rstate; 120 /* if offset is to big for fetch instructio we need to alterate 121 * offset of vertex buffer, record here the offset need to add 122 */ 123 unsigned vbuffer_need_offset; 124 unsigned vbuffer_offset[PIPE_MAX_ATTRIBS]; 125}; 126 127struct r600_pipe_shader { 128 struct r600_shader shader; 129 struct r600_pipe_state rstate; 130 struct r600_bo *bo; 131 struct r600_bo *bo_fetch; 132 struct r600_vertex_element vertex_elements; 133 struct tgsi_token *tokens; 134}; 135 136struct r600_pipe_sampler_state { 137 struct r600_pipe_state rstate; 138 boolean seamless_cube_map; 139}; 140 141/* needed for blitter save */ 142#define NUM_TEX_UNITS 16 143 144struct r600_textures_info { 145 struct r600_pipe_sampler_view *views[NUM_TEX_UNITS]; 146 struct r600_pipe_sampler_state *samplers[NUM_TEX_UNITS]; 147 unsigned n_views; 148 unsigned n_samplers; 149 bool samplers_dirty; 150 bool is_array_sampler[NUM_TEX_UNITS]; 151}; 152 153struct r600_fence { 154 struct pipe_reference reference; 155 struct r600_pipe_context *ctx; 156 unsigned index; /* in the shared bo */ 157 struct list_head head; 158}; 159 160#define FENCE_BLOCK_SIZE 16 161 162struct r600_fence_block { 163 struct r600_fence fences[FENCE_BLOCK_SIZE]; 164 struct list_head head; 165}; 166 167struct r600_pipe_fences { 168 struct r600_bo *bo; 169 unsigned *data; 170 unsigned next_index; 171 /* linked list of preallocated blocks */ 172 struct list_head blocks; 173 /* linked list of freed fences */ 174 struct list_head pool; 175}; 176 177#define R600_CONSTANT_ARRAY_SIZE 256 178#define R600_RESOURCE_ARRAY_SIZE 160 179 180struct r600_pipe_context { 181 struct pipe_context context; 182 struct blitter_context *blitter; 183 enum radeon_family family; 184 enum chip_class chip_class; 185 void *custom_dsa_flush; 186 struct r600_screen *screen; 187 struct radeon *radeon; 188 struct r600_pipe_state *states[R600_PIPE_NSTATES]; 189 struct r600_context ctx; 190 struct r600_vertex_element *vertex_elements; 191 struct r600_pipe_resource_state fs_resource[PIPE_MAX_ATTRIBS]; 192 struct pipe_framebuffer_state framebuffer; 193 struct pipe_index_buffer index_buffer; 194 unsigned cb_target_mask; 195 /* for saving when using blitter */ 196 struct pipe_stencil_ref stencil_ref; 197 struct pipe_viewport_state viewport; 198 struct pipe_clip_state clip; 199 struct r600_pipe_state config; 200 struct r600_pipe_shader *ps_shader; 201 struct r600_pipe_shader *vs_shader; 202 struct r600_pipe_state vs_const_buffer; 203 struct r600_pipe_resource_state vs_const_buffer_resource[R600_MAX_CONST_BUFFERS]; 204 struct r600_pipe_state ps_const_buffer; 205 struct r600_pipe_resource_state ps_const_buffer_resource[R600_MAX_CONST_BUFFERS]; 206 struct r600_pipe_rasterizer *rasterizer; 207 struct r600_pipe_state vgt; 208 struct r600_pipe_state spi; 209 struct pipe_query *current_render_cond; 210 unsigned current_render_cond_mode; 211 struct pipe_query *saved_render_cond; 212 unsigned saved_render_cond_mode; 213 /* shader information */ 214 boolean clamp_vertex_color; 215 boolean clamp_fragment_color; 216 boolean spi_dirty; 217 unsigned sprite_coord_enable; 218 boolean flatshade; 219 boolean export_16bpc; 220 unsigned alpha_ref; 221 boolean alpha_ref_dirty; 222 unsigned nr_cbufs; 223 struct r600_textures_info vs_samplers; 224 struct r600_textures_info ps_samplers; 225 226 struct r600_pipe_fences fences; 227 228 struct u_vbuf_mgr *vbuf_mgr; 229 struct util_slab_mempool pool_transfers; 230 boolean blit; 231 boolean have_depth_texture, have_depth_fb; 232 233 unsigned default_ps_gprs, default_vs_gprs; 234}; 235 236struct r600_drawl { 237 struct pipe_draw_info info; 238 struct pipe_context *ctx; 239 unsigned index_size; 240 unsigned index_buffer_offset; 241 struct pipe_resource *index_buffer; 242}; 243 244/* evergreen_state.c */ 245void evergreen_init_state_functions(struct r600_pipe_context *rctx); 246void evergreen_init_config(struct r600_pipe_context *rctx); 247void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); 248void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); 249void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); 250void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx); 251void evergreen_polygon_offset_update(struct r600_pipe_context *rctx); 252void evergreen_pipe_init_buffer_resource(struct r600_pipe_context *rctx, 253 struct r600_pipe_resource_state *rstate); 254void evergreen_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, 255 struct r600_resource *rbuffer, 256 unsigned offset, unsigned stride, 257 enum radeon_bo_usage usage); 258boolean evergreen_is_format_supported(struct pipe_screen *screen, 259 enum pipe_format format, 260 enum pipe_texture_target target, 261 unsigned sample_count, 262 unsigned usage); 263 264/* r600_blit.c */ 265void r600_init_blit_functions(struct r600_pipe_context *rctx); 266void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture); 267void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture); 268void r600_flush_depth_textures(struct r600_pipe_context *rctx); 269 270/* r600_buffer.c */ 271struct pipe_resource *r600_buffer_create(struct pipe_screen *screen, 272 const struct pipe_resource *templ); 273struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen, 274 void *ptr, unsigned bytes, 275 unsigned bind); 276struct pipe_resource *r600_buffer_from_handle(struct pipe_screen *screen, 277 struct winsys_handle *whandle); 278void r600_upload_index_buffer(struct r600_pipe_context *rctx, struct r600_drawl *draw); 279 280 281/* r600_pipe.c */ 282void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence, 283 unsigned flags); 284 285/* r600_query.c */ 286void r600_init_query_functions(struct r600_pipe_context *rctx); 287 288/* r600_resource.c */ 289void r600_init_context_resource_functions(struct r600_pipe_context *r600); 290 291/* r600_shader.c */ 292int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader); 293void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader); 294int r600_find_vs_semantic_index(struct r600_shader *vs, 295 struct r600_shader *ps, int id); 296 297/* r600_state.c */ 298void r600_update_sampler_states(struct r600_pipe_context *rctx); 299void r600_init_state_functions(struct r600_pipe_context *rctx); 300void r600_init_config(struct r600_pipe_context *rctx); 301void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); 302void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); 303void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); 304void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx); 305void r600_polygon_offset_update(struct r600_pipe_context *rctx); 306void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx, 307 struct r600_pipe_resource_state *rstate); 308void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, 309 struct r600_resource *rbuffer, 310 unsigned offset, unsigned stride, 311 enum radeon_bo_usage usage); 312void r600_adjust_gprs(struct r600_pipe_context *rctx); 313boolean r600_is_format_supported(struct pipe_screen *screen, 314 enum pipe_format format, 315 enum pipe_texture_target target, 316 unsigned sample_count, 317 unsigned usage); 318 319/* r600_texture.c */ 320void r600_init_screen_texture_functions(struct pipe_screen *screen); 321void r600_init_surface_functions(struct r600_pipe_context *r600); 322uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format, 323 const unsigned char *swizzle_view, 324 uint32_t *word4_p, uint32_t *yuv_format_p); 325unsigned r600_texture_get_offset(struct r600_resource_texture *rtex, 326 unsigned level, unsigned layer); 327 328/* r600_translate.c */ 329void r600_translate_index_buffer(struct r600_pipe_context *r600, 330 struct pipe_resource **index_buffer, 331 unsigned *index_size, 332 unsigned *start, unsigned count); 333 334/* r600_state_common.c */ 335void r600_set_index_buffer(struct pipe_context *ctx, 336 const struct pipe_index_buffer *ib); 337void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count, 338 const struct pipe_vertex_buffer *buffers); 339void *r600_create_vertex_elements(struct pipe_context *ctx, 340 unsigned count, 341 const struct pipe_vertex_element *elements); 342void r600_delete_vertex_element(struct pipe_context *ctx, void *state); 343void r600_bind_blend_state(struct pipe_context *ctx, void *state); 344void r600_bind_dsa_state(struct pipe_context *ctx, void *state); 345void r600_bind_rs_state(struct pipe_context *ctx, void *state); 346void r600_delete_rs_state(struct pipe_context *ctx, void *state); 347void r600_sampler_view_destroy(struct pipe_context *ctx, 348 struct pipe_sampler_view *state); 349void r600_delete_state(struct pipe_context *ctx, void *state); 350void r600_bind_vertex_elements(struct pipe_context *ctx, void *state); 351void *r600_create_shader_state(struct pipe_context *ctx, 352 const struct pipe_shader_state *state); 353void r600_bind_ps_shader(struct pipe_context *ctx, void *state); 354void r600_bind_vs_shader(struct pipe_context *ctx, void *state); 355void r600_delete_ps_shader(struct pipe_context *ctx, void *state); 356void r600_delete_vs_shader(struct pipe_context *ctx, void *state); 357void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, 358 struct pipe_resource *buffer); 359void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info); 360 361/* 362 * common helpers 363 */ 364static INLINE u32 S_FIXED(float value, u32 frac_bits) 365{ 366 return value * (1 << frac_bits); 367} 368#define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y)) 369 370static inline unsigned r600_tex_aniso_filter(unsigned filter) 371{ 372 if (filter <= 1) return 0; 373 if (filter <= 2) return 1; 374 if (filter <= 4) return 2; 375 if (filter <= 8) return 3; 376 /* else */ return 4; 377} 378 379#endif 380