r600_pipe.h revision d2f24c4d75579acf27cf6d1b0620afa302a1b78f
1/*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 *      Jerome Glisse
25 */
26#ifndef R600_PIPE_H
27#define R600_PIPE_H
28
29enum r600_pipe_state_id {
30	R600_PIPE_STATE_BLEND = 0,
31	R600_PIPE_STATE_BLEND_COLOR,
32	R600_PIPE_STATE_CONFIG,
33	R600_PIPE_STATE_CLIP,
34	R600_PIPE_STATE_SCISSOR,
35	R600_PIPE_STATE_VIEWPORT,
36	R600_PIPE_STATE_RASTERIZER,
37	R600_PIPE_STATE_VGT,
38	R600_PIPE_STATE_FRAMEBUFFER,
39	R600_PIPE_STATE_DSA,
40	R600_PIPE_STATE_STENCIL_REF,
41	R600_PIPE_STATE_PS_SHADER,
42	R600_PIPE_STATE_VS_SHADER,
43	R600_PIPE_STATE_CONSTANT,
44	R600_PIPE_STATE_SAMPLER,
45	R600_PIPE_STATE_RESOURCE,
46	R600_PIPE_NSTATES
47};
48
49struct r600_screen {
50	struct pipe_screen		screen;
51	struct radeon			*radeon;
52};
53
54struct r600_pipe_sampler_view {
55	struct pipe_sampler_view	base;
56	struct r600_pipe_state		state;
57};
58
59struct r600_pipe_rasterizer {
60	struct r600_pipe_state		rstate;
61	bool				flatshade;
62	unsigned			sprite_coord_enable;
63	float				offset_units;
64	float				offset_scale;
65};
66
67struct r600_pipe_blend {
68	struct r600_pipe_state		rstate;
69	unsigned			cb_target_mask;
70};
71
72struct r600_pipe_shader {
73	struct r600_shader		shader;
74	struct r600_pipe_state		rstate;
75	struct radeon_ws_bo		*bo;
76};
77
78struct r600_vertex_element
79{
80	unsigned			count;
81	unsigned			refcount;
82	struct pipe_vertex_element	elements[32];
83};
84
85struct r600_pipe_context {
86	struct pipe_context		context;
87	struct blitter_context		*blitter;
88	struct pipe_framebuffer_state	*pframebuffer;
89	unsigned			family;
90	void				*custom_dsa_flush;
91	struct list_head		query_list; /* fake member for depth remove once merged */
92	struct r600_screen		*screen;
93	struct radeon			*radeon;
94	struct r600_pipe_state		*states[R600_PIPE_NSTATES];
95	struct r600_context		ctx;
96	struct r600_vertex_element	*vertex_elements;
97	struct pipe_framebuffer_state	framebuffer;
98	struct pipe_index_buffer	index_buffer;
99	struct pipe_vertex_buffer	vertex_buffer[PIPE_MAX_ATTRIBS];
100	unsigned			nvertex_buffer;
101	unsigned			cb_target_mask;
102	/* for saving when using blitter */
103	struct pipe_stencil_ref		stencil_ref;
104	struct pipe_viewport_state	viewport;
105	struct pipe_clip_state		clip;
106	unsigned			vs_nconst;
107	unsigned			ps_nconst;
108	struct r600_pipe_state		vs_const[256];
109	struct r600_pipe_state		ps_const[256];
110	struct r600_pipe_state		vs_resource[160];
111	struct r600_pipe_state		ps_resource[160];
112	struct r600_pipe_state		config;
113	struct r600_pipe_shader 	*ps_shader;
114	struct r600_pipe_shader 	*vs_shader;
115	struct r600_pipe_state		vs_const_buffer;
116	struct r600_pipe_state		ps_const_buffer;
117	struct r600_pipe_rasterizer	*rasterizer;
118	/* shader information */
119	unsigned			sprite_coord_enable;
120	bool				flatshade;
121	struct u_upload_mgr		*upload_vb;
122	struct u_upload_mgr		*upload_ib;
123	unsigned			any_user_vbs;
124};
125
126struct r600_drawl {
127	struct pipe_context	*ctx;
128	unsigned		mode;
129	unsigned		min_index;
130	unsigned		max_index;
131	unsigned		index_bias;
132	unsigned		start;
133	unsigned		count;
134	unsigned		index_size;
135	unsigned		index_buffer_offset;
136	struct pipe_resource	*index_buffer;
137};
138
139uint32_t r600_translate_texformat(enum pipe_format format,
140				  const unsigned char *swizzle_view,
141				  uint32_t *word4_p, uint32_t *yuv_format_p);
142
143/* r600_state2.c */
144int r600_pipe_shader_update2(struct pipe_context *ctx, struct r600_pipe_shader *shader);
145int r600_pipe_shader_create2(struct pipe_context *ctx, struct r600_pipe_shader *shader, const struct tgsi_token *tokens);
146int r600_upload_index_buffer2(struct r600_pipe_context *rctx, struct r600_drawl *draw);
147int r600_upload_user_buffers2(struct r600_pipe_context *rctx);
148void r600_translate_index_buffer2(struct r600_pipe_context *r600,
149					struct pipe_resource **index_buffer,
150					unsigned *index_size,
151					unsigned *start, unsigned count);
152
153/* evergreen_state.c */
154void evergreen_init_state_functions2(struct r600_pipe_context *rctx);
155void evergreen_init_config2(struct r600_pipe_context *rctx);
156void evergreen_draw(struct pipe_context *ctx, const struct pipe_draw_info *info);
157void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader);
158void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader);
159
160static INLINE u32 S_FIXED(float value, u32 frac_bits)
161{
162	return value * (1 << frac_bits);
163}
164#define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
165
166#endif
167