r600_pipe.h revision fba685a0995e76f86af5920163297e5c3b32fb4b
1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Jerome Glisse 25 */ 26#ifndef R600_PIPE_H 27#define R600_PIPE_H 28 29#include "../../winsys/radeon/drm/radeon_winsys.h" 30 31#include "pipe/p_state.h" 32#include "pipe/p_screen.h" 33#include "pipe/p_context.h" 34#include "util/u_math.h" 35#include "util/u_slab.h" 36#include "util/u_vbuf.h" 37#include "r600.h" 38#include "r600_public.h" 39#include "r600_shader.h" 40#include "r600_resource.h" 41 42#define R600_MAX_CONST_BUFFERS 1 43#define R600_MAX_CONST_BUFFER_SIZE 4096 44 45#ifdef PIPE_ARCH_BIG_ENDIAN 46#define R600_BIG_ENDIAN 1 47#else 48#define R600_BIG_ENDIAN 0 49#endif 50 51enum r600_pipe_state_id { 52 R600_PIPE_STATE_BLEND = 0, 53 R600_PIPE_STATE_BLEND_COLOR, 54 R600_PIPE_STATE_CONFIG, 55 R600_PIPE_STATE_SEAMLESS_CUBEMAP, 56 R600_PIPE_STATE_CLIP, 57 R600_PIPE_STATE_SCISSOR, 58 R600_PIPE_STATE_VIEWPORT, 59 R600_PIPE_STATE_RASTERIZER, 60 R600_PIPE_STATE_VGT, 61 R600_PIPE_STATE_FRAMEBUFFER, 62 R600_PIPE_STATE_DSA, 63 R600_PIPE_STATE_STENCIL_REF, 64 R600_PIPE_STATE_PS_SHADER, 65 R600_PIPE_STATE_VS_SHADER, 66 R600_PIPE_STATE_CONSTANT, 67 R600_PIPE_STATE_SAMPLER, 68 R600_PIPE_STATE_RESOURCE, 69 R600_PIPE_STATE_POLYGON_OFFSET, 70 R600_PIPE_STATE_FETCH_SHADER, 71 R600_PIPE_NSTATES 72}; 73 74struct r600_screen { 75 struct pipe_screen screen; 76 struct radeon_winsys *ws; 77 unsigned family; 78 enum chip_class chip_class; 79 struct radeon_info info; 80 struct r600_tiling_info tiling_info; 81 struct util_slab_mempool pool_buffers; 82 unsigned num_contexts; 83 84 /* for thread-safe write accessing to num_contexts */ 85 pipe_mutex mutex_num_contexts; 86}; 87 88struct r600_pipe_sampler_view { 89 struct pipe_sampler_view base; 90 struct r600_pipe_resource_state state; 91}; 92 93struct r600_pipe_rasterizer { 94 struct r600_pipe_state rstate; 95 boolean clamp_vertex_color; 96 boolean clamp_fragment_color; 97 boolean flatshade; 98 unsigned sprite_coord_enable; 99 float offset_units; 100 float offset_scale; 101}; 102 103struct r600_pipe_blend { 104 struct r600_pipe_state rstate; 105 unsigned cb_target_mask; 106}; 107 108struct r600_pipe_dsa { 109 struct r600_pipe_state rstate; 110 unsigned alpha_ref; 111}; 112 113struct r600_vertex_element 114{ 115 unsigned count; 116 struct pipe_vertex_element elements[PIPE_MAX_ATTRIBS]; 117 struct u_vbuf_elements *vmgr_elements; 118 struct r600_resource *fetch_shader; 119 unsigned fs_size; 120 struct r600_pipe_state rstate; 121 /* if offset is to big for fetch instructio we need to alterate 122 * offset of vertex buffer, record here the offset need to add 123 */ 124 unsigned vbuffer_need_offset; 125 unsigned vbuffer_offset[PIPE_MAX_ATTRIBS]; 126}; 127 128struct r600_pipe_shader { 129 struct r600_shader shader; 130 struct r600_pipe_state rstate; 131 struct r600_resource *bo; 132 struct r600_resource *bo_fetch; 133 struct r600_vertex_element vertex_elements; 134 struct tgsi_token *tokens; 135 unsigned sprite_coord_enable; 136}; 137 138struct r600_pipe_sampler_state { 139 struct r600_pipe_state rstate; 140 boolean seamless_cube_map; 141}; 142 143/* needed for blitter save */ 144#define NUM_TEX_UNITS 16 145 146struct r600_textures_info { 147 struct r600_pipe_sampler_view *views[NUM_TEX_UNITS]; 148 struct r600_pipe_sampler_state *samplers[NUM_TEX_UNITS]; 149 unsigned n_views; 150 unsigned n_samplers; 151 bool samplers_dirty; 152 bool is_array_sampler[NUM_TEX_UNITS]; 153}; 154 155struct r600_fence { 156 struct pipe_reference reference; 157 struct r600_pipe_context *ctx; 158 unsigned index; /* in the shared bo */ 159 struct list_head head; 160}; 161 162#define FENCE_BLOCK_SIZE 16 163 164struct r600_fence_block { 165 struct r600_fence fences[FENCE_BLOCK_SIZE]; 166 struct list_head head; 167}; 168 169struct r600_pipe_fences { 170 struct r600_resource *bo; 171 unsigned *data; 172 unsigned next_index; 173 /* linked list of preallocated blocks */ 174 struct list_head blocks; 175 /* linked list of freed fences */ 176 struct list_head pool; 177}; 178 179#define R600_CONSTANT_ARRAY_SIZE 256 180#define R600_RESOURCE_ARRAY_SIZE 160 181 182struct r600_pipe_context { 183 struct pipe_context context; 184 struct blitter_context *blitter; 185 enum radeon_family family; 186 enum chip_class chip_class; 187 void *custom_dsa_flush; 188 struct r600_screen *screen; 189 struct radeon_winsys *ws; 190 struct r600_pipe_state *states[R600_PIPE_NSTATES]; 191 struct r600_context ctx; 192 struct r600_vertex_element *vertex_elements; 193 struct r600_pipe_resource_state fs_resource[PIPE_MAX_ATTRIBS]; 194 struct pipe_framebuffer_state framebuffer; 195 unsigned cb_target_mask; 196 /* for saving when using blitter */ 197 struct pipe_stencil_ref stencil_ref; 198 struct pipe_viewport_state viewport; 199 struct pipe_clip_state clip; 200 struct r600_pipe_state config; 201 struct r600_pipe_shader *ps_shader; 202 struct r600_pipe_shader *vs_shader; 203 struct r600_pipe_state vs_const_buffer; 204 struct r600_pipe_resource_state vs_const_buffer_resource[R600_MAX_CONST_BUFFERS]; 205 struct r600_pipe_state ps_const_buffer; 206 struct r600_pipe_resource_state ps_const_buffer_resource[R600_MAX_CONST_BUFFERS]; 207 struct r600_pipe_rasterizer *rasterizer; 208 struct r600_pipe_state vgt; 209 struct r600_pipe_state spi; 210 struct pipe_query *current_render_cond; 211 unsigned current_render_cond_mode; 212 struct pipe_query *saved_render_cond; 213 unsigned saved_render_cond_mode; 214 /* shader information */ 215 boolean clamp_vertex_color; 216 boolean clamp_fragment_color; 217 unsigned sprite_coord_enable; 218 boolean export_16bpc; 219 unsigned alpha_ref; 220 boolean alpha_ref_dirty; 221 unsigned nr_cbufs; 222 struct r600_textures_info vs_samplers; 223 struct r600_textures_info ps_samplers; 224 225 struct r600_pipe_fences fences; 226 227 struct u_vbuf *vbuf_mgr; 228 struct util_slab_mempool pool_transfers; 229 boolean have_depth_texture, have_depth_fb; 230 231 unsigned default_ps_gprs, default_vs_gprs; 232}; 233 234/* evergreen_state.c */ 235void evergreen_init_state_functions(struct r600_pipe_context *rctx); 236void evergreen_init_config(struct r600_pipe_context *rctx); 237void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); 238void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); 239void evergreen_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); 240void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx); 241void evergreen_polygon_offset_update(struct r600_pipe_context *rctx); 242void evergreen_pipe_init_buffer_resource(struct r600_pipe_context *rctx, 243 struct r600_pipe_resource_state *rstate); 244void evergreen_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, 245 struct r600_resource *rbuffer, 246 unsigned offset, unsigned stride, 247 enum radeon_bo_usage usage); 248boolean evergreen_is_format_supported(struct pipe_screen *screen, 249 enum pipe_format format, 250 enum pipe_texture_target target, 251 unsigned sample_count, 252 unsigned usage); 253 254/* r600_blit.c */ 255void r600_init_blit_functions(struct r600_pipe_context *rctx); 256void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture); 257void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture); 258void r600_flush_depth_textures(struct r600_pipe_context *rctx); 259 260/* r600_buffer.c */ 261bool r600_init_resource(struct r600_screen *rscreen, 262 struct r600_resource *res, 263 unsigned size, unsigned alignment, 264 unsigned bind, unsigned usage); 265struct pipe_resource *r600_buffer_create(struct pipe_screen *screen, 266 const struct pipe_resource *templ); 267struct pipe_resource *r600_user_buffer_create(struct pipe_screen *screen, 268 void *ptr, unsigned bytes, 269 unsigned bind); 270void r600_upload_index_buffer(struct r600_pipe_context *rctx, 271 struct pipe_index_buffer *ib, unsigned count); 272 273 274/* r600_pipe.c */ 275void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence, 276 unsigned flags); 277 278/* r600_query.c */ 279void r600_init_query_functions(struct r600_pipe_context *rctx); 280 281/* r600_resource.c */ 282void r600_init_context_resource_functions(struct r600_pipe_context *r600); 283 284/* r600_shader.c */ 285int r600_pipe_shader_create(struct pipe_context *ctx, struct r600_pipe_shader *shader); 286void r600_pipe_shader_destroy(struct pipe_context *ctx, struct r600_pipe_shader *shader); 287int r600_find_vs_semantic_index(struct r600_shader *vs, 288 struct r600_shader *ps, int id); 289 290/* r600_state.c */ 291void r600_update_sampler_states(struct r600_pipe_context *rctx); 292void r600_init_state_functions(struct r600_pipe_context *rctx); 293void r600_init_config(struct r600_pipe_context *rctx); 294void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader *shader); 295void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader); 296void r600_fetch_shader(struct pipe_context *ctx, struct r600_vertex_element *ve); 297void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx); 298void r600_polygon_offset_update(struct r600_pipe_context *rctx); 299void r600_pipe_init_buffer_resource(struct r600_pipe_context *rctx, 300 struct r600_pipe_resource_state *rstate); 301void r600_pipe_mod_buffer_resource(struct r600_pipe_resource_state *rstate, 302 struct r600_resource *rbuffer, 303 unsigned offset, unsigned stride, 304 enum radeon_bo_usage usage); 305void r600_adjust_gprs(struct r600_pipe_context *rctx); 306boolean r600_is_format_supported(struct pipe_screen *screen, 307 enum pipe_format format, 308 enum pipe_texture_target target, 309 unsigned sample_count, 310 unsigned usage); 311 312/* r600_texture.c */ 313void r600_init_screen_texture_functions(struct pipe_screen *screen); 314void r600_init_surface_functions(struct r600_pipe_context *r600); 315uint32_t r600_translate_texformat(struct pipe_screen *screen, enum pipe_format format, 316 const unsigned char *swizzle_view, 317 uint32_t *word4_p, uint32_t *yuv_format_p); 318unsigned r600_texture_get_offset(struct r600_resource_texture *rtex, 319 unsigned level, unsigned layer); 320 321/* r600_translate.c */ 322void r600_translate_index_buffer(struct r600_pipe_context *r600, 323 struct pipe_index_buffer *ib, 324 unsigned count); 325 326/* r600_state_common.c */ 327void r600_set_index_buffer(struct pipe_context *ctx, 328 const struct pipe_index_buffer *ib); 329void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count, 330 const struct pipe_vertex_buffer *buffers); 331void *r600_create_vertex_elements(struct pipe_context *ctx, 332 unsigned count, 333 const struct pipe_vertex_element *elements); 334void r600_delete_vertex_element(struct pipe_context *ctx, void *state); 335void r600_bind_blend_state(struct pipe_context *ctx, void *state); 336void r600_bind_dsa_state(struct pipe_context *ctx, void *state); 337void r600_bind_rs_state(struct pipe_context *ctx, void *state); 338void r600_delete_rs_state(struct pipe_context *ctx, void *state); 339void r600_sampler_view_destroy(struct pipe_context *ctx, 340 struct pipe_sampler_view *state); 341void r600_delete_state(struct pipe_context *ctx, void *state); 342void r600_bind_vertex_elements(struct pipe_context *ctx, void *state); 343void *r600_create_shader_state(struct pipe_context *ctx, 344 const struct pipe_shader_state *state); 345void r600_bind_ps_shader(struct pipe_context *ctx, void *state); 346void r600_bind_vs_shader(struct pipe_context *ctx, void *state); 347void r600_delete_ps_shader(struct pipe_context *ctx, void *state); 348void r600_delete_vs_shader(struct pipe_context *ctx, void *state); 349void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index, 350 struct pipe_resource *buffer); 351void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info); 352 353/* 354 * common helpers 355 */ 356static INLINE u32 S_FIXED(float value, u32 frac_bits) 357{ 358 return value * (1 << frac_bits); 359} 360#define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y)) 361 362static inline unsigned r600_tex_aniso_filter(unsigned filter) 363{ 364 if (filter <= 1) return 0; 365 if (filter <= 2) return 1; 366 if (filter <= 4) return 2; 367 if (filter <= 8) return 3; 368 /* else */ return 4; 369} 370 371#endif 372