1
2/* To compile:
3   aarch64-linux-gnu-gcc -Wall -g -O0 -o memory none/tests/arm64/memory.c
4*/
5
6#include <stdio.h>
7#include <malloc.h>  // memalign
8#include <string.h>  // memset
9#include <assert.h>
10
11typedef  unsigned char           UChar;
12typedef  unsigned short int      UShort;
13typedef  unsigned int            UInt;
14typedef  signed int              Int;
15typedef  unsigned char           UChar;
16typedef  signed long long int    Long;
17typedef  unsigned long long int  ULong;
18
19typedef  unsigned char           Bool;
20#define False ((Bool)0)
21#define True  ((Bool)1)
22
23__attribute__((noinline))
24static void* memalign16(size_t szB)
25{
26   void* x;
27   x = memalign(16, szB);
28   assert(x);
29   assert(0 == ((16-1) & (unsigned long)x));
30   return x;
31}
32
33static inline UChar randUChar ( void )
34{
35   static UInt seed = 80021;
36   seed = 1103515245 * seed + 12345;
37   return (seed >> 17) & 0xFF;
38}
39
40static ULong randULong ( void )
41{
42   Int i;
43   ULong r = 0;
44   for (i = 0; i < 8; i++) {
45      r = (r << 8) | (ULong)(0xFF & randUChar());
46   }
47   return r;
48}
49
50
51// Same as TESTINST2 except it doesn't print the RN value, since
52// that may differ between runs (it's a stack address).  Also,
53// claim it trashes x28 so that can be used as scratch if needed.
54#define TESTINST2_hide2(instruction, RNval, RD, RN, carryin) \
55{ \
56   ULong out; \
57   ULong nzcv_out; \
58   ULong nzcv_in = (carryin ? (1<<29) : 0); \
59   __asm__ __volatile__( \
60      "msr nzcv,%3;" \
61      "mov " #RN ",%2;" \
62      instruction ";" \
63      "mov %0," #RD ";" \
64      "mrs %1,nzcv;" \
65      : "=&r" (out), "=&r" (nzcv_out) \
66      : "r" (RNval), "r" (nzcv_in) \
67      : #RD, #RN, "cc", "memory", "x28"  \
68   ); \
69   printf("%s :: rd %016llx rn (hidden), " \
70          "cin %d, nzcv %08llx %c%c%c%c\n",       \
71      instruction, out, \
72      carryin ? 1 : 0, \
73      nzcv_out & 0xffff0000, \
74      ((1<<31) & nzcv_out) ? 'N' : ' ', \
75      ((1<<30) & nzcv_out) ? 'Z' : ' ', \
76      ((1<<29) & nzcv_out) ? 'C' : ' ', \
77      ((1<<28) & nzcv_out) ? 'V' : ' ' \
78      ); \
79}
80
81#define TESTINST3_hide2and3(instruction, RMval, RNval, RD, RM, RN, carryin) \
82{ \
83   ULong out; \
84   ULong nzcv_out; \
85   ULong nzcv_in = (carryin ? (1<<29) : 0); \
86   __asm__ __volatile__( \
87      "msr nzcv,%4;" \
88      "mov " #RM ",%2;" \
89      "mov " #RN ",%3;" \
90      instruction ";" \
91      "mov %0," #RD ";" \
92      "mrs %1,nzcv;" \
93      : "=&r" (out), "=&r" (nzcv_out) \
94      : "r" (RMval), "r" (RNval), "r" (nzcv_in) \
95      : #RD, #RM, #RN, "cc", "memory" \
96   ); \
97   printf("%s :: rd %016llx rm (hidden), rn (hidden), " \
98          "cin %d, nzcv %08llx %c%c%c%c\n",       \
99      instruction, out, \
100      carryin ? 1 : 0, \
101      nzcv_out & 0xffff0000, \
102      ((1<<31) & nzcv_out) ? 'N' : ' ', \
103      ((1<<30) & nzcv_out) ? 'Z' : ' ', \
104      ((1<<29) & nzcv_out) ? 'C' : ' ', \
105      ((1<<28) & nzcv_out) ? 'V' : ' ' \
106      ); \
107}
108
109
110////////////////////////////////////////////////////////////////
111////////////////////////////////////////////////////////////////
112////////////////////////////////////////////////////////////////
113//                                                            //
114// test_memory_old                                            //
115//                                                            //
116////////////////////////////////////////////////////////////////
117////////////////////////////////////////////////////////////////
118////////////////////////////////////////////////////////////////
119
120static __attribute((noinline)) void test_memory_old ( void )
121{
122printf("Integer loads\n");
123
124unsigned char area[512];
125
126#define RESET \
127   do { int i; for (i = 0; i < sizeof(area); i++) \
128          area[i] = i | 0x80; \
129   } while (0)
130
131#define AREA_MID (((ULong)(&area[(sizeof(area)/2)-1])) & (~(ULong)0xF))
132
133RESET;
134
135////////////////////////////////////////////////////////////////
136printf("LDR,STR (immediate, uimm12) (STR cases are MISSING)");
137TESTINST2_hide2("ldr  x21, [x22, #24]", AREA_MID, x21,x22,0);
138TESTINST2_hide2("ldr  w21, [x22, #20]", AREA_MID, x21,x22,0);
139TESTINST2_hide2("ldrh w21, [x22, #44]", AREA_MID, x21,x22,0);
140TESTINST2_hide2("ldrb w21, [x22, #56]", AREA_MID, x21,x22,0);
141
142////////////////////////////////////////////////////////////////
143printf("LDUR,STUR (immediate, simm9) (STR cases and wb check are MISSING)\n");
144TESTINST2_hide2("ldr x21, [x22], #-24", AREA_MID, x21,x22,0);
145TESTINST2_hide2("ldr x21, [x22, #-40]!", AREA_MID, x21,x22,0);
146TESTINST2_hide2("ldr x21, [x22, #-48]", AREA_MID, x21,x22,0);
147printf("LDUR,STUR (immediate, simm9): STR cases are MISSING");
148
149////////////////////////////////////////////////////////////////
150// TESTINST2_hide2 allows use of x28 as scratch
151printf("LDP,STP (immediate, simm7) (STR cases and wb check is MISSING)\n");
152
153TESTINST2_hide2("ldp x21, x28, [x22], #-24 ; add x21,x21,x28", AREA_MID, x21,x22,0);
154TESTINST2_hide2("ldp x21, x28, [x22], #-24 ; eor x21,x21,x28", AREA_MID, x21,x22,0);
155TESTINST2_hide2("ldp x21, x28, [x22, #-40]! ; add x21,x21,x28", AREA_MID, x21,x22,0);
156TESTINST2_hide2("ldp x21, x28, [x22, #-40]! ; eor x21,x21,x28", AREA_MID, x21,x22,0);
157TESTINST2_hide2("ldp x21, x28, [x22, #-40] ; add x21,x21,x28", AREA_MID, x21,x22,0);
158TESTINST2_hide2("ldp x21, x28, [x22, #-40] ; eor x21,x21,x28", AREA_MID, x21,x22,0);
159
160TESTINST2_hide2("ldp w21, w28, [x22], #-24 ; add x21,x21,x28", AREA_MID, x21,x22,0);
161TESTINST2_hide2("ldp w21, w28, [x22], #-24 ; eor x21,x21,x28", AREA_MID, x21,x22,0);
162TESTINST2_hide2("ldp w21, w28, [x22, #-40]! ; add x21,x21,x28", AREA_MID, x21,x22,0);
163TESTINST2_hide2("ldp w21, w28, [x22, #-40]! ; eor x21,x21,x28", AREA_MID, x21,x22,0);
164TESTINST2_hide2("ldp w21, w28, [x22, #-40] ; add x21,x21,x28", AREA_MID, x21,x22,0);
165TESTINST2_hide2("ldp w21, w28, [x22, #-40] ; eor x21,x21,x28", AREA_MID, x21,x22,0);
166
167////////////////////////////////////////////////////////////////
168// This is a bit tricky.  We load the value from just before and
169// just after the actual instruction.  Because TESTINSN2_hide2
170// generates two fixed insns either side of the test insn, these
171// should be constant and hence "safe" to check.
172
173printf("LDR (literal, int reg)\n");
174TESTINST2_hide2("xyzzy00: ldr  x21, xyzzy00 - 8", AREA_MID, x21,x22,0);
175TESTINST2_hide2("xyzzy01: ldr  x21, xyzzy01 + 0", AREA_MID, x21,x22,0);
176TESTINST2_hide2("xyzzy02: ldr  x21, xyzzy02 + 8", AREA_MID, x21,x22,0);
177
178TESTINST2_hide2("xyzzy03: ldr  x21, xyzzy03 - 4", AREA_MID, x21,x22,0);
179TESTINST2_hide2("xyzzy04: ldr  x21, xyzzy04 + 0", AREA_MID, x21,x22,0);
180TESTINST2_hide2("xyzzy05: ldr  x21, xyzzy05 + 4", AREA_MID, x21,x22,0);
181
182////////////////////////////////////////////////////////////////
183printf("{LD,ST}R (integer register) (entirely MISSING)\n");
184
185////////////////////////////////////////////////////////////////
186printf("LDRS{B,H,W} (uimm12)\n");
187TESTINST2_hide2("ldrsw x21, [x22, #24]", AREA_MID, x21,x22,0);
188TESTINST2_hide2("ldrsh x21, [x22, #20]", AREA_MID, x21,x22,0);
189TESTINST2_hide2("ldrsh w21, [x22, #44]", AREA_MID, x21,x22,0);
190TESTINST2_hide2("ldrsb x21, [x22, #88]", AREA_MID, x21,x22,0);
191TESTINST2_hide2("ldrsb w21, [x22, #56]", AREA_MID, x21,x22,0);
192
193////////////////////////////////////////////////////////////////
194printf("LDRS{B,H,W} (simm9, upd) (upd check is MISSING)\n");
195TESTINST2_hide2("ldrsw x21, [x22, #-24]!", AREA_MID, x21,x22,0);
196TESTINST2_hide2("ldrsh x21, [x22, #-20]!", AREA_MID, x21,x22,0);
197TESTINST2_hide2("ldrsh w21, [x22, #-44]!", AREA_MID, x21,x22,0);
198TESTINST2_hide2("ldrsb x21, [x22, #-88]!", AREA_MID, x21,x22,0);
199TESTINST2_hide2("ldrsb w21, [x22, #-56]!", AREA_MID, x21,x22,0);
200
201TESTINST2_hide2("ldrsw x21, [x22], #-24", AREA_MID, x21,x22,0);
202TESTINST2_hide2("ldrsh x21, [x22], #-20", AREA_MID, x21,x22,0);
203TESTINST2_hide2("ldrsh w21, [x22], #-44", AREA_MID, x21,x22,0);
204TESTINST2_hide2("ldrsb x21, [x22], #-88", AREA_MID, x21,x22,0);
205TESTINST2_hide2("ldrsb w21, [x22], #-56", AREA_MID, x21,x22,0);
206
207////////////////////////////////////////////////////////////////
208printf("LDRS{B,H,W} (simm9, noUpd)\n");
209TESTINST2_hide2("ldrsw x21, [x22, #-24]", AREA_MID, x21,x22,0);
210TESTINST2_hide2("ldrsh x21, [x22, #-20]", AREA_MID, x21,x22,0);
211TESTINST2_hide2("ldrsh w21, [x22, #-44]", AREA_MID, x21,x22,0);
212TESTINST2_hide2("ldrsb x21, [x22, #-88]", AREA_MID, x21,x22,0);
213TESTINST2_hide2("ldrsb w21, [x22, #-56]", AREA_MID, x21,x22,0);
214
215////////////////////////////////////////////////////////////////
216printf("LDP,STP (immediate, simm7) (FP&VEC) (entirely MISSING)\n");
217
218////////////////////////////////////////////////////////////////
219printf("{LD,ST}R (vector register) (entirely MISSING)\n");
220
221////////////////////////////////////////////////////////////////
222printf("LDRS{B,H,W} (integer register, SX)\n");
223
224TESTINST3_hide2and3("ldrsw x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
225TESTINST3_hide2and3("ldrsw x21, [x22,x23, lsl #2]", AREA_MID, 5, x21,x22,x23,0);
226TESTINST3_hide2and3("ldrsw x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
227TESTINST3_hide2and3("ldrsw x21, [x22,w23,uxtw #2]", AREA_MID, 5, x21,x22,x23,0);
228TESTINST3_hide2and3("ldrsw x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
229TESTINST3_hide2and3("ldrsw x21, [x22,w23,sxtw #2]", AREA_MID, -5ULL, x21,x22,x23,0);
230
231TESTINST3_hide2and3("ldrsh x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
232TESTINST3_hide2and3("ldrsh x21, [x22,x23, lsl #1]", AREA_MID, 5, x21,x22,x23,0);
233TESTINST3_hide2and3("ldrsh x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
234TESTINST3_hide2and3("ldrsh x21, [x22,w23,uxtw #1]", AREA_MID, 5, x21,x22,x23,0);
235TESTINST3_hide2and3("ldrsh x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
236TESTINST3_hide2and3("ldrsh x21, [x22,w23,sxtw #1]", AREA_MID, -5ULL, x21,x22,x23,0);
237
238TESTINST3_hide2and3("ldrsh w21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
239TESTINST3_hide2and3("ldrsh w21, [x22,x23, lsl #1]", AREA_MID, 5, x21,x22,x23,0);
240TESTINST3_hide2and3("ldrsh w21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
241TESTINST3_hide2and3("ldrsh w21, [x22,w23,uxtw #1]", AREA_MID, 5, x21,x22,x23,0);
242TESTINST3_hide2and3("ldrsh w21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
243TESTINST3_hide2and3("ldrsh w21, [x22,w23,sxtw #1]", AREA_MID, -5ULL, x21,x22,x23,0);
244
245TESTINST3_hide2and3("ldrsb x21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
246TESTINST3_hide2and3("ldrsb x21, [x22,x23, lsl #0]", AREA_MID, 5, x21,x22,x23,0);
247TESTINST3_hide2and3("ldrsb x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
248TESTINST3_hide2and3("ldrsb x21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
249TESTINST3_hide2and3("ldrsb x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
250TESTINST3_hide2and3("ldrsb x21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
251
252TESTINST3_hide2and3("ldrsb w21, [x22,x23]", AREA_MID, 5, x21,x22,x23,0);
253TESTINST3_hide2and3("ldrsb w21, [x22,x23, lsl #0]", AREA_MID, 5, x21,x22,x23,0);
254TESTINST3_hide2and3("ldrsb w21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
255TESTINST3_hide2and3("ldrsb w21, [x22,w23,uxtw #0]", AREA_MID, 5, x21,x22,x23,0);
256TESTINST3_hide2and3("ldrsb w21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
257TESTINST3_hide2and3("ldrsb w21, [x22,w23,sxtw #0]", AREA_MID, -5ULL, x21,x22,x23,0);
258
259////////////////////////////////////////////////////////////////
260printf("LDR/STR (immediate, SIMD&FP, unsigned offset) (entirely MISSING)\n");
261
262////////////////////////////////////////////////////////////////
263printf("LDR/STR (immediate, SIMD&FP, pre/post index) (entirely MISSING)\n");
264
265////////////////////////////////////////////////////////////////
266printf("LDUR/STUR (unscaled offset, SIMD&FP) (entirely MISSING)\n");
267
268////////////////////////////////////////////////////////////////
269printf("LDR (literal, SIMD&FP) (entirely MISSING)\n");
270
271////////////////////////////////////////////////////////////////
272printf("LD1/ST1 (single structure, no offset) (entirely MISSING)\n");
273
274////////////////////////////////////////////////////////////////
275printf("LD1/ST1 (single structure, post index) (entirely MISSING)\n");
276
277////////////////////////////////////////////////////////////////
278printf("LD{,A}X{R,RH,RB} (entirely MISSING)\n");
279
280////////////////////////////////////////////////////////////////
281printf("ST{,L}X{R,RH,RB} (entirely MISSING)\n");
282
283////////////////////////////////////////////////////////////////
284printf("LDA{R,RH,RB}\n");
285TESTINST2_hide2("ldar  x21, [x22]", AREA_MID, x21,x22,0);
286TESTINST2_hide2("ldar  w21, [x22]", AREA_MID, x21,x22,0);
287TESTINST2_hide2("ldarh w21, [x22]", AREA_MID, x21,x22,0);
288TESTINST2_hide2("ldarb w21, [x22]", AREA_MID, x21,x22,0);
289
290////////////////////////////////////////////////////////////////
291printf("STL{R,RH,RB} (entirely MISSING)\n");
292} /* end of test_memory_old() */
293
294
295////////////////////////////////////////////////////////////////
296////////////////////////////////////////////////////////////////
297////////////////////////////////////////////////////////////////
298//                                                            //
299// test_memory_new                                            //
300//                                                            //
301////////////////////////////////////////////////////////////////
302////////////////////////////////////////////////////////////////
303////////////////////////////////////////////////////////////////
304
305static void show_block_xor ( UChar* block1, UChar* block2, Int n )
306{
307   Int i;
308   printf("  ");
309   for (i = 0; i < n; i++) {
310      if (i > 0 && 0 == (i & 15)) printf("\n  ");
311      if (0 == (i & 15)) printf("[%3d]  ", i);
312      UInt diff = 0xFF & (UInt)(block1[i] - block2[i]);
313      if (diff == 0)
314         printf(".. ");
315      else
316         printf("%02x ", diff);
317   }
318   printf("\n");
319}
320
321
322// In: rand:
323//       memory area, xferred vec regs, xferred int regs,
324//     caller spec:
325//       addr reg1, addr reg2
326//
327// Out: memory area, xferred vec regs, xferred int regs, addr reg1, addr reg2
328//
329// INSN may mention the following regs as containing load/store data:
330//     x13 x23 v17 v18 v19 v20
331// and
332//     x5 as containing the base address
333//     x6 as containing an offset, if required
334// A memory area is filled with random data, and x13, x23, v17, v18, v19, v20
335// are loaded with random data too.  INSN is then executed, with
336// x5 set to the middle of the memory area + AREG1OFF, and x6 set to AREG2VAL.
337//
338// What is printed out: the XOR of the new and old versions of the
339// following:
340//    the memory area
341//    x13 x23 v17 v18 v19 v20
342// and the SUB of the new and old values of the following:
343//    x5 x6
344// If the insn modifies its base register then (obviously) the x5 "new - old"
345// value will be nonzero.
346
347#define MEM_TEST(INSN, AREG1OFF, AREG2VAL) { \
348  int i; \
349  const int N = 256; \
350  UChar* area = memalign16(N); \
351  UChar area2[N]; \
352  for (i = 0; i < N; i++) area[i] = area2[i] = randUChar(); \
353  ULong block[12]; \
354  /* 0:x13      1:x23      2:v17.d[0] 3:v17.d[1] 4:v18.d[0] 5:v18.d[1] */ \
355  /* 6:v19.d[0] 7:v19.d[1] 8:v20.d[0] 9:v20.d[1] 10:x5      11:x6 */ \
356  for (i = 0; i < 12; i++) block[i] = randULong(); \
357  block[10] = (ULong)(&area[128]) + (Long)(Int)AREG1OFF; \
358  block[11] = (Long)AREG2VAL; \
359  ULong block2[12]; \
360  for (i = 0; i < 12; i++) block2[i] = block[i]; \
361  __asm__ __volatile__( \
362  "ldr x13, [%0, #0]  ; " \
363  "ldr x23, [%0, #8]  ; " \
364  "ldr q17, [%0, #16] ; " \
365  "ldr q18, [%0, #32] ; " \
366  "ldr q19, [%0, #48] ; " \
367  "ldr q20, [%0, #64] ; " \
368  "ldr x5,  [%0, #80] ; " \
369  "ldr x6,  [%0, #88] ; " \
370  INSN " ; " \
371  "str x13, [%0, #0]  ; " \
372  "str x23, [%0, #8]  ; " \
373  "str q17, [%0, #16] ; " \
374  "str q18, [%0, #32] ; " \
375  "str q19, [%0, #48] ; " \
376  "str q20, [%0, #64] ; " \
377  "str x5,  [%0, #80] ; " \
378  "str x6,  [%0, #88] ; " \
379  : : "r"(&block[0]) : "x5", "x6", "x13", "x23", \
380                       "v17", "v18", "v19", "v20", "memory", "cc" \
381  ); \
382  printf("%s  with  x5 = middle_of_block+%lld,  x6=%lld\n", \
383         INSN, (Long)AREG1OFF, (Long)AREG2VAL); \
384  show_block_xor(&area2[0], area, 256); \
385  printf("  %016llx  x13      (xor, xfer intreg #1)\n", block[0] ^ block2[0]); \
386  printf("  %016llx  x23      (xor, xfer intreg #2)\n", block[1] ^ block2[1]); \
387  printf("  %016llx  v17.d[0] (xor, xfer vecreg #1)\n", block[2] ^ block2[2]); \
388  printf("  %016llx  v17.d[1] (xor, xfer vecreg #1)\n", block[3] ^ block2[3]); \
389  printf("  %016llx  v18.d[0] (xor, xfer vecreg #2)\n", block[4] ^ block2[4]); \
390  printf("  %016llx  v18.d[1] (xor, xfer vecreg #2)\n", block[5] ^ block2[5]); \
391  printf("  %016llx  v19.d[0] (xor, xfer vecreg #3)\n", block[6] ^ block2[6]); \
392  printf("  %016llx  v19.d[1] (xor, xfer vecreg #3)\n", block[7] ^ block2[7]); \
393  printf("  %016llx  v20.d[0] (xor, xfer vecreg #3)\n", block[8] ^ block2[8]); \
394  printf("  %016llx  v20.d[1] (xor, xfer vecreg #3)\n", block[9] ^ block2[9]); \
395  printf("  %16lld  x5       (sub, base reg)\n",     block[10] - block2[10]); \
396  printf("  %16lld  x6       (sub, index reg)\n",    block[11] - block2[11]); \
397  printf("\n"); \
398  free(area); \
399  }
400
401
402static __attribute__((noinline)) void test_memory_new ( void )
403{
404////////////////////////////////////////////////////////////////
405printf("LDR,STR (immediate, uimm12)");
406MEM_TEST("ldr  x13, [x5, #24]", -1, 0);
407MEM_TEST("ldr  w13, [x5, #20]", 1, 0);
408MEM_TEST("ldrh w13, [x5, #44]", 2, 0);
409MEM_TEST("ldrb w13, [x5, #56]", 3, 0);
410MEM_TEST("str  x13, [x5, #24]", -3, 0);
411MEM_TEST("str  w13, [x5, #20]", 5, 0);
412MEM_TEST("strh w13, [x5, #44]", 6, 0);
413MEM_TEST("strb w13, [x5, #56]", 7, 0);
414
415////////////////////////////////////////////////////////////////
416printf("LDUR,STUR (immediate, simm9)\n");
417MEM_TEST("ldr x13, [x5], #-24",  0, 0);
418MEM_TEST("ldr x13, [x5, #-40]!", 0, 0);
419MEM_TEST("ldr x13, [x5, #-48]",  0, 0);
420MEM_TEST("str x13, [x5], #-24",  0, 0);
421MEM_TEST("str x13, [x5, #-40]!", 0, 0);
422MEM_TEST("str x13, [x5, #-48]",  0, 0);
423
424////////////////////////////////////////////////////////////////
425printf("LDP,STP (immediate, simm7)\n");
426MEM_TEST("ldp x13, x23, [x5], #-24",   0, 0);
427MEM_TEST("ldp x13, x23, [x5, #-40]!",  0, 0);
428MEM_TEST("ldp x13, x23, [x5, #-40]",   0, 0);
429MEM_TEST("stp x13, x23, [x5], #-24",   0, 0);
430MEM_TEST("stp x13, x23, [x5, #-40]!",  0, 0);
431MEM_TEST("stp x13, x23, [x5, #-40]",   0, 0);
432
433MEM_TEST("ldp w13, w23, [x5], #-24",   0, 0);
434MEM_TEST("ldp w13, w23, [x5, #-40]!",  0, 0);
435MEM_TEST("ldp w13, w23, [x5, #-40]",   0, 0);
436MEM_TEST("stp w13, w23, [x5], #-24",   0, 0);
437MEM_TEST("stp w13, w23, [x5, #-40]!",  0, 0);
438MEM_TEST("stp w13, w23, [x5, #-40]",   0, 0);
439
440////////////////////////////////////////////////////////////////
441printf("LDR (literal, int reg) (done above by test_memory_old)\n");
442
443////////////////////////////////////////////////////////////////
444printf("{LD,ST}R (integer register)\n");
445MEM_TEST("str x13, [x5, x6]",          12, -4);
446MEM_TEST("str x13, [x5, x6, lsl #3]",  12, -4);
447MEM_TEST("str x13, [x5, w6, uxtw]",    12,  4);
448MEM_TEST("str x13, [x5, w6, uxtw #3]", 12,  4);
449MEM_TEST("str x13, [x5, w6, sxtw]",    12,  4);
450MEM_TEST("str x13, [x5, w6, sxtw #3]", 12,  -4);
451MEM_TEST("ldr x13, [x5, x6]",          12, -4);
452MEM_TEST("ldr x13, [x5, x6, lsl #3]",  12, -4);
453MEM_TEST("ldr x13, [x5, w6, uxtw]",    12,  4);
454MEM_TEST("ldr x13, [x5, w6, uxtw #3]", 12,  4);
455MEM_TEST("ldr x13, [x5, w6, sxtw]",    12,  4);
456MEM_TEST("ldr x13, [x5, w6, sxtw #3]", 12,  -4);
457
458MEM_TEST("str w13, [x5, x6]",          12, -4);
459MEM_TEST("str w13, [x5, x6, lsl #2]",  12, -4);
460MEM_TEST("str w13, [x5, w6, uxtw]",    12,  4);
461MEM_TEST("str w13, [x5, w6, uxtw #2]", 12,  4);
462MEM_TEST("str w13, [x5, w6, sxtw]",    12,  4);
463MEM_TEST("str w13, [x5, w6, sxtw #2]", 12,  -4);
464MEM_TEST("ldr w13, [x5, x6]",          12, -4);
465MEM_TEST("ldr w13, [x5, x6, lsl #2]",  12, -4);
466MEM_TEST("ldr w13, [x5, w6, uxtw]",    12,  4);
467MEM_TEST("ldr w13, [x5, w6, uxtw #2]", 12,  4);
468MEM_TEST("ldr w13, [x5, w6, sxtw]",    12,  4);
469MEM_TEST("ldr w13, [x5, w6, sxtw #2]", 12,  -4);
470
471MEM_TEST("strh w13, [x5, x6]",          12, -4);
472MEM_TEST("strh w13, [x5, x6, lsl #1]",  12, -4);
473MEM_TEST("strh w13, [x5, w6, uxtw]",    12,  4);
474MEM_TEST("strh w13, [x5, w6, uxtw #1]", 12,  4);
475MEM_TEST("strh w13, [x5, w6, sxtw]",    12,  4);
476MEM_TEST("strh w13, [x5, w6, sxtw #1]", 12,  -4);
477MEM_TEST("ldrh w13, [x5, x6]",          12, -4);
478MEM_TEST("ldrh w13, [x5, x6, lsl #1]",  12, -4);
479MEM_TEST("ldrh w13, [x5, w6, uxtw]",    12,  4);
480MEM_TEST("ldrh w13, [x5, w6, uxtw #1]", 12,  4);
481MEM_TEST("ldrh w13, [x5, w6, sxtw]",    12,  4);
482MEM_TEST("ldrh w13, [x5, w6, sxtw #1]", 12,  -4);
483
484MEM_TEST("strb w13, [x5, x6]",          12, -4);
485MEM_TEST("strb w13, [x5, x6, lsl #0]",  12, -4);
486MEM_TEST("strb w13, [x5, w6, uxtw]",    12,  4);
487MEM_TEST("strb w13, [x5, w6, uxtw #0]", 12,  4);
488MEM_TEST("strb w13, [x5, w6, sxtw]",    12,  4);
489MEM_TEST("strb w13, [x5, w6, sxtw #0]", 12,  -4);
490MEM_TEST("ldrb w13, [x5, x6]",          12, -4);
491MEM_TEST("ldrb w13, [x5, x6, lsl #0]",  12, -4);
492MEM_TEST("ldrb w13, [x5, w6, uxtw]",    12,  4);
493MEM_TEST("ldrb w13, [x5, w6, uxtw #0]", 12,  4);
494MEM_TEST("ldrb w13, [x5, w6, sxtw]",    12,  4);
495MEM_TEST("ldrb w13, [x5, w6, sxtw #0]", 12,  -4);
496
497////////////////////////////////////////////////////////////////
498printf("LDRS{B,H,W} (uimm12)\n");
499MEM_TEST("ldrsw x13, [x5, #24]", -16, 4);
500MEM_TEST("ldrsh x13, [x5, #20]", -16, 4);
501MEM_TEST("ldrsh w13, [x5, #44]", -16, 4);
502MEM_TEST("ldrsb x13, [x5, #72]", -16, 4);
503MEM_TEST("ldrsb w13, [x5, #56]", -16, 4);
504
505////////////////////////////////////////////////////////////////
506printf("LDRS{B,H,W} (simm9, upd)\n");
507MEM_TEST("ldrsw x13, [x5, #-24]!", -16, 4);
508MEM_TEST("ldrsh x13, [x5, #-20]!", -16, 4);
509MEM_TEST("ldrsh w13, [x5, #-44]!", -16, 4);
510MEM_TEST("ldrsb x13, [x5, #-72]!", -16, 4);
511MEM_TEST("ldrsb w13, [x5, #-56]!", -16, 4);
512
513MEM_TEST("ldrsw x13, [x5], #-24", -16, 4);
514MEM_TEST("ldrsh x13, [x5], #-20", -16, 4);
515MEM_TEST("ldrsh w13, [x5], #-44", -16, 4);
516MEM_TEST("ldrsb x13, [x5], #-72", -16, 4);
517MEM_TEST("ldrsb w13, [x5], #-56", -16, 4);
518
519////////////////////////////////////////////////////////////////
520printf("LDRS{B,H,W} (simm9, noUpd)\n");
521MEM_TEST("ldrsw x13, [x5, #-24]", -16, 4);
522MEM_TEST("ldrsh x13, [x5, #-20]", -16, 4);
523MEM_TEST("ldrsh w13, [x5, #-44]", -16, 4);
524MEM_TEST("ldrsb x13, [x5, #-72]", -16, 4);
525MEM_TEST("ldrsb w13, [x5, #-56]", -16, 4);
526
527////////////////////////////////////////////////////////////////
528printf("LDP,STP (immediate, simm7) (FP&VEC)\n");
529
530MEM_TEST("stp q17, q18, [x5, 16]",  -15, 4);
531MEM_TEST("stp q19, q18, [x5, 32]!", -11, 4);
532MEM_TEST("stp q20, q17, [x5], -48",  -7, 4);
533
534MEM_TEST("stp d18, d17, [x5, 16]",  -15, 4);
535MEM_TEST("stp d17, d19, [x5, 32]!", -11, 4);
536MEM_TEST("stp d20, d18, [x5], -48",  -7, 4);
537
538MEM_TEST("stp s17, s18, [x5, 16]",  -15, 4);
539MEM_TEST("stp s19, s18, [x5, 32]!", -11, 4);
540MEM_TEST("stp s20, s17, [x5], -48", -7, 4);
541
542MEM_TEST("ldp q17, q18, [x5, 16]",  -15, 4);
543MEM_TEST("ldp q18, q19, [x5, 32]!", -11, 4);
544MEM_TEST("ldp q19, q20, [x5], -48",  -7, 4);
545
546MEM_TEST("ldp d20, d17, [x5, 16]",  -15, 4);
547MEM_TEST("ldp d17, d18, [x5, 32]!", -11, 4);
548MEM_TEST("ldp d18, d19, [x5], -48", -7, 4);
549
550MEM_TEST("ldp s19, s20, [x5, 16]",  -15, 4);
551MEM_TEST("ldp s20, s17, [x5, 32]!", -11, 4);
552MEM_TEST("ldp s17, s18, [x5], -48", -7, 4);
553
554////////////////////////////////////////////////////////////////
555printf("LDNP,STNP (immediate, simm7) (FP&VEC, w/ nontemporal hint)\n");
556
557MEM_TEST("stnp q18, q17, [x5, 16]",  -15, 4);
558MEM_TEST("stnp d20, d19, [x5, 40]",  -15, 4);
559MEM_TEST("stnp s19, s18, [x5, 68]",  -15, 4);
560
561MEM_TEST("ldnp q18, q17, [x5, 16]",  -15, 4);
562MEM_TEST("ldnp d17, d20, [x5, 40]",  -15, 4);
563MEM_TEST("ldnp s20, s19, [x5, 68]",  -15, 4);
564
565////////////////////////////////////////////////////////////////
566printf("{LD,ST}R (vector register)\n");
567
568MEM_TEST("str q17, [x5, x6]",          12, -4);
569MEM_TEST("str q17, [x5, x6, lsl #4]",  12, -4);
570MEM_TEST("str q17, [x5, w6, uxtw]",    12,  4);
571MEM_TEST("str q17, [x5, w6, uxtw #4]", 12,  4);
572MEM_TEST("str q17, [x5, w6, sxtw]",    12,  4);
573MEM_TEST("str q17, [x5, w6, sxtw #4]", 12,  -4);
574MEM_TEST("ldr q17, [x5, x6]",          12, -4);
575MEM_TEST("ldr q17, [x5, x6, lsl #4]",  12, -4);
576MEM_TEST("ldr q17, [x5, w6, uxtw]",    12,  4);
577MEM_TEST("ldr q17, [x5, w6, uxtw #4]", 12,  4);
578MEM_TEST("ldr q17, [x5, w6, sxtw]",    12,  4);
579MEM_TEST("ldr q17, [x5, w6, sxtw #4]", 12,  -4);
580
581MEM_TEST("str d17, [x5, x6]",          12, -4);
582MEM_TEST("str d17, [x5, x6, lsl #3]",  12, -4);
583MEM_TEST("str d17, [x5, w6, uxtw]",    12,  4);
584MEM_TEST("str d17, [x5, w6, uxtw #3]", 12,  4);
585MEM_TEST("str d17, [x5, w6, sxtw]",    12,  4);
586MEM_TEST("str d17, [x5, w6, sxtw #3]", 12,  -4);
587MEM_TEST("ldr d17, [x5, x6]",          12, -4);
588MEM_TEST("ldr d17, [x5, x6, lsl #3]",  12, -4);
589MEM_TEST("ldr d17, [x5, w6, uxtw]",    12,  4);
590MEM_TEST("ldr d17, [x5, w6, uxtw #3]", 12,  4);
591MEM_TEST("ldr d17, [x5, w6, sxtw]",    12,  4);
592MEM_TEST("ldr d17, [x5, w6, sxtw #3]", 12,  -4);
593
594MEM_TEST("str s17, [x5, x6]",          12, -4);
595MEM_TEST("str s17, [x5, x6, lsl #2]",  12, -4);
596MEM_TEST("str s17, [x5, w6, uxtw]",    12,  4);
597MEM_TEST("str s17, [x5, w6, uxtw #2]", 12,  4);
598MEM_TEST("str s17, [x5, w6, sxtw]",    12,  4);
599MEM_TEST("str s17, [x5, w6, sxtw #2]", 12,  -4);
600MEM_TEST("ldr s17, [x5, x6]",          12, -4);
601MEM_TEST("ldr s17, [x5, x6, lsl #2]",  12, -4);
602MEM_TEST("ldr s17, [x5, w6, uxtw]",    12,  4);
603MEM_TEST("ldr s17, [x5, w6, uxtw #2]", 12,  4);
604MEM_TEST("ldr s17, [x5, w6, sxtw]",    12,  4);
605MEM_TEST("ldr s17, [x5, w6, sxtw #2]", 12,  -4);
606
607MEM_TEST("str h17, [x5, x6]",          12, -4);
608MEM_TEST("str h17, [x5, x6, lsl #1]",  12, -4);
609MEM_TEST("str h17, [x5, w6, uxtw]",    12,  4);
610MEM_TEST("str h17, [x5, w6, uxtw #1]", 12,  4);
611MEM_TEST("str h17, [x5, w6, sxtw]",    12,  4);
612MEM_TEST("str h17, [x5, w6, sxtw #1]", 12,  -4);
613MEM_TEST("ldr h17, [x5, x6]",          12, -4);
614MEM_TEST("ldr h17, [x5, x6, lsl #1]",  12, -4);
615MEM_TEST("ldr h17, [x5, w6, uxtw]",    12,  4);
616MEM_TEST("ldr h17, [x5, w6, uxtw #1]", 12,  4);
617MEM_TEST("ldr h17, [x5, w6, sxtw]",    12,  4);
618MEM_TEST("ldr h17, [x5, w6, sxtw #1]", 12,  -4);
619
620MEM_TEST("str b17, [x5, x6]",          12, -4);
621MEM_TEST("str b17, [x5, x6, lsl #0]",  12, -4);
622MEM_TEST("str b17, [x5, w6, uxtw]",    12,  4);
623MEM_TEST("str b17, [x5, w6, uxtw #0]", 12,  4);
624MEM_TEST("str b17, [x5, w6, sxtw]",    12,  4);
625MEM_TEST("str b17, [x5, w6, sxtw #0]", 12,  -4);
626MEM_TEST("ldr b17, [x5, x6]",          12, -4);
627MEM_TEST("ldr b17, [x5, x6, lsl #0]",  12, -4);
628MEM_TEST("ldr b17, [x5, w6, uxtw]",    12,  4);
629MEM_TEST("ldr b17, [x5, w6, uxtw #0]", 12,  4);
630MEM_TEST("ldr b17, [x5, w6, sxtw]",    12,  4);
631MEM_TEST("ldr b17, [x5, w6, sxtw #0]", 12,  -4);
632
633////////////////////////////////////////////////////////////////
634printf("LDRS{B,H,W} (integer register, SX)\n");
635
636MEM_TEST("ldrsw x13, [x5,x6]", 12, -4);
637MEM_TEST("ldrsw x13, [x5,x6, lsl #2]", 12, -4);
638MEM_TEST("ldrsw x13, [x5,w6,uxtw #0]", 12, 4);
639MEM_TEST("ldrsw x13, [x5,w6,uxtw #2]", 12, 4);
640MEM_TEST("ldrsw x13, [x5,w6,sxtw #0]", 12, 4);
641MEM_TEST("ldrsw x13, [x5,w6,sxtw #2]", 12, -4);
642
643MEM_TEST("ldrsh x13, [x5,x6]",  12, -4);
644MEM_TEST("ldrsh x13, [x5,x6, lsl #1]",  12, -4);
645MEM_TEST("ldrsh x13, [x5,w6,uxtw #0]", 12, 4);
646MEM_TEST("ldrsh x13, [x5,w6,uxtw #1]", 12, 4);
647MEM_TEST("ldrsh x13, [x5,w6,sxtw #0]", 12, 4);
648MEM_TEST("ldrsh x13, [x5,w6,sxtw #1]",  12, -4);
649
650MEM_TEST("ldrsh w13, [x5,x6]",  12, -4);
651MEM_TEST("ldrsh w13, [x5,x6, lsl #1]",  12, -4);
652MEM_TEST("ldrsh w13, [x5,w6,uxtw #0]", 12, 4);
653MEM_TEST("ldrsh w13, [x5,w6,uxtw #1]", 12, 4);
654MEM_TEST("ldrsh w13, [x5,w6,sxtw #0]", 12, 4);
655MEM_TEST("ldrsh w13, [x5,w6,sxtw #1]",  12, -4);
656
657MEM_TEST("ldrsb x13, [x5,x6]",  12, -4);
658MEM_TEST("ldrsb x13, [x5,x6, lsl #0]",  12, -4);
659MEM_TEST("ldrsb x13, [x5,w6,uxtw #0]", 12, 4);
660MEM_TEST("ldrsb x13, [x5,w6,uxtw #0]", 12, 4);
661MEM_TEST("ldrsb x13, [x5,w6,sxtw #0]", 12, 4);
662MEM_TEST("ldrsb x13, [x5,w6,sxtw #0]",  12, -4);
663
664MEM_TEST("ldrsb w13, [x5,x6]",  12, -4);
665MEM_TEST("ldrsb w13, [x5,x6, lsl #0]",  12, -4);
666MEM_TEST("ldrsb w13, [x5,w6,uxtw #0]", 12, 4);
667MEM_TEST("ldrsb w13, [x5,w6,uxtw #0]", 12, 4);
668MEM_TEST("ldrsb w13, [x5,w6,sxtw #0]", 12, 4);
669MEM_TEST("ldrsb w13, [x5,w6,sxtw #0]",  12, -4);
670
671////////////////////////////////////////////////////////////////
672printf("LDR/STR (immediate, SIMD&FP, unsigned offset)\n");
673
674MEM_TEST("str q17, [x5, #-32]", 16, 0);
675MEM_TEST("str d17, [x5, #-32]", 16, 0);
676MEM_TEST("str s17, [x5, #-32]", 16, 0);
677MEM_TEST("str h17, [x5, #-32]", 16, 0);
678MEM_TEST("str b17, [x5, #-32]", 16, 0);
679MEM_TEST("ldr q17, [x5, #-32]", 16, 0);
680MEM_TEST("ldr d17, [x5, #-32]", 16, 0);
681MEM_TEST("ldr s17, [x5, #-32]", 16, 0);
682MEM_TEST("ldr h17, [x5, #-32]", 16, 0);
683MEM_TEST("ldr b17, [x5, #-32]", 16, 0);
684
685////////////////////////////////////////////////////////////////
686printf("LDR/STR (immediate, SIMD&FP, pre/post index)\n");
687
688MEM_TEST("str q17, [x5], #-32", 16, 0);
689MEM_TEST("str d17, [x5], #-32", 16, 0);
690MEM_TEST("str s17, [x5], #-32", 16, 0);
691MEM_TEST("str h17, [x5], #-32", 16, 0);
692MEM_TEST("str b17, [x5], #-32", 16, 0);
693MEM_TEST("ldr q17, [x5], #-32", 16, 0);
694MEM_TEST("ldr d17, [x5], #-32", 16, 0);
695MEM_TEST("ldr s17, [x5], #-32", 16, 0);
696MEM_TEST("ldr h17, [x5], #-32", 16, 0);
697MEM_TEST("ldr b17, [x5], #-32", 16, 0);
698
699MEM_TEST("str q17, [x5, #-32]!", 16, 0);
700MEM_TEST("str d17, [x5, #-32]!", 16, 0);
701MEM_TEST("str s17, [x5, #-32]!", 16, 0);
702MEM_TEST("str h17, [x5, #-32]!", 16, 0);
703MEM_TEST("str b17, [x5, #-32]!", 16, 0);
704MEM_TEST("ldr q17, [x5, #-32]!", 16, 0);
705MEM_TEST("ldr d17, [x5, #-32]!", 16, 0);
706MEM_TEST("ldr s17, [x5, #-32]!", 16, 0);
707MEM_TEST("ldr h17, [x5, #-32]!", 16, 0);
708MEM_TEST("ldr b17, [x5, #-32]!", 16, 0);
709
710////////////////////////////////////////////////////////////////
711printf("LDUR/STUR (unscaled offset, SIMD&FP)\n");
712
713MEM_TEST("str q17, [x5, #-13]", 16, 0);
714MEM_TEST("str d17, [x5, #-13]", 16, 0);
715MEM_TEST("str s17, [x5, #-13]", 16, 0);
716MEM_TEST("str h17, [x5, #-13]", 16, 0);
717MEM_TEST("str b17, [x5, #-13]", 16, 0);
718MEM_TEST("ldr q17, [x5, #-13]", 16, 0);
719MEM_TEST("ldr d17, [x5, #-13]", 16, 0);
720MEM_TEST("ldr s17, [x5, #-13]", 16, 0);
721MEM_TEST("ldr h17, [x5, #-13]", 16, 0);
722MEM_TEST("ldr b17, [x5, #-13]", 16, 0);
723
724////////////////////////////////////////////////////////////////
725printf("LDR (literal, SIMD&FP) (entirely MISSING)\n");
726
727MEM_TEST("xyzzy10: ldr s17, xyzzy10 - 8", 0, 0)
728MEM_TEST("xyzzy11: ldr d17, xyzzy11 + 8", 0, 0)
729MEM_TEST("xyzzy12: ldr q17, xyzzy12 + 4", 0, 0)
730
731////////////////////////////////////////////////////////////////
732printf("LD1/ST1 (multiple 1-elem structs to/from 1 reg\n");
733
734MEM_TEST("st1 {v18.2d}, [x5]",       17, 7)
735MEM_TEST("st1 {v18.2d}, [x5], #16",  9, 9)
736MEM_TEST("st1 {v18.2d}, [x5], x6",   -13, -5)
737
738MEM_TEST("st1 {v18.1d}, [x5]",       17, 7)
739MEM_TEST("st1 {v18.1d}, [x5], #8",   9, 9)
740MEM_TEST("st1 {v18.1d}, [x5], x6",   -13, -5)
741
742MEM_TEST("st1 {v18.4s}, [x5]",       17, 7)
743MEM_TEST("st1 {v18.4s}, [x5], #16",  9, 9)
744MEM_TEST("st1 {v18.4s}, [x5], x6",   -13, -5)
745
746MEM_TEST("st1 {v18.2s}, [x5]",       17, 7)
747MEM_TEST("st1 {v18.2s}, [x5], #8",   9, 9)
748MEM_TEST("st1 {v18.2s}, [x5], x6",   -13, -5)
749
750MEM_TEST("st1 {v18.8h}, [x5]",       17, 7)
751MEM_TEST("st1 {v18.8h}, [x5], #16",  9, 9)
752MEM_TEST("st1 {v18.8h}, [x5], x6",   -13, -5)
753
754MEM_TEST("st1 {v18.4h}, [x5]",       17, 7)
755MEM_TEST("st1 {v18.4h}, [x5], #8",   9, 9)
756MEM_TEST("st1 {v18.4h}, [x5], x6",   -13, -5)
757
758MEM_TEST("st1 {v18.16b}, [x5]",      17, 7)
759MEM_TEST("st1 {v18.16b}, [x5], #16", 9, 9)
760MEM_TEST("st1 {v18.16b}, [x5], x6",  -13, -5)
761
762MEM_TEST("st1 {v18.8b}, [x5]",       17, 7)
763MEM_TEST("st1 {v18.8b}, [x5], #8",   9, 9)
764MEM_TEST("st1 {v18.8b}, [x5], x6",   -13, -5)
765
766MEM_TEST("ld1 {v18.2d}, [x5]",       17, 7)
767MEM_TEST("ld1 {v18.2d}, [x5], #16",  9, 9)
768MEM_TEST("ld1 {v18.2d}, [x5], x6",   -13, -5)
769
770MEM_TEST("ld1 {v18.1d}, [x5]",       17, 7)
771MEM_TEST("ld1 {v18.1d}, [x5], #8",   9, 9)
772MEM_TEST("ld1 {v18.1d}, [x5], x6",   -13, -5)
773
774MEM_TEST("ld1 {v18.4s}, [x5]",       17, 7)
775MEM_TEST("ld1 {v18.4s}, [x5], #16",  9, 9)
776MEM_TEST("ld1 {v18.4s}, [x5], x6",   -13, -5)
777
778MEM_TEST("ld1 {v18.2s}, [x5]",       17, 7)
779MEM_TEST("ld1 {v18.2s}, [x5], #8",   9, 9)
780MEM_TEST("ld1 {v18.2s}, [x5], x6",   -13, -5)
781
782MEM_TEST("ld1 {v18.8h}, [x5]",       17, 7)
783MEM_TEST("ld1 {v18.8h}, [x5], #16",  9, 9)
784MEM_TEST("ld1 {v18.8h}, [x5], x6",   -13, -5)
785
786MEM_TEST("ld1 {v18.4h}, [x5]",       17, 7)
787MEM_TEST("ld1 {v18.4h}, [x5], #8",   9, 9)
788MEM_TEST("ld1 {v18.4h}, [x5], x6",   -13, -5)
789
790MEM_TEST("ld1 {v18.16b}, [x5]",      17, 7)
791MEM_TEST("ld1 {v18.16b}, [x5], #16", 9, 9)
792MEM_TEST("ld1 {v18.16b}, [x5], x6",  -13, -5)
793
794MEM_TEST("ld1 {v18.8b}, [x5]",       17, 7)
795MEM_TEST("ld1 {v18.8b}, [x5], #8",   9, 9)
796MEM_TEST("ld1 {v18.8b}, [x5], x6",   -13, -5)
797
798////////////////////////////////////////////////////////////////
799printf("LD2/ST2 (multiple 2-elem structs to/from 2 regs\n");
800
801MEM_TEST("st2 {v18.2d, v19.2d}, [x5]",         17, 7)
802MEM_TEST("st2 {v18.2d, v19.2d}, [x5], #32",    9, 9)
803MEM_TEST("st2 {v18.2d, v19.2d}, [x5], x6",     -13, -5)
804
805/* no 1d case */
806
807MEM_TEST("st2 {v18.4s, v19.4s}, [x5]",         17, 7)
808MEM_TEST("st2 {v18.4s, v19.4s}, [x5], #32",    9, 9)
809MEM_TEST("st2 {v18.4s, v19.4s}, [x5], x6",     -13, -5)
810
811MEM_TEST("st2 {v18.2s, v19.2s}, [x5]",         17, 7)
812MEM_TEST("st2 {v18.2s, v19.2s}, [x5], #16",    9, 9)
813MEM_TEST("st2 {v18.2s, v19.2s}, [x5], x6",     -13, -5)
814
815MEM_TEST("st2 {v18.8h, v19.8h}, [x5]",         17, 7)
816MEM_TEST("st2 {v18.8h, v19.8h}, [x5], #32",    9, 9)
817MEM_TEST("st2 {v18.8h, v19.8h}, [x5], x6",     -13, -5)
818
819MEM_TEST("st2 {v18.4h, v19.4h}, [x5]",         17, 7)
820MEM_TEST("st2 {v18.4h, v19.4h}, [x5], #16",    9, 9)
821MEM_TEST("st2 {v18.4h, v19.4h}, [x5], x6",     -13, -5)
822
823MEM_TEST("st2 {v18.16b, v19.16b}, [x5]",       17, 7)
824MEM_TEST("st2 {v18.16b, v19.16b}, [x5], #32",  9, 9)
825MEM_TEST("st2 {v18.16b, v19.16b}, [x5], x6",   -13, -5)
826
827MEM_TEST("st2 {v18.8b, v19.8b}, [x5]",         17, 7)
828MEM_TEST("st2 {v18.8b, v19.8b}, [x5], #16",    9, 9)
829MEM_TEST("st2 {v18.8b, v19.8b}, [x5], x6",     -13, -5)
830
831MEM_TEST("ld2 {v18.2d, v19.2d}, [x5]",         17, 7)
832MEM_TEST("ld2 {v18.2d, v19.2d}, [x5], #32",    9, 9)
833MEM_TEST("ld2 {v18.2d, v19.2d}, [x5], x6",     -13, -5)
834
835/* no 1d case */
836
837MEM_TEST("ld2 {v18.4s, v19.4s}, [x5]",         17, 7)
838MEM_TEST("ld2 {v18.4s, v19.4s}, [x5], #32",    9, 9)
839MEM_TEST("ld2 {v18.4s, v19.4s}, [x5], x6",     -13, -5)
840
841MEM_TEST("ld2 {v18.2s, v19.2s}, [x5]",         17, 7)
842MEM_TEST("ld2 {v18.2s, v19.2s}, [x5], #16",    9, 9)
843MEM_TEST("ld2 {v18.2s, v19.2s}, [x5], x6",     -13, -5)
844
845MEM_TEST("ld2 {v18.8h, v19.8h}, [x5]",         17, 7)
846MEM_TEST("ld2 {v18.8h, v19.8h}, [x5], #32",    9, 9)
847MEM_TEST("ld2 {v18.8h, v19.8h}, [x5], x6",     -13, -5)
848
849MEM_TEST("ld2 {v18.4h, v19.4h}, [x5]",         17, 7)
850MEM_TEST("ld2 {v18.4h, v19.4h}, [x5], #16",    9, 9)
851MEM_TEST("ld2 {v18.4h, v19.4h}, [x5], x6",     -13, -5)
852
853MEM_TEST("ld2 {v18.16b, v19.16b}, [x5]",       17, 7)
854MEM_TEST("ld2 {v18.16b, v19.16b}, [x5], #32",  9, 9)
855MEM_TEST("ld2 {v18.16b, v19.16b}, [x5], x6",   -13, -5)
856
857MEM_TEST("ld2 {v18.8b, v19.8b}, [x5]",         17, 7)
858MEM_TEST("ld2 {v18.8b, v19.8b}, [x5], #16",    9, 9)
859MEM_TEST("ld2 {v18.8b, v19.8b}, [x5], x6",     -13, -5)
860
861////////////////////////////////////////////////////////////////
862printf("LD3/ST3 (multiple 3-elem structs to/from 3 regs\n");
863
864MEM_TEST("st3 {v17.2d, v18.2d, v19.2d}, [x5]",       17,  7)
865MEM_TEST("st3 {v17.2d, v18.2d, v19.2d}, [x5], #48",  9,   9)
866MEM_TEST("st3 {v17.2d, v18.2d, v19.2d}, [x5], x6",   -13, -5)
867
868/* no 1d case */
869
870MEM_TEST("st3 {v17.4s, v18.4s, v19.4s}, [x5]",          17, 7)
871MEM_TEST("st3 {v17.4s, v18.4s, v19.4s}, [x5], #48",     9, 9)
872MEM_TEST("st3 {v17.4s, v18.4s, v19.4s}, [x5], x6",      -13, -5)
873
874MEM_TEST("st3 {v17.2s, v18.2s, v19.2s}, [x5]",          17, 7)
875MEM_TEST("st3 {v17.2s, v18.2s, v19.2s}, [x5], #24",     9, 9)
876MEM_TEST("st3 {v17.2s, v18.2s, v19.2s}, [x5], x6",      -13, -5)
877
878MEM_TEST("st3 {v17.8h, v18.8h, v19.8h}, [x5]",          17, 7)
879MEM_TEST("st3 {v17.8h, v18.8h, v19.8h}, [x5], #48",     9, 9)
880MEM_TEST("st3 {v17.8h, v18.8h, v19.8h}, [x5], x6",      -13, -5)
881
882MEM_TEST("st3 {v17.4h, v18.4h, v19.4h}, [x5]",          17, 7)
883MEM_TEST("st3 {v17.4h, v18.4h, v19.4h}, [x5], #24",     9, 9)
884MEM_TEST("st3 {v17.4h, v18.4h, v19.4h}, [x5], x6",      -13, -5)
885
886MEM_TEST("st3 {v17.16b, v18.16b, v19.16b}, [x5]",       17, 7)
887MEM_TEST("st3 {v17.16b, v18.16b, v19.16b}, [x5], #48",  9, 9)
888MEM_TEST("st3 {v17.16b, v18.16b, v19.16b}, [x5], x6",   -13, -5)
889
890MEM_TEST("st3 {v17.8b, v18.8b, v19.8b}, [x5]",          17, 7)
891MEM_TEST("st3 {v17.8b, v18.8b, v19.8b}, [x5], #24",     9, 9)
892MEM_TEST("st3 {v17.8b, v18.8b, v19.8b}, [x5], x6",      -13, -5)
893
894MEM_TEST("ld3 {v17.2d, v18.2d, v19.2d}, [x5]",       17,  7)
895MEM_TEST("ld3 {v17.2d, v18.2d, v19.2d}, [x5], #48",  9,   9)
896MEM_TEST("ld3 {v17.2d, v18.2d, v19.2d}, [x5], x6",   -13, -5)
897
898/* no 1d case */
899
900MEM_TEST("ld3 {v17.4s, v18.4s, v19.4s}, [x5]",          17, 7)
901MEM_TEST("ld3 {v17.4s, v18.4s, v19.4s}, [x5], #48",     9, 9)
902MEM_TEST("ld3 {v17.4s, v18.4s, v19.4s}, [x5], x6",      -13, -5)
903
904MEM_TEST("ld3 {v17.2s, v18.2s, v19.2s}, [x5]",          17, 7)
905MEM_TEST("ld3 {v17.2s, v18.2s, v19.2s}, [x5], #24",     9, 9)
906MEM_TEST("ld3 {v17.2s, v18.2s, v19.2s}, [x5], x6",      -13, -5)
907
908MEM_TEST("ld3 {v17.8h, v18.8h, v19.8h}, [x5]",          17, 7)
909MEM_TEST("ld3 {v17.8h, v18.8h, v19.8h}, [x5], #48",     9, 9)
910MEM_TEST("ld3 {v17.8h, v18.8h, v19.8h}, [x5], x6",      -13, -5)
911
912MEM_TEST("ld3 {v17.4h, v18.4h, v19.4h}, [x5]",          17, 7)
913MEM_TEST("ld3 {v17.4h, v18.4h, v19.4h}, [x5], #24",     9, 9)
914MEM_TEST("ld3 {v17.4h, v18.4h, v19.4h}, [x5], x6",      -13, -5)
915
916MEM_TEST("ld3 {v17.16b, v18.16b, v19.16b}, [x5]",       17, 7)
917MEM_TEST("ld3 {v17.16b, v18.16b, v19.16b}, [x5], #48",  9, 9)
918MEM_TEST("ld3 {v17.16b, v18.16b, v19.16b}, [x5], x6",   -13, -5)
919
920MEM_TEST("ld3 {v17.8b, v18.8b, v19.8b}, [x5]",          17, 7)
921MEM_TEST("ld3 {v17.8b, v18.8b, v19.8b}, [x5], #24",     9, 9)
922MEM_TEST("ld3 {v17.8b, v18.8b, v19.8b}, [x5], x6",      -13, -5)
923
924////////////////////////////////////////////////////////////////
925printf("LD4/ST4 (multiple 4-elem structs to/from 4 regs\n");
926
927MEM_TEST("st4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5]",           17, 7)
928MEM_TEST("st4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], #64",      9, 9)
929MEM_TEST("st4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], x6",       -13, -5)
930
931/* no 1d case */
932
933MEM_TEST("st4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5]",           17, 7)
934MEM_TEST("st4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], #64",      9, 9)
935MEM_TEST("st4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], x6",       -13, -5)
936
937MEM_TEST("st4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5]",           17, 7)
938MEM_TEST("st4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], #32",      9, 9)
939MEM_TEST("st4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], x6",       -13, -5)
940
941MEM_TEST("st4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5]",           17, 7)
942MEM_TEST("st4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], #64",      9, 9)
943MEM_TEST("st4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], x6",       -13, -5)
944
945MEM_TEST("st4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5]",           17, 7)
946MEM_TEST("st4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], #32",      9, 9)
947MEM_TEST("st4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], x6",       -13, -5)
948
949MEM_TEST("st4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5]",       17, 7)
950MEM_TEST("st4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], #64",  9, 9)
951MEM_TEST("st4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], x6",   -13, -5)
952
953MEM_TEST("st4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5]",           17, 7)
954MEM_TEST("st4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], #32",      9, 9)
955MEM_TEST("st4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], x6",       -13, -5)
956
957MEM_TEST("ld4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5]",           17, 7)
958MEM_TEST("ld4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], #64",      9, 9)
959MEM_TEST("ld4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], x6",       -13, -5)
960
961/* no 1d case */
962
963MEM_TEST("ld4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5]",           17, 7)
964MEM_TEST("ld4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], #64",      9, 9)
965MEM_TEST("ld4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], x6",       -13, -5)
966
967MEM_TEST("ld4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5]",           17, 7)
968MEM_TEST("ld4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], #32",      9, 9)
969MEM_TEST("ld4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], x6",       -13, -5)
970
971MEM_TEST("ld4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5]",           17, 7)
972MEM_TEST("ld4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], #64",      9, 9)
973MEM_TEST("ld4 {v17.8h, v18.8h, v19.8h, v20.8h}, [x5], x6",       -13, -5)
974
975MEM_TEST("ld4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5]",           17, 7)
976MEM_TEST("ld4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], #32",      9, 9)
977MEM_TEST("ld4 {v17.4h, v18.4h, v19.4h, v20.4h}, [x5], x6",       -13, -5)
978
979MEM_TEST("ld4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5]",       17, 7)
980MEM_TEST("ld4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], #64",  9, 9)
981MEM_TEST("ld4 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], x6",   -13, -5)
982
983MEM_TEST("ld4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5]",           17, 7)
984MEM_TEST("ld4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], #32",      9, 9)
985MEM_TEST("ld4 {v17.8b, v18.8b, v19.8b, v20.8b}, [x5], x6",       -13, -5)
986
987////////////////////////////////////////////////////////////////
988printf("LD1/ST1 (multiple 1-elem structs to/from 2/3/4 regs\n");
989
990MEM_TEST("st1 {v19.2d, v20.2d},                     [x5]", 17, 7)
991MEM_TEST("st1 {v19.2d, v20.2d},                     [x5], #32", 9, 9)
992MEM_TEST("st1 {v19.2d, v20.2d},                     [x5], x6", -13, -5)
993
994MEM_TEST("st1 {v17.2d, v18.2d, v19.2d},             [x5]", 17, 7)
995MEM_TEST("st1 {v17.2d, v18.2d, v19.2d},             [x5], #48", 9, 9)
996MEM_TEST("st1 {v17.2d, v18.2d, v19.2d},             [x5], x6", -13, -5)
997
998MEM_TEST("st1 {v17.2d, v18.2d, v19.2d, v20.2d},     [x5]", 17, 7)
999MEM_TEST("st1 {v17.2d, v18.2d, v19.2d, v20.2d},     [x5], #64", 9, 9)
1000MEM_TEST("st1 {v17.2d, v18.2d, v19.2d, v20.2d},     [x5], x6", -13, -5)
1001
1002
1003MEM_TEST("st1 {v19.1d, v20.1d},                     [x5]", 17, 7)
1004MEM_TEST("st1 {v19.1d, v20.1d},                     [x5], #16", 9, 9)
1005MEM_TEST("st1 {v19.1d, v20.1d},                     [x5], x6", -13, -5)
1006
1007MEM_TEST("st1 {v17.1d, v18.1d, v19.1d},             [x5]", 17, 7)
1008MEM_TEST("st1 {v17.1d, v18.1d, v19.1d},             [x5], #24", 9, 9)
1009MEM_TEST("st1 {v17.1d, v18.1d, v19.1d},             [x5], x6", -13, -5)
1010
1011MEM_TEST("st1 {v17.1d, v18.1d, v19.1d, v20.1d},     [x5]", 17, 7)
1012MEM_TEST("st1 {v17.1d, v18.1d, v19.1d, v20.1d},     [x5], #32", 9, 9)
1013MEM_TEST("st1 {v17.1d, v18.1d, v19.1d, v20.1d},     [x5], x6", -13, -5)
1014
1015
1016MEM_TEST("st1 {v19.4s, v20.4s},                     [x5]", 17, 7)
1017MEM_TEST("st1 {v19.4s, v20.4s},                     [x5], #32", 9, 9)
1018MEM_TEST("st1 {v19.4s, v20.4s},                     [x5], x6", -13, -5)
1019
1020MEM_TEST("st1 {v17.4s, v18.4s, v19.4s},             [x5]", 17, 7)
1021MEM_TEST("st1 {v17.4s, v18.4s, v19.4s},             [x5], #48", 9, 9)
1022MEM_TEST("st1 {v17.4s, v18.4s, v19.4s},             [x5], x6", -13, -5)
1023
1024MEM_TEST("st1 {v17.4s, v18.4s, v19.4s, v20.4s},     [x5]", 17, 7)
1025MEM_TEST("st1 {v17.4s, v18.4s, v19.4s, v20.4s},     [x5], #64", 9, 9)
1026MEM_TEST("st1 {v17.4s, v18.4s, v19.4s, v20.4s},     [x5], x6", -13, -5)
1027
1028
1029MEM_TEST("st1 {v19.2s, v20.2s},                     [x5]", 17, 7)
1030MEM_TEST("st1 {v19.2s, v20.2s},                     [x5], #16", 9, 9)
1031MEM_TEST("st1 {v19.2s, v20.2s},                     [x5], x6", -13, -5)
1032
1033MEM_TEST("st1 {v17.2s, v18.2s, v19.2s},             [x5]", 17, 7)
1034MEM_TEST("st1 {v17.2s, v18.2s, v19.2s},             [x5], #24", 9, 9)
1035MEM_TEST("st1 {v17.2s, v18.2s, v19.2s},             [x5], x6", -13, -5)
1036
1037MEM_TEST("st1 {v17.2s, v18.2s, v19.2s, v20.2s},     [x5]", 17, 7)
1038MEM_TEST("st1 {v17.2s, v18.2s, v19.2s, v20.2s},     [x5], #32", 9, 9)
1039MEM_TEST("st1 {v17.2s, v18.2s, v19.2s, v20.2s},     [x5], x6", -13, -5)
1040
1041
1042MEM_TEST("st1 {v19.8h, v20.8h},                     [x5]", 17, 7)
1043MEM_TEST("st1 {v19.8h, v20.8h},                     [x5], #32", 9, 9)
1044MEM_TEST("st1 {v19.8h, v20.8h},                     [x5], x6", -13, -5)
1045
1046MEM_TEST("st1 {v17.8h, v18.8h, v19.8h},             [x5]", 17, 7)
1047MEM_TEST("st1 {v17.8h, v18.8h, v19.8h},             [x5], #48", 9, 9)
1048MEM_TEST("st1 {v17.8h, v18.8h, v19.8h},             [x5], x6", -13, -5)
1049
1050MEM_TEST("st1 {v17.8h, v18.8h, v19.8h, v20.8h},     [x5]", 17, 7)
1051MEM_TEST("st1 {v17.8h, v18.8h, v19.8h, v20.8h},     [x5], #64", 9, 9)
1052MEM_TEST("st1 {v17.8h, v18.8h, v19.8h, v20.8h},     [x5], x6", -13, -5)
1053
1054
1055MEM_TEST("st1 {v19.4h, v20.4h},                     [x5]", 17, 7)
1056MEM_TEST("st1 {v19.4h, v20.4h},                     [x5], #16", 9, 9)
1057MEM_TEST("st1 {v19.4h, v20.4h},                     [x5], x6", -13, -5)
1058
1059MEM_TEST("st1 {v17.4h, v18.4h, v19.4h},             [x5]", 17, 7)
1060MEM_TEST("st1 {v17.4h, v18.4h, v19.4h},             [x5], #24", 9, 9)
1061MEM_TEST("st1 {v17.4h, v18.4h, v19.4h},             [x5], x6", -13, -5)
1062
1063MEM_TEST("st1 {v17.4h, v18.4h, v19.4h, v20.4h},     [x5]", 17, 7)
1064MEM_TEST("st1 {v17.4h, v18.4h, v19.4h, v20.4h},     [x5], #32", 9, 9)
1065MEM_TEST("st1 {v17.4h, v18.4h, v19.4h, v20.4h},     [x5], x6", -13, -5)
1066
1067
1068MEM_TEST("st1 {v19.16b, v20.16b},                   [x5]", 17, 7)
1069MEM_TEST("st1 {v19.16b, v20.16b},                   [x5], #32", 9, 9)
1070MEM_TEST("st1 {v19.16b, v20.16b},                   [x5], x6", -13, -5)
1071
1072MEM_TEST("st1 {v17.16b, v18.16b, v19.16b},          [x5]", 17, 7)
1073MEM_TEST("st1 {v17.16b, v18.16b, v19.16b},          [x5], #48", 9, 9)
1074MEM_TEST("st1 {v17.16b, v18.16b, v19.16b},          [x5], x6", -13, -5)
1075
1076MEM_TEST("st1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5]", 17, 7)
1077MEM_TEST("st1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], #64", 9, 9)
1078MEM_TEST("st1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], x6", -13, -5)
1079
1080
1081MEM_TEST("st1 {v19.8b, v20.8b},                     [x5]", 17, 7)
1082MEM_TEST("st1 {v19.8b, v20.8b},                     [x5], #16", 9, 9)
1083MEM_TEST("st1 {v19.8b, v20.8b},                     [x5], x6", -13, -5)
1084
1085MEM_TEST("st1 {v17.8b, v18.8b, v19.8b},             [x5]", 17, 7)
1086MEM_TEST("st1 {v17.8b, v18.8b, v19.8b},             [x5], #24", 9, 9)
1087MEM_TEST("st1 {v17.8b, v18.8b, v19.8b},             [x5], x6", -13, -5)
1088
1089MEM_TEST("st1 {v17.8b, v18.8b, v19.8b, v20.8b},     [x5]", 17, 7)
1090MEM_TEST("st1 {v17.8b, v18.8b, v19.8b, v20.8b},     [x5], #32", 9, 9)
1091MEM_TEST("st1 {v17.8b, v18.8b, v19.8b, v20.8b},     [x5], x6", -13, -5)
1092
1093
1094MEM_TEST("ld1 {v19.2d, v20.2d},                     [x5]", 17, 7)
1095MEM_TEST("ld1 {v19.2d, v20.2d},                     [x5], #32", 9, 9)
1096MEM_TEST("ld1 {v19.2d, v20.2d},                     [x5], x6", -13, -5)
1097
1098MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d},             [x5]", 17, 7)
1099MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d},             [x5], #48", 9, 9)
1100MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d},             [x5], x6", -13, -5)
1101
1102MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d, v20.2d},     [x5]", 17, 7)
1103MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d, v20.2d},     [x5], #64", 9, 9)
1104MEM_TEST("ld1 {v17.2d, v18.2d, v19.2d, v20.2d},     [x5], x6", -13, -5)
1105
1106
1107MEM_TEST("ld1 {v19.1d, v20.1d},                     [x5]", 17, 7)
1108MEM_TEST("ld1 {v19.1d, v20.1d},                     [x5], #16", 9, 9)
1109MEM_TEST("ld1 {v19.1d, v20.1d},                     [x5], x6", -13, -5)
1110
1111MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d},             [x5]", 17, 7)
1112MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d},             [x5], #24", 9, 9)
1113MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d},             [x5], x6", -13, -5)
1114
1115MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d, v20.1d},     [x5]", 17, 7)
1116MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d, v20.1d},     [x5], #32", 9, 9)
1117MEM_TEST("ld1 {v17.1d, v18.1d, v19.1d, v20.1d},     [x5], x6", -13, -5)
1118
1119
1120MEM_TEST("ld1 {v19.4s, v20.4s},                     [x5]", 17, 7)
1121MEM_TEST("ld1 {v19.4s, v20.4s},                     [x5], #32", 9, 9)
1122MEM_TEST("ld1 {v19.4s, v20.4s},                     [x5], x6", -13, -5)
1123
1124MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s},             [x5]", 17, 7)
1125MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s},             [x5], #48", 9, 9)
1126MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s},             [x5], x6", -13, -5)
1127
1128MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s, v20.4s},     [x5]", 17, 7)
1129MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s, v20.4s},     [x5], #64", 9, 9)
1130MEM_TEST("ld1 {v17.4s, v18.4s, v19.4s, v20.4s},     [x5], x6", -13, -5)
1131
1132
1133MEM_TEST("ld1 {v19.2s, v20.2s},                     [x5]", 17, 7)
1134MEM_TEST("ld1 {v19.2s, v20.2s},                     [x5], #16", 9, 9)
1135MEM_TEST("ld1 {v19.2s, v20.2s},                     [x5], x6", -13, -5)
1136
1137MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s},             [x5]", 17, 7)
1138MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s},             [x5], #24", 9, 9)
1139MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s},             [x5], x6", -13, -5)
1140
1141MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s, v20.2s},     [x5]", 17, 7)
1142MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s, v20.2s},     [x5], #32", 9, 9)
1143MEM_TEST("ld1 {v17.2s, v18.2s, v19.2s, v20.2s},     [x5], x6", -13, -5)
1144
1145
1146MEM_TEST("ld1 {v19.8h, v20.8h},                     [x5]", 17, 7)
1147MEM_TEST("ld1 {v19.8h, v20.8h},                     [x5], #32", 9, 9)
1148MEM_TEST("ld1 {v19.8h, v20.8h},                     [x5], x6", -13, -5)
1149
1150MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h},             [x5]", 17, 7)
1151MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h},             [x5], #48", 9, 9)
1152MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h},             [x5], x6", -13, -5)
1153
1154MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h, v20.8h},     [x5]", 17, 7)
1155MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h, v20.8h},     [x5], #64", 9, 9)
1156MEM_TEST("ld1 {v17.8h, v18.8h, v19.8h, v20.8h},     [x5], x6", -13, -5)
1157
1158
1159MEM_TEST("ld1 {v19.4h, v20.4h},                     [x5]", 17, 7)
1160MEM_TEST("ld1 {v19.4h, v20.4h},                     [x5], #16", 9, 9)
1161MEM_TEST("ld1 {v19.4h, v20.4h},                     [x5], x6", -13, -5)
1162
1163MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h},             [x5]", 17, 7)
1164MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h},             [x5], #24", 9, 9)
1165MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h},             [x5], x6", -13, -5)
1166
1167MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h, v20.4h},     [x5]", 17, 7)
1168MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h, v20.4h},     [x5], #32", 9, 9)
1169MEM_TEST("ld1 {v17.4h, v18.4h, v19.4h, v20.4h},     [x5], x6", -13, -5)
1170
1171
1172MEM_TEST("ld1 {v19.16b, v20.16b},                   [x5]", 17, 7)
1173MEM_TEST("ld1 {v19.16b, v20.16b},                   [x5], #32", 9, 9)
1174MEM_TEST("ld1 {v19.16b, v20.16b},                   [x5], x6", -13, -5)
1175
1176MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b},          [x5]", 17, 7)
1177MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b},          [x5], #48", 9, 9)
1178MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b},          [x5], x6", -13, -5)
1179
1180MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5]", 17, 7)
1181MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], #64", 9, 9)
1182MEM_TEST("ld1 {v17.16b, v18.16b, v19.16b, v20.16b}, [x5], x6", -13, -5)
1183
1184
1185MEM_TEST("ld1 {v19.8b, v20.8b},                     [x5]", 17, 7)
1186MEM_TEST("ld1 {v19.8b, v20.8b},                     [x5], #16", 9, 9)
1187MEM_TEST("ld1 {v19.8b, v20.8b},                     [x5], x6", -13, -5)
1188
1189MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b},             [x5]", 17, 7)
1190MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b},             [x5], #24", 9, 9)
1191MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b},             [x5], x6", -13, -5)
1192
1193MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b, v20.8b},     [x5]", 17, 7)
1194MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b, v20.8b},     [x5], #32", 9, 9)
1195MEM_TEST("ld1 {v17.8b, v18.8b, v19.8b, v20.8b},     [x5], x6", -13, -5)
1196
1197
1198////////////////////////////////////////////////////////////////
1199printf("LD1R (single structure, replicate)\n");
1200
1201MEM_TEST("ld1r {v17.2d},  [x5]", 3, -5)
1202MEM_TEST("ld1r {v17.1d},  [x5]", 3, -4)
1203MEM_TEST("ld1r {v17.4s},  [x5]", 3, -3)
1204MEM_TEST("ld1r {v17.2s},  [x5]", 3, -2)
1205MEM_TEST("ld1r {v17.8h},  [x5]", 3, -1)
1206MEM_TEST("ld1r {v17.4h},  [x5]", 3, 1)
1207MEM_TEST("ld1r {v17.16b}, [x5]", 3, 2)
1208MEM_TEST("ld1r {v17.8b},  [x5]", 3, 3)
1209
1210MEM_TEST("ld1r {v17.2d},  [x5], #8", 3, -5)
1211MEM_TEST("ld1r {v17.1d},  [x5], #8", 3, -4)
1212MEM_TEST("ld1r {v17.4s},  [x5], #4", 3, -3)
1213MEM_TEST("ld1r {v17.2s},  [x5], #4", 3, -2)
1214MEM_TEST("ld1r {v17.8h},  [x5], #2", 3, -1)
1215MEM_TEST("ld1r {v17.4h},  [x5], #2", 3, 1)
1216MEM_TEST("ld1r {v17.16b}, [x5], #1", 3, 2)
1217MEM_TEST("ld1r {v17.8b},  [x5], #1", 3, 3)
1218
1219MEM_TEST("ld1r {v17.2d},  [x5], x6", 3, -5)
1220MEM_TEST("ld1r {v17.1d},  [x5], x6", 3, -4)
1221MEM_TEST("ld1r {v17.4s},  [x5], x6", 3, -3)
1222MEM_TEST("ld1r {v17.2s},  [x5], x6", 3, -2)
1223MEM_TEST("ld1r {v17.8h},  [x5], x6", 3, -1)
1224MEM_TEST("ld1r {v17.4h},  [x5], x6", 3, 1)
1225MEM_TEST("ld1r {v17.16b}, [x5], x6", 3, 2)
1226MEM_TEST("ld1r {v17.8b},  [x5], x6", 3, 3)
1227
1228
1229////////////////////////////////////////////////////////////////
1230printf("LD2R (single structure, replicate)\n");
1231
1232MEM_TEST("ld2r {v17.2d , v18.2d },  [x5]", 3, -5)
1233MEM_TEST("ld2r {v18.1d , v19.1d },  [x5]", 3, -4)
1234MEM_TEST("ld2r {v19.4s , v20.4s },  [x5]", 3, -3)
1235MEM_TEST("ld2r {v17.2s , v18.2s },  [x5]", 3, -2)
1236MEM_TEST("ld2r {v18.8h , v19.8h },  [x5]", 3, -1)
1237MEM_TEST("ld2r {v19.4h , v20.4h },  [x5]", 3, 1)
1238MEM_TEST("ld2r {v17.16b, v18.16b},  [x5]", 3, 2)
1239MEM_TEST("ld2r {v18.8b , v19.8b },  [x5]", 3, 3)
1240
1241MEM_TEST("ld2r {v19.2d , v20.2d },  [x5], #16", 3, -5)
1242MEM_TEST("ld2r {v17.1d , v18.1d },  [x5], #16", 3, -4)
1243MEM_TEST("ld2r {v18.4s , v19.4s },  [x5], #8", 3, -3)
1244MEM_TEST("ld2r {v19.2s , v20.2s },  [x5], #8", 3, -2)
1245MEM_TEST("ld2r {v17.8h , v18.8h },  [x5], #4", 3, -1)
1246MEM_TEST("ld2r {v18.4h , v19.4h },  [x5], #4", 3, 1)
1247MEM_TEST("ld2r {v19.16b, v20.16b},  [x5], #2", 3, 2)
1248MEM_TEST("ld2r {v17.8b , v18.8b },  [x5], #2", 3, 3)
1249
1250MEM_TEST("ld2r {v18.2d , v19.2d },  [x5], x6", 3, -5)
1251MEM_TEST("ld2r {v19.1d , v20.1d },  [x5], x6", 3, -4)
1252MEM_TEST("ld2r {v17.4s , v18.4s },  [x5], x6", 3, -3)
1253MEM_TEST("ld2r {v18.2s , v19.2s },  [x5], x6", 3, -2)
1254MEM_TEST("ld2r {v19.8h , v20.8h },  [x5], x6", 3, -1)
1255MEM_TEST("ld2r {v17.4h , v18.4h },  [x5], x6", 3, 1)
1256MEM_TEST("ld2r {v18.16b, v19.16b},  [x5], x6", 3, 2)
1257MEM_TEST("ld2r {v19.8b , v20.8b },  [x5], x6", 3, 3)
1258
1259
1260//////////////////////////////////////////////////////////////////
1261printf("LD3R (single structure, replicate)\n");
1262
1263MEM_TEST("ld3r {v17.2d , v18.2d , v19.2d },  [x5]", 3, -5)
1264MEM_TEST("ld3r {v18.1d , v19.1d , v20.1d },  [x5]", 3, -4)
1265MEM_TEST("ld3r {v17.4s , v18.4s , v19.4s },  [x5]", 3, -3)
1266MEM_TEST("ld3r {v18.2s , v19.2s , v20.2s },  [x5]", 3, -2)
1267MEM_TEST("ld3r {v17.8h , v18.8h , v19.8h },  [x5]", 3, -5)
1268MEM_TEST("ld3r {v18.4h , v19.4h , v20.4h },  [x5]", 3, -4)
1269MEM_TEST("ld3r {v17.16b, v18.16b, v19.16b},  [x5]", 3, -3)
1270MEM_TEST("ld3r {v18.8b , v19.8b , v20.8b },  [x5]", 3, -2)
1271
1272MEM_TEST("ld3r {v17.2d , v18.2d , v19.2d },  [x5], #24", 3, -5)
1273MEM_TEST("ld3r {v18.1d , v19.1d , v20.1d },  [x5], #24", 3, -4)
1274MEM_TEST("ld3r {v17.4s , v18.4s , v19.4s },  [x5], #12", 3, -3)
1275MEM_TEST("ld3r {v18.2s , v19.2s , v20.2s },  [x5], #12", 3, -2)
1276MEM_TEST("ld3r {v17.8h , v18.8h , v19.8h },  [x5], #6", 3, -5)
1277MEM_TEST("ld3r {v18.4h , v19.4h , v20.4h },  [x5], #6", 3, -4)
1278MEM_TEST("ld3r {v17.16b, v18.16b, v19.16b},  [x5], #3", 3, -3)
1279MEM_TEST("ld3r {v18.8b , v19.8b , v20.8b },  [x5], #3", 3, -2)
1280
1281MEM_TEST("ld3r {v17.2d , v18.2d , v19.2d },  [x5], x6", 3, -5)
1282MEM_TEST("ld3r {v18.1d , v19.1d , v20.1d },  [x5], x6", 3, -4)
1283MEM_TEST("ld3r {v17.4s , v18.4s , v19.4s },  [x5], x6", 3, -3)
1284MEM_TEST("ld3r {v18.2s , v19.2s , v20.2s },  [x5], x6", 3, -2)
1285MEM_TEST("ld3r {v17.8h , v18.8h , v19.8h },  [x5], x6", 3, -5)
1286MEM_TEST("ld3r {v18.4h , v19.4h , v20.4h },  [x5], x6", 3, -4)
1287MEM_TEST("ld3r {v17.16b, v18.16b, v19.16b},  [x5], x6", 3, -3)
1288MEM_TEST("ld3r {v18.8b , v19.8b , v20.8b },  [x5], x6", 3, -2)
1289
1290
1291////////////////////////////////////////////////////////////////
1292printf("LD4R (single structure, replicate)\n");
1293
1294MEM_TEST("ld4r {v17.2d , v18.2d , v19.2d , v20.2d },  [x5]", 3, -5)
1295MEM_TEST("ld4r {v17.1d , v18.1d , v19.1d , v20.1d },  [x5]", 3, -4)
1296MEM_TEST("ld4r {v17.4s , v18.4s , v19.4s , v20.4s },  [x5]", 3, -3)
1297MEM_TEST("ld4r {v17.2s , v18.2s , v19.2s , v20.2s },  [x5]", 3, -2)
1298MEM_TEST("ld4r {v17.8h , v18.8h , v19.8h , v20.8h },  [x5]", 3, -5)
1299MEM_TEST("ld4r {v17.4h , v18.4h , v19.4h , v20.4h },  [x5]", 3, -4)
1300MEM_TEST("ld4r {v17.16b, v18.16b, v19.16b, v20.16b},  [x5]", 3, -3)
1301MEM_TEST("ld4r {v17.8b , v18.8b , v19.8b , v20.8b },  [x5]", 3, -2)
1302
1303MEM_TEST("ld4r {v17.2d , v18.2d , v19.2d , v20.2d },  [x5], #32", 3, -5)
1304MEM_TEST("ld4r {v17.1d , v18.1d , v19.1d , v20.1d },  [x5], #32", 3, -4)
1305MEM_TEST("ld4r {v17.4s , v18.4s , v19.4s , v20.4s },  [x5], #16", 3, -3)
1306MEM_TEST("ld4r {v17.2s , v18.2s , v19.2s , v20.2s },  [x5], #16", 3, -2)
1307MEM_TEST("ld4r {v17.8h , v18.8h , v19.8h , v20.8h },  [x5], #8", 3, -5)
1308MEM_TEST("ld4r {v17.4h , v18.4h , v19.4h , v20.4h },  [x5], #8", 3, -4)
1309MEM_TEST("ld4r {v17.16b, v18.16b, v19.16b, v20.16b},  [x5], #4", 3, -3)
1310MEM_TEST("ld4r {v17.8b , v18.8b , v19.8b , v20.8b },  [x5], #4", 3, -2)
1311
1312MEM_TEST("ld4r {v17.2d , v18.2d , v19.2d , v20.2d },  [x5], x6", 3, -5)
1313MEM_TEST("ld4r {v17.1d , v18.1d , v19.1d , v20.1d },  [x5], x6", 3, -4)
1314MEM_TEST("ld4r {v17.4s , v18.4s , v19.4s , v20.4s },  [x5], x6", 3, -3)
1315MEM_TEST("ld4r {v17.2s , v18.2s , v19.2s , v20.2s },  [x5], x6", 3, -2)
1316MEM_TEST("ld4r {v17.8h , v18.8h , v19.8h , v20.8h },  [x5], x6", 3, -5)
1317MEM_TEST("ld4r {v17.4h , v18.4h , v19.4h , v20.4h },  [x5], x6", 3, -4)
1318MEM_TEST("ld4r {v17.16b, v18.16b, v19.16b, v20.16b},  [x5], x6", 3, -3)
1319MEM_TEST("ld4r {v17.8b , v18.8b , v19.8b , v20.8b },  [x5], x6", 3, -2)
1320
1321
1322////////////////////////////////////////////////////////////////
1323printf("LD1/ST1 (single 1-elem struct to/from one lane of 1 reg\n");
1324
1325MEM_TEST("st1 {v19.d}[0], [x5]",       17,  7)
1326MEM_TEST("st1 {v19.d}[0], [x5], #8",   -9, 12)
1327MEM_TEST("st1 {v19.d}[0], [x5], x6",   9, 13)
1328
1329MEM_TEST("st1 {v19.d}[1], [x5]",       17,  7)
1330MEM_TEST("st1 {v19.d}[1], [x5], #8",   -9, 12)
1331MEM_TEST("st1 {v19.d}[1], [x5], x6",   9, 13)
1332
1333MEM_TEST("st1 {v19.s}[0], [x5]",       17,  7)
1334MEM_TEST("st1 {v19.s}[0], [x5], #4",   -9, 12)
1335MEM_TEST("st1 {v19.s}[0], [x5], x6",   9, 13)
1336
1337MEM_TEST("st1 {v19.s}[3], [x5]",       17,  7)
1338MEM_TEST("st1 {v19.s}[3], [x5], #4",   -9, 12)
1339MEM_TEST("st1 {v19.s}[3], [x5], x6",   9, 13)
1340
1341MEM_TEST("st1 {v19.h}[0], [x5]",       17,  7)
1342MEM_TEST("st1 {v19.h}[0], [x5], #2",   -9, 12)
1343MEM_TEST("st1 {v19.h}[0], [x5], x6",   9, 13)
1344
1345MEM_TEST("st1 {v19.h}[6], [x5]",       17,  7)
1346MEM_TEST("st1 {v19.h}[6], [x5], #2",   -9, 12)
1347MEM_TEST("st1 {v19.h}[6], [x5], x6",   9, 13)
1348
1349MEM_TEST("st1 {v19.b}[0], [x5]",       17,  7)
1350MEM_TEST("st1 {v19.b}[0], [x5], #1",   -9, 12)
1351MEM_TEST("st1 {v19.b}[0], [x5], x6",   9, 13)
1352
1353MEM_TEST("st1 {v19.b}[13], [x5]",      17,  7)
1354MEM_TEST("st1 {v19.b}[13], [x5], #1",  -9, 12)
1355MEM_TEST("st1 {v19.b}[13], [x5], x6",  9, 13)
1356
1357
1358MEM_TEST("ld1 {v19.d}[0], [x5]",       17,  7)
1359MEM_TEST("ld1 {v19.d}[0], [x5], #8",   -9, 12)
1360MEM_TEST("ld1 {v19.d}[0], [x5], x6",   9, 13)
1361
1362MEM_TEST("ld1 {v19.d}[1], [x5]",       17,  7)
1363MEM_TEST("ld1 {v19.d}[1], [x5], #8",   -9, 12)
1364MEM_TEST("ld1 {v19.d}[1], [x5], x6",   9, 13)
1365
1366MEM_TEST("ld1 {v19.s}[0], [x5]",       17,  7)
1367MEM_TEST("ld1 {v19.s}[0], [x5], #4",   -9, 12)
1368MEM_TEST("ld1 {v19.s}[0], [x5], x6",   9, 13)
1369
1370MEM_TEST("ld1 {v19.s}[3], [x5]",       17,  7)
1371MEM_TEST("ld1 {v19.s}[3], [x5], #4",   -9, 12)
1372MEM_TEST("ld1 {v19.s}[3], [x5], x6",   9, 13)
1373
1374MEM_TEST("ld1 {v19.h}[0], [x5]",       17,  7)
1375MEM_TEST("ld1 {v19.h}[0], [x5], #2",   -9, 12)
1376MEM_TEST("ld1 {v19.h}[0], [x5], x6",   9, 13)
1377
1378MEM_TEST("ld1 {v19.h}[6], [x5]",       17,  7)
1379MEM_TEST("ld1 {v19.h}[6], [x5], #2",   -9, 12)
1380MEM_TEST("ld1 {v19.h}[6], [x5], x6",   9, 13)
1381
1382MEM_TEST("ld1 {v19.b}[0], [x5]",       17,  7)
1383MEM_TEST("ld1 {v19.b}[0], [x5], #1",   -9, 12)
1384MEM_TEST("ld1 {v19.b}[0], [x5], x6",   9, 13)
1385
1386MEM_TEST("ld1 {v19.b}[13], [x5]",      17,  7)
1387MEM_TEST("ld1 {v19.b}[13], [x5], #1",  -9, 12)
1388MEM_TEST("ld1 {v19.b}[13], [x5], x6",  9, 13)
1389
1390
1391////////////////////////////////////////////////////////////////
1392printf("LD2/ST2 (single 2-elem struct to/from one lane of 2 regs\n");
1393
1394MEM_TEST("st2 {v18.d, v19.d}[0], [x5]",       17,  7)
1395MEM_TEST("st2 {v18.d, v19.d}[0], [x5], #16",  -9, 12)
1396MEM_TEST("st2 {v18.d, v19.d}[0], [x5], x6",   9, 13)
1397
1398MEM_TEST("st2 {v18.d, v19.d}[1], [x5]",       17,  7)
1399MEM_TEST("st2 {v18.d, v19.d}[1], [x5], #16",  -9, 12)
1400MEM_TEST("st2 {v18.d, v19.d}[1], [x5], x6",   9, 13)
1401
1402MEM_TEST("st2 {v18.s, v19.s}[0], [x5]",       17,  7)
1403MEM_TEST("st2 {v18.s, v19.s}[0], [x5], #8",   -9, 12)
1404MEM_TEST("st2 {v18.s, v19.s}[0], [x5], x6",   9, 13)
1405
1406MEM_TEST("st2 {v18.s, v19.s}[3], [x5]",       17,  7)
1407MEM_TEST("st2 {v18.s, v19.s}[3], [x5], #8",   -9, 12)
1408MEM_TEST("st2 {v18.s, v19.s}[3], [x5], x6",   9, 13)
1409
1410MEM_TEST("st2 {v18.h, v19.h}[0], [x5]",       17,  7)
1411MEM_TEST("st2 {v18.h, v19.h}[0], [x5], #4",   -9, 12)
1412MEM_TEST("st2 {v18.h, v19.h}[0], [x5], x6",   9, 13)
1413
1414MEM_TEST("st2 {v18.h, v19.h}[6], [x5]",       17,  7)
1415MEM_TEST("st2 {v18.h, v19.h}[6], [x5], #4",   -9, 12)
1416MEM_TEST("st2 {v18.h, v19.h}[6], [x5], x6",   9, 13)
1417
1418MEM_TEST("st2 {v18.b, v19.b}[0], [x5]",       17,  7)
1419MEM_TEST("st2 {v18.b, v19.b}[0], [x5], #2",   -9, 12)
1420MEM_TEST("st2 {v18.b, v19.b}[0], [x5], x6",   9, 13)
1421
1422MEM_TEST("st2 {v18.b, v19.b}[13], [x5]",      17,  7)
1423MEM_TEST("st2 {v18.b, v19.b}[13], [x5], #2",  -9, 12)
1424MEM_TEST("st2 {v18.b, v19.b}[13], [x5], x6",  9, 13)
1425
1426
1427MEM_TEST("ld2 {v18.d, v19.d}[0], [x5]",       17,  7)
1428MEM_TEST("ld2 {v18.d, v19.d}[0], [x5], #16",  -9, 12)
1429MEM_TEST("ld2 {v18.d, v19.d}[0], [x5], x6",   9, 13)
1430
1431MEM_TEST("ld2 {v18.d, v19.d}[1], [x5]",       17,  7)
1432MEM_TEST("ld2 {v18.d, v19.d}[1], [x5], #16",  -9, 12)
1433MEM_TEST("ld2 {v18.d, v19.d}[1], [x5], x6",   9, 13)
1434
1435MEM_TEST("ld2 {v18.s, v19.s}[0], [x5]",       17,  7)
1436MEM_TEST("ld2 {v18.s, v19.s}[0], [x5], #8",   -9, 12)
1437MEM_TEST("ld2 {v18.s, v19.s}[0], [x5], x6",   9, 13)
1438
1439MEM_TEST("ld2 {v18.s, v19.s}[3], [x5]",       17,  7)
1440MEM_TEST("ld2 {v18.s, v19.s}[3], [x5], #8",   -9, 12)
1441MEM_TEST("ld2 {v18.s, v19.s}[3], [x5], x6",   9, 13)
1442
1443MEM_TEST("ld2 {v18.h, v19.h}[0], [x5]",       17,  7)
1444MEM_TEST("ld2 {v18.h, v19.h}[0], [x5], #4",   -9, 12)
1445MEM_TEST("ld2 {v18.h, v19.h}[0], [x5], x6",   9, 13)
1446
1447MEM_TEST("ld2 {v18.h, v19.h}[6], [x5]",       17,  7)
1448MEM_TEST("ld2 {v18.h, v19.h}[6], [x5], #4",   -9, 12)
1449MEM_TEST("ld2 {v18.h, v19.h}[6], [x5], x6",   9, 13)
1450
1451MEM_TEST("ld2 {v18.b, v19.b}[0], [x5]",       17,  7)
1452MEM_TEST("ld2 {v18.b, v19.b}[0], [x5], #2",   -9, 12)
1453MEM_TEST("ld2 {v18.b, v19.b}[0], [x5], x6",   9, 13)
1454
1455MEM_TEST("ld2 {v18.b, v19.b}[13], [x5]",      17,  7)
1456MEM_TEST("ld2 {v18.b, v19.b}[13], [x5], #2",  -9, 12)
1457MEM_TEST("ld2 {v18.b, v19.b}[13], [x5], x6",  9, 13)
1458
1459
1460////////////////////////////////////////////////////////////////
1461printf("LD3/ST3 (single 3-elem struct to/from one lane of 3 regs\n");
1462
1463MEM_TEST("st3 {v17.d, v18.d, v19.d}[0], [x5]",       17,  7)
1464MEM_TEST("st3 {v17.d, v18.d, v19.d}[0], [x5], #24",  -9, 12)
1465MEM_TEST("st3 {v17.d, v18.d, v19.d}[0], [x5], x6",   9, 13)
1466
1467MEM_TEST("st3 {v17.d, v18.d, v19.d}[1], [x5]",       17,  7)
1468MEM_TEST("st3 {v17.d, v18.d, v19.d}[1], [x5], #24",  -9, 12)
1469MEM_TEST("st3 {v17.d, v18.d, v19.d}[1], [x5], x6",   9, 13)
1470
1471MEM_TEST("st3 {v17.s, v18.s, v19.s}[0], [x5]",       17,  7)
1472MEM_TEST("st3 {v17.s, v18.s, v19.s}[0], [x5], #12",  -9, 12)
1473MEM_TEST("st3 {v17.s, v18.s, v19.s}[0], [x5], x6",   9, 13)
1474
1475MEM_TEST("st3 {v17.s, v18.s, v19.s}[3], [x5]",       17,  7)
1476MEM_TEST("st3 {v17.s, v18.s, v19.s}[3], [x5], #12",  -9, 12)
1477MEM_TEST("st3 {v17.s, v18.s, v19.s}[3], [x5], x6",   9, 13)
1478
1479MEM_TEST("st3 {v17.h, v18.h, v19.h}[0], [x5]",       17,  7)
1480MEM_TEST("st3 {v17.h, v18.h, v19.h}[0], [x5], #6",   -9, 12)
1481MEM_TEST("st3 {v17.h, v18.h, v19.h}[0], [x5], x6",   9, 13)
1482
1483MEM_TEST("st3 {v17.h, v18.h, v19.h}[6], [x5]",       17,  7)
1484MEM_TEST("st3 {v17.h, v18.h, v19.h}[6], [x5], #6",   -9, 12)
1485MEM_TEST("st3 {v17.h, v18.h, v19.h}[6], [x5], x6",   9, 13)
1486
1487MEM_TEST("st3 {v17.b, v18.b, v19.b}[0], [x5]",       17,  7)
1488MEM_TEST("st3 {v17.b, v18.b, v19.b}[0], [x5], #3",   -9, 12)
1489MEM_TEST("st3 {v17.b, v18.b, v19.b}[0], [x5], x6",   9, 13)
1490
1491MEM_TEST("st3 {v17.b, v18.b, v19.b}[13], [x5]",      17,  7)
1492MEM_TEST("st3 {v17.b, v18.b, v19.b}[13], [x5], #3",  -9, 12)
1493MEM_TEST("st3 {v17.b, v18.b, v19.b}[13], [x5], x6",  9, 13)
1494
1495
1496MEM_TEST("ld3 {v17.d, v18.d, v19.d}[0], [x5]",       17,  7)
1497MEM_TEST("ld3 {v17.d, v18.d, v19.d}[0], [x5], #24",  -9, 12)
1498MEM_TEST("ld3 {v17.d, v18.d, v19.d}[0], [x5], x6",   9, 13)
1499
1500MEM_TEST("ld3 {v17.d, v18.d, v19.d}[1], [x5]",       17,  7)
1501MEM_TEST("ld3 {v17.d, v18.d, v19.d}[1], [x5], #24",  -9, 12)
1502MEM_TEST("ld3 {v17.d, v18.d, v19.d}[1], [x5], x6",   9, 13)
1503
1504MEM_TEST("ld3 {v17.s, v18.s, v19.s}[0], [x5]",       17,  7)
1505MEM_TEST("ld3 {v17.s, v18.s, v19.s}[0], [x5], #12",  -9, 12)
1506MEM_TEST("ld3 {v17.s, v18.s, v19.s}[0], [x5], x6",   9, 13)
1507
1508MEM_TEST("ld3 {v17.s, v18.s, v19.s}[3], [x5]",       17,  7)
1509MEM_TEST("ld3 {v17.s, v18.s, v19.s}[3], [x5], #12",  -9, 12)
1510MEM_TEST("ld3 {v17.s, v18.s, v19.s}[3], [x5], x6",   9, 13)
1511
1512MEM_TEST("ld3 {v17.h, v18.h, v19.h}[0], [x5]",       17,  7)
1513MEM_TEST("ld3 {v17.h, v18.h, v19.h}[0], [x5], #6",   -9, 12)
1514MEM_TEST("ld3 {v17.h, v18.h, v19.h}[0], [x5], x6",   9, 13)
1515
1516MEM_TEST("ld3 {v17.h, v18.h, v19.h}[6], [x5]",       17,  7)
1517MEM_TEST("ld3 {v17.h, v18.h, v19.h}[6], [x5], #6",   -9, 12)
1518MEM_TEST("ld3 {v17.h, v18.h, v19.h}[6], [x5], x6",   9, 13)
1519
1520MEM_TEST("ld3 {v17.b, v18.b, v19.b}[0], [x5]",       17,  7)
1521MEM_TEST("ld3 {v17.b, v18.b, v19.b}[0], [x5], #3",   -9, 12)
1522MEM_TEST("ld3 {v17.b, v18.b, v19.b}[0], [x5], x6",   9, 13)
1523
1524MEM_TEST("ld3 {v17.b, v18.b, v19.b}[13], [x5]",      17,  7)
1525MEM_TEST("ld3 {v17.b, v18.b, v19.b}[13], [x5], #3",  -9, 12)
1526MEM_TEST("ld3 {v17.b, v18.b, v19.b}[13], [x5], x6",  9, 13)
1527
1528
1529////////////////////////////////////////////////////////////////
1530printf("LD4/ST4 (single 4-elem struct to/from one lane of 4 regs\n");
1531
1532MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[0], [x5]",       17,  7)
1533MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[0], [x5], #32",  -9, 12)
1534MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[0], [x5], x6",   9, 13)
1535
1536MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[1], [x5]",       17,  7)
1537MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[1], [x5], #32",  -9, 12)
1538MEM_TEST("st4 {v17.d, v18.d, v19.d, v20.d}[1], [x5], x6",   9, 13)
1539
1540MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[0], [x5]",       17,  7)
1541MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[0], [x5], #16",  -9, 12)
1542MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[0], [x5], x6",   9, 13)
1543
1544MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[3], [x5]",       17,  7)
1545MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[3], [x5], #16",  -9, 12)
1546MEM_TEST("st4 {v17.s, v18.s, v19.s, v20.s}[3], [x5], x6",   9, 13)
1547
1548MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[0], [x5]",       17,  7)
1549MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[0], [x5], #8",   -9, 12)
1550MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[0], [x5], x6",   9, 13)
1551
1552MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[6], [x5]",       17,  7)
1553MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[6], [x5], #8",   -9, 12)
1554MEM_TEST("st4 {v17.h, v18.h, v19.h, v20.h}[6], [x5], x6",   9, 13)
1555
1556MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[0], [x5]",       17,  7)
1557MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[0], [x5], #4",   -9, 12)
1558MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[0], [x5], x6",   9, 13)
1559
1560MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[13], [x5]",      17,  7)
1561MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[13], [x5], #4",  -9, 12)
1562MEM_TEST("st4 {v17.b, v18.b, v19.b, v20.b}[13], [x5], x6",  9, 13)
1563
1564
1565MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[0], [x5]",       17,  7)
1566MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[0], [x5], #32",  -9, 12)
1567MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[0], [x5], x6",   9, 13)
1568
1569MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[1], [x5]",       17,  7)
1570MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[1], [x5], #32",  -9, 12)
1571MEM_TEST("ld4 {v17.d, v18.d, v19.d, v20.d}[1], [x5], x6",   9, 13)
1572
1573MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[0], [x5]",       17,  7)
1574MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[0], [x5], #16",  -9, 12)
1575MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[0], [x5], x6",   9, 13)
1576
1577MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[3], [x5]",       17,  7)
1578MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[3], [x5], #16",  -9, 12)
1579MEM_TEST("ld4 {v17.s, v18.s, v19.s, v20.s}[3], [x5], x6",   9, 13)
1580
1581MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[0], [x5]",       17,  7)
1582MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[0], [x5], #8",   -9, 12)
1583MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[0], [x5], x6",   9, 13)
1584
1585MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[6], [x5]",       17,  7)
1586MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[6], [x5], #8",   -9, 12)
1587MEM_TEST("ld4 {v17.h, v18.h, v19.h, v20.h}[6], [x5], x6",   9, 13)
1588
1589MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[0], [x5]",       17,  7)
1590MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[0], [x5], #4",   -9, 12)
1591MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[0], [x5], x6",   9, 13)
1592
1593MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[13], [x5]",      17,  7)
1594MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[13], [x5], #4",  -9, 12)
1595MEM_TEST("ld4 {v17.b, v18.b, v19.b, v20.b}[13], [x5], x6",  9, 13)
1596
1597////////////////////////////////////////////////////////////////
1598printf("PRFM (immediate)\n");
1599
1600MEM_TEST("prfm pldl1keep, [x5, #40]",  12, -4);
1601MEM_TEST("prfm pstl3strm, [x5, #56]",  12, -4);
1602
1603} /* end of test_memory2() */
1604
1605////////////////////////////////////////////////////////////////
1606////////////////////////////////////////////////////////////////
1607////////////////////////////////////////////////////////////////
1608////////////////////////////////////////////////////////////////
1609////////////////////////////////////////////////////////////////
1610////////////////////////////////////////////////////////////////
1611
1612int main ( void )
1613{
1614  if (1) test_memory_old();
1615  if (1) test_memory_new();
1616  return 0;
1617}
1618