vfp.c revision 751c1e6e1657cbafe30baaf36ad9bd011c3a179b
1#include <stdio.h>
2
3unsigned int mem[] = {
4   0x4095A266, 0x66666666,
5   0xBFF00000, 0x00000000,
6   0x3FF00000, 0x00000000,
7   0x252a2e2b, 0x262d2d2a,
8   0xFFFFFFFF, 0xFFFFFFFF,
9   0x41D26580, 0xB487E5C9,
10   0x42026580, 0xB750E388,
11   0x3E45798E, 0xE2308C3A,
12   0x3FBF9ADD, 0x3746F65F
13};
14
15float fs_f[] = {
16   0, 456.2489562, 3, -1,
17   1384.6, -7.2945676, 1000000000, -5786.47,
18   1752, 0.0024575, 0.00000001, -248562.76,
19   -45786.476, 456.2489562, 34.00046, 45786.476,
20   1752065, 107, -45667.24, -7.2945676,
21   -347856.475, 356047.56, -1.0, 23.04
22};
23
24double fs_d[] = {
25   0, 456.2489562, 3, -1,
26   1384.6, -7.2945676, 1000000000, -5786.47,
27   1752, 0.0024575, 0.00000001, -248562.76,
28   -45786.476, 456.2489562, 34.00046, 45786.476,
29   1752065, 107, -45667.24, -7.2945676,
30   -347856.475, 356047.56, -1.0, 23.04
31};
32
33double mem1[] = {
34   0, 0, 0, 0,
35   0, 0, 0, 0,
36   0, 0, 0, 0,
37   0, 0, 0, 0
38};
39
40float mem1f[] = {
41   0, 0, 0, 0,
42   0, 0, 0, 0,
43   0, 0, 0, 0,
44   0, 0, 0, 0
45};
46// ldc1 $f0, 0($t1)
47#define TESTINSN5LOAD(instruction, RTval, offset, RT) \
48{ \
49    double out; \
50    int out1; \
51    int out2; \
52   __asm__ volatile( \
53     "move $t1, %3\n\t" \
54     "li $t0, " #RTval"\n\t" \
55     instruction "\n\t" \
56     "mov.d %0, $" #RT "\n\t" \
57     "mfc1 %1, $" #RT "\n\t" \
58     "mfc1 %2, $f1\n\t" \
59     : "=&f" (out), "=&r" (out1), "=&r" (out2) \
60	 : "r" (mem), "r" (RTval) \
61	 : "cc", "memory" \
62	 ); \
63   printf("%s :: ft 0x%x%x\n", \
64          instruction, out1, out2); \
65}
66
67// lwc1 $f0, 0($t1)
68#define TESTINSN5LOADw(instruction, RTval, offset, RT) \
69{ \
70    double out; \
71    int out1; \
72   __asm__ volatile( \
73     "move $t1, %2\n\t" \
74     "li $t0, " #RTval"\n\t" \
75     instruction "\n\t" \
76     "mov.d %0, $" #RT "\n\t" \
77     "mfc1 %1, $" #RT "\n\t" \
78     : "=&f" (out), "=&r" (out1) \
79	 : "r" (mem), "r" (RTval) \
80	 : "cc", "memory" \
81	 ); \
82   printf("%s :: ft 0x%x\n", \
83          instruction, out1); \
84}
85
86// lwxc1 $f0, $a3($v0)
87#define TESTINSN6LOADw(instruction, indexVal, fd, index, base) \
88{ \
89    int out; \
90   __asm__ volatile( \
91     "move $" #base ", %1\n\t" \
92     "li $" #index ", " #indexVal"\n\t" \
93     instruction "\n\t" \
94     "mfc1 %0, $" #fd "\n\t" \
95     : "=&r" (out) \
96	 : "r" (mem) \
97	 : "cc", "memory" \
98	 ); \
99   printf("%s :: ft 0x%x\n", \
100          instruction, out); \
101}
102
103// ldxc1 $f0, $a3($v0)
104#define TESTINSN6LOADd(instruction, indexVal, fd, index, base) \
105{ \
106    int out1; \
107    int out2; \
108   __asm__ volatile( \
109     "move $" #base ", %2\n\t" \
110     "li $" #index ", " #indexVal"\n\t" \
111     instruction "\n\t" \
112     "mfc1 %0, $" #fd "\n\t" \
113     "mfc1 %1, $f1\n\t" \
114     : "=&r" (out1), "=&r" (out2) \
115	 : "r" (mem) \
116	 : "cc", "memory" \
117	 ); \
118   printf("%s :: ft lo: 0x%x, ft hi: 0x%x\n", \
119          instruction, out1, out2); \
120}
121// sdc1 $f0, 0($t0)
122#define TESTINST1(offset) \
123{ \
124    unsigned int out; \
125   __asm__ volatile( \
126     "move $t0, %1\n\t" \
127     "move $t1, %2\n\t" \
128     "ldc1 $f0, "#offset"($t1)\n\t" \
129     "sdc1 $f0, "#offset"($t0) \n\t" \
130     "lw %0, "#offset"($t0)\n\t" \
131     : "=&r" (out) \
132	 : "r" (mem1), "r" (fs_d) \
133	 : "t1", "t0", "cc", "memory" \
134	 ); \
135   printf("sdc1 $f0, 0($t0) :: out: 0x%x\n", \
136           out); \
137}
138
139// sdxc1 $f0, $t2($t0)
140#define TESTINST1a(offset) \
141{ \
142    unsigned int out; \
143    unsigned int out1; \
144   __asm__ volatile( \
145     "move $t0, %2\n\t" \
146     "move $t1, %3\n\t" \
147     "li $t2, "#offset"\n\t" \
148     "ldc1 $f0, "#offset"($t1)\n\t" \
149     "sdxc1 $f0, $t2($t0) \n\t" \
150     "lw %0, "#offset"($t0)\n\t" \
151     "addi $t0, $t0, 4 \n\t" \
152     "lw %1, "#offset"($t0)\n\t" \
153     : "=&r" (out), "=&r" (out1) \
154	 : "r" (mem1), "r" (fs_d) \
155	 : "t2", "t1", "t0", "cc", "memory" \
156	 ); \
157   printf("sdc1 $f0, #t2($t0) :: out: 0x%x : out1: 0x%x\n", \
158           out, out1); \
159}
160
161// swc1 $f0, 0($t0)
162#define TESTINST2(offset) \
163{ \
164    unsigned int out; \
165   __asm__ volatile( \
166     "move $t0, %1\n\t" \
167     "move $t1, %2\n\t" \
168     "lwc1 $f0, "#offset"($t1)\n\t" \
169     "swc1 $f0, "#offset"($t0) \n\t" \
170     "lw %0, "#offset"($t0)\n\t" \
171     : "=&r" (out) \
172	 : "r" (mem1f), "r" (fs_f) \
173	 : "t1", "t0", "cc", "memory" \
174	 ); \
175   printf("swc1 $f0, 0($t0) :: out: 0x%x\n", \
176           out); \
177}
178
179// SWXC1 $f0, $t2($t0)
180#define TESTINST2a(offset) \
181{ \
182    unsigned int out; \
183   __asm__ volatile( \
184     "move $t0, %1\n\t" \
185     "move $t1, %2\n\t" \
186     "li $t2, "#offset" \n\t" \
187     "lwc1 $f0, "#offset"($t1)\n\t" \
188     "swxc1 $f0, $t2($t0) \n\t" \
189     "lw %0, "#offset"($t0)\n\t" \
190     : "=&r" (out) \
191	 : "r" (mem1f), "r" (fs_f) \
192	 : "t2", "t1", "t0", "cc", "memory" \
193	 ); \
194   printf("swxc1 $f0, 0($t0) :: out: 0x%x\n", \
195           out); \
196}
197void ppMem(double *m, int len)
198{
199   int i;
200   printf("MEM1:\n");
201   for (i = 0; i < len; i=i+4)
202   {
203      printf("%lf, %lf, %lf, %lf\n", m[i], m[i+1], m[i+2], m[i+3]);
204      m[i] = 0;
205      m[i+1] = 0;
206      m[i+2] = 0;
207      m[i+3] = 0;
208   }
209}
210
211void ppMemF(float *m, int len)
212{
213   int i;
214   printf("MEM1:\n");
215   for (i = 0; i < len; i=i+4)
216   {
217      printf("%lf, %lf, %lf, %lf\n", m[i], m[i+1], m[i+2], m[i+3]);
218      m[i] = 0;
219      m[i+1] = 0;
220      m[i+2] = 0;
221      m[i+3] = 0;
222   }
223}
224
225int main()
226{
227   printf("LDC1\n");
228   TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
229   TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
230   TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
231   TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
232   TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
233   TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0);
234   TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0);
235   TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0);
236   TESTINSN5LOAD("ldc1 $f0, 64($t1)", 0, 64, f0);
237   TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
238   TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
239   TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
240   TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
241   TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
242   TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0);
243   TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0);
244   TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0);
245   TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
246   TESTINSN5LOAD("ldc1 $f0, 8($t1)", 0, 8, f0);
247   TESTINSN5LOAD("ldc1 $f0, 16($t1)", 0, 16, f0);
248   TESTINSN5LOAD("ldc1 $f0, 24($t1)", 0, 24, f0);
249   TESTINSN5LOAD("ldc1 $f0, 32($t1)", 0, 32, f0);
250   TESTINSN5LOAD("ldc1 $f0, 40($t1)", 0, 40, f0);
251   TESTINSN5LOAD("ldc1 $f0, 48($t1)", 0, 48, f0);
252   TESTINSN5LOAD("ldc1 $f0, 56($t1)", 0, 56, f0);
253   TESTINSN5LOAD("ldc1 $f0, 64($t1)", 0, 64, f0);
254   TESTINSN5LOAD("ldc1 $f0, 0($t1)", 0, 0, f0);
255
256   printf("LWC1\n");
257   TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
258   TESTINSN5LOADw("lwc1 $f0, 4($t1)", 0, 4, f0);
259   TESTINSN5LOADw("lwc1 $f0, 8($t1)", 0, 8, f0);
260   TESTINSN5LOADw("lwc1 $f0, 12($t1)", 0, 12, f0);
261   TESTINSN5LOADw("lwc1 $f0, 16($t1)", 0, 16, f0);
262   TESTINSN5LOADw("lwc1 $f0, 20($t1)", 0, 20, f0);
263   TESTINSN5LOADw("lwc1 $f0, 24($t1)", 0, 24, f0);
264   TESTINSN5LOADw("lwc1 $f0, 28($t1)", 0, 28, f0);
265   TESTINSN5LOADw("lwc1 $f0, 32($t1)", 0, 32, f0);
266   TESTINSN5LOADw("lwc1 $f0, 36($t1)", 0, 36, f0);
267   TESTINSN5LOADw("lwc1 $f0, 40($t1)", 0, 40, f0);
268   TESTINSN5LOADw("lwc1 $f0, 44($t1)", 0, 44, f0);
269   TESTINSN5LOADw("lwc1 $f0, 48($t1)", 0, 48, f0);
270   TESTINSN5LOADw("lwc1 $f0, 52($t1)", 0, 52, f0);
271   TESTINSN5LOADw("lwc1 $f0, 56($t1)", 0, 56, f0);
272   TESTINSN5LOADw("lwc1 $f0, 60($t1)", 0, 60, f0);
273   TESTINSN5LOADw("lwc1 $f0, 64($t1)", 0, 64, f0);
274   TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
275   TESTINSN5LOADw("lwc1 $f0, 8($t1)", 0, 8, f0);
276   TESTINSN5LOADw("lwc1 $f0, 16($t1)", 0, 16, f0);
277   TESTINSN5LOADw("lwc1 $f0, 24($t1)", 0, 24, f0);
278   TESTINSN5LOADw("lwc1 $f0, 32($t1)", 0, 32, f0);
279   TESTINSN5LOADw("lwc1 $f0, 40($t1)", 0, 40, f0);
280   TESTINSN5LOADw("lwc1 $f0, 48($t1)", 0, 48, f0);
281   TESTINSN5LOADw("lwc1 $f0, 56($t1)", 0, 56, f0);
282   TESTINSN5LOADw("lwc1 $f0, 64($t1)", 0, 64, f0);
283   TESTINSN5LOADw("lwc1 $f0, 0($t1)", 0, 0, f0);
284
285#if (__mips==32) && (__mips_isa_rev>=2)
286   printf("LWXC1\n");
287   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 0, f0, a3, v0);
288   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 4, f0, a3, v0);
289   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 8, f0, a3, v0);
290   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 12, f0, a3, v0);
291   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 16, f0, a3, v0);
292   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 20, f0, a3, v0);
293   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 24, f0, a3, v0);
294   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 28, f0, a3, v0);
295   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 32, f0, a3, v0);
296   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 36, f0, a3, v0);
297   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 40, f0, a3, v0);
298   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 44, f0, a3, v0);
299   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 48, f0, a3, v0);
300   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 52, f0, a3, v0);
301   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 56, f0, a3, v0);
302   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 60, f0, a3, v0);
303   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 64, f0, a3, v0);
304   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 0, f0, a3, v0);
305   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 4, f0, a3, v0);
306   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 8, f0, a3, v0);
307   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 12, f0, a3, v0);
308   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 16, f0, a3, v0);
309   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 20, f0, a3, v0);
310   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 24, f0, a3, v0);
311   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 28, f0, a3, v0);
312   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 32, f0, a3, v0);
313   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 36, f0, a3, v0);
314   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 40, f0, a3, v0);
315   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 44, f0, a3, v0);
316   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 48, f0, a3, v0);
317   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 52, f0, a3, v0);
318   TESTINSN6LOADw("lwxc1 $f0, $a3($v0)", 56, f0, a3, v0);
319
320   printf("LDXC1\n");
321   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
322   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
323   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
324   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
325   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
326   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0);
327   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0);
328   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0);
329   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0);
330   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
331   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
332   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
333   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
334   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
335   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0);
336   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0);
337   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0);
338   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0);
339   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
340   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
341   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
342   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
343   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
344   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 40, f0, a3, v0);
345   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 48, f0, a3, v0);
346   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 56, f0, a3, v0);
347   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 64, f0, a3, v0);
348   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 0, f0, a3, v0);
349   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 8, f0, a3, v0);
350   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 16, f0, a3, v0);
351   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 24, f0, a3, v0);
352   TESTINSN6LOADd("ldxc1 $f0, $a3($v0)", 32, f0, a3, v0);
353#endif
354
355   printf("SDC1\n");
356   TESTINST1(0);
357   TESTINST1(8);
358   TESTINST1(16);
359   TESTINST1(24);
360   TESTINST1(32);
361   TESTINST1(40);
362   TESTINST1(48);
363   TESTINST1(56);
364   TESTINST1(64);
365   ppMem(mem1, 16);
366
367#if (__mips==32) && (__mips_isa_rev>=2)
368   printf("SDXC1\n");
369   TESTINST1a(0);
370   TESTINST1a(8);
371   TESTINST1a(16);
372   TESTINST1a(24);
373   TESTINST1a(32);
374   TESTINST1a(40);
375   TESTINST1a(48);
376   TESTINST1a(56);
377   TESTINST1a(64);
378   ppMem(mem1, 16);
379#endif
380
381   printf("SWC1\n");
382   TESTINST2(0);
383   TESTINST2(8);
384   TESTINST2(16);
385   TESTINST2(24);
386   TESTINST2(32);
387   TESTINST2(40);
388   TESTINST2(48);
389   TESTINST2(56);
390   TESTINST2(64);
391   ppMemF(mem1f, 16);
392
393#if (__mips==32) && (__mips_isa_rev>=2)
394   printf("SWXC1\n");
395   TESTINST2a(0);
396   TESTINST2a(8);
397   TESTINST2a(16);
398   TESTINST2a(24);
399   TESTINST2a(32);
400   TESTINST2a(40);
401   TESTINST2a(48);
402   TESTINST2a(56);
403   TESTINST2a(64);
404   ppMemF(mem1f, 16);
405#endif
406
407   return 0;
408}
409
410