| /art/compiler/dex/ |
| H A D | mir_dataflow.cc | 1062 void MIRGraph::HandleSSAUse(int* uses, int dalvik_reg, int reg_index) { argument
1064 uses[reg_index] = vreg_to_ssa_map_[dalvik_reg];
1079 mir->ssa_rep->uses = arena_->AllocArray<int32_t>(num_uses, kArenaAllocDFInfo);
1100 HandleSSAUse(mir->ssa_rep->uses, d_insn->arg[i], i);
1113 HandleSSAUse(mir->ssa_rep->uses, d_insn->vC+i, i);
1130 HandleSSAUse(mir->ssa_rep->uses, d_insn.vA, 0);
1132 HandleSSAUse(mir->ssa_rep->uses, d_insn.vA + 1, 1);
1153 HandleSSAUse(mir->ssa_rep->uses, d_insn.vB, 0);
1155 HandleSSAUse(mir->ssa_rep->uses, d_insn.vB + 1, 1);
1161 HandleSSAUse(mir->ssa_rep->uses, d_ins
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| H A D | local_value_numbering_test.cc | 50 int32_t uses[kMaxSsaUses]; member in struct:art::LocalValueNumberingTest::MIRDef
160 mir->ssa_rep->uses = const_cast<int32_t*>(def->uses); // Not modified by LVN.
164 mir->offset = i; // LVN uses offset only for debug output
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| H A D | ssa_transformation.cc | 518 int* uses = mir->ssa_rep->uses; local
525 uses[idx] = pred_bb->data_flow_info->vreg_to_ssa_map_exit[v_reg];
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| H A D | global_value_numbering_test.cc | 66 int32_t uses[kMaxSsaUses]; member in struct:art::GlobalValueNumberingTest::MIRDef
261 mir->ssa_rep->uses = const_cast<int32_t*>(def->uses); // Not modified by LVN.
265 mir->offset = i; // LVN uses offset only for debug output
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| H A D | gvn_dead_code_elimination_test.cc | 66 int32_t uses[kMaxSsaUses]; member in struct:art::GvnDeadCodeEliminationTest::MIRDef
247 int SRegToVReg(int32_t* uses, size_t* use, bool wide) { argument
248 int v_reg = SRegToVReg(uses[*use], wide);
250 CHECK_EQ(uses[*use] + 1, uses[*use + 1]);
289 std::copy_n(def->uses, def->num_uses, mir->ssa_rep->uses);
295 mir->offset = i; // LVN uses offset only for debug output
310 mir->dalvikInsn.vA = SRegToVReg(mir->ssa_rep->uses, &use, (df_attrs & DF_A_WIDE) != 0);
313 mir->dalvikInsn.vB = SRegToVReg(mir->ssa_rep->uses,
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| H A D | type_inference.cc | 168 int32_t s_reg = check_cast->ssa_rep->uses[0];
266 sregs[entry.first->ssa_rep->uses[0]].MergeNonArrayFlags(
320 auto sreg_it = split_sreg_data_.find(mir->ssa_rep->uses[0]);
333 int32_t s_reg = check_cast->ssa_rep->uses[0];
431 const int32_t* uses = mir->ssa_rep->uses; local
436 int32_t input_mod_s_reg = PhiInputModifiedSReg(uses[pred_idx], bb, pred_idx);
451 int32_t input_mod_s_reg = PhiInputModifiedSReg(uses[pred_idx], bb, pred_idx);
461 const int32_t* uses = mir->ssa_rep->uses; local
523 const int32_t* uses = mir->ssa_rep->uses; local
731 const int32_t* uses = mir->ssa_rep->uses; local
860 DCHECK_EQ(ModifiedSReg(uses[0]), uses[0]); local
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| H A D | type_inference_test.cc | 69 int32_t uses[kMaxSsaUses]; member in struct:art::TypeInferenceTest::MIRDef
429 mir->ssa_rep->uses = const_cast<int32_t*>(def->uses); // Not modified by LVN.
433 mir->offset = i; // LVN uses offset only for debug output
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| H A D | local_value_numbering.cc | 388 int s_reg = pred_bb->last_mir_insn->ssa_rep->uses[0];
705 int s_reg = least_entries_bb->last_mir_insn->ssa_rep->uses[0];
1115 uint16_t base = GetOperandValue(mir->ssa_rep->uses[0]);
1134 const int32_t* uses = mir->ssa_rep->uses; local
1135 const int32_t* uses_end = uses + mir->ssa_rep->num_uses;
1136 while (uses != uses_end) {
1137 uint16_t sreg = *uses;
1138 ++uses;
1169 int32_t* uses local
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| H A D | mir_graph.cc | 1304 int uses = (ssa_rep != nullptr) ? ssa_rep->num_uses : 0; local
1314 if (defs > 0 && uses > 0) {
1318 GetSSANameWithConst(ssa_rep->uses[0], true).c_str()));
1320 for (int i = 1; i < uses; i++) {
1321 decoded_mir->append(StringPrintf(", %s:%d", GetSSANameWithConst(ssa_rep->uses[i], true).c_str(), incoming[i]));
1336 decoded_mir->append(GetSSANameWithConst(ssa_rep->uses[0], false));
1337 if (uses > 1) {
1339 decoded_mir->append(GetSSANameWithConst(ssa_rep->uses[1], false));
1352 decoded_mir->append(GetSSANameWithConst(ssa_rep->uses[0], false));
1353 for (int i = 1; i < uses;
1529 int uses = (ssa_rep != nullptr) ? ssa_rep->num_uses : 0; local
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| H A D | mir_graph.h | 223 * uses/defs retain the Dalvik convention that long operations operate on a pair of 32-bit
224 * vregs. For example, "ADD_LONG v0, v2, v3" would have 2 defs (v0/v1) and 4 uses (v2/v3, v4/v5).
230 * 1. Add accessors for uses/defs and make data private
235 int32_t* uses; member in struct:art::SSARepresentation
875 RegLocation res = reg_location_[mir->ssa_rep->uses[num]];
1219 * @brief Count the uses in the BasicBlock
1306 void HandleSSAUse(int* uses, int dalvik_reg, int reg_index);
1340 * @details To check whether one of first MIR's uses of vregs is redefined by the second MIR,
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| /art/compiler/optimizing/ |
| H A D | nodes.h | 997 explicit HUseIterator(const HUseList<T>& uses) : current_(uses.GetFirst()) {} argument
1413 // update the uses lists.
1417 // copying, the uses lists are being updated.
1458 // uses of this instruction by `other` are *not* updated.
1545 // When doing liveness analysis, instructions that have uses get an SSA index.
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