| /art/compiler/dex/quick/mips/ |
| H A D | call_mips.cc | 167 LoadConstant(r_key, low_key);
220 LoadConstant(reset_reg, 0);
446 cg->LoadConstant(cg->TargetPtrReg(kInvokeTgt), direct_code);
455 cg->LoadConstant(cg->TargetReg(kArg0, kRef), direct_method);
482 cg->LoadConstant(cg->TargetPtrReg(kInvokeTgt), direct_code);
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| H A D | int_mips.cc | 154 LoadConstant(t_reg, check_value);
171 LoadConstant(t_reg, check_value);
286 LoadConstant(rs_dest, true_val);
288 LoadConstant(rs_dest, false_val);
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| H A D | utility_mips.cc | 449 res = LoadConstant(r_dest, value);
458 res = LoadConstant(r_scratch, value);
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| /art/compiler/dex/quick/arm/ |
| H A D | int_arm.cc | 139 LoadConstant(t_reg, -1);
148 LoadConstant(t_reg, 1);
230 LoadConstant(rs_dest, code == kCondEq ? false_val : true_val);
237 LoadConstant(rs_dest, true_val); // .eq case - load true
238 LoadConstant(rs_dest, false_val); // .eq case - load true
267 LoadConstant(rl_result.reg, false_val);
273 LoadConstant(rl_result.reg, false_val);
278 LoadConstant(rl_result.reg, true_val);
279 LoadConstant(rl_result.reg, false_val);
285 LoadConstant(t_reg
[all...] |
| H A D | call_arm.cc | 83 LoadConstant(r_idx, size);
343 LoadConstant(reset_reg, 0);
651 cg->LoadConstant(cg->TargetPtrReg(kInvokeTgt), direct_code);
658 cg->LoadConstant(cg->TargetReg(kArg0, kRef), direct_method);
688 cg->LoadConstant(cg->TargetPtrReg(kInvokeTgt), direct_code);
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| H A D | fp_arm.cc | 328 LoadConstant(rl_result.reg, default_result);
336 LoadConstant(rl_result.reg, default_result);
348 LoadConstant(rl_result.reg, 0);
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| H A D | utility_arm.cc | 629 res = LoadConstant(r_tmp, value);
644 LoadConstant(r_scratch, value);
1015 LoadConstant(reg_offset, displacement >> scale);
1157 LoadConstant(r_scratch, displacement >> scale);
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| /art/compiler/dex/quick/ |
| H A D | gen_invoke.cc | 111 LoadConstant(TargetReg(kArg0, kNotWide), arg0);
139 LoadConstant(TargetReg(kArg0, kNotWide), arg0);
140 LoadConstant(TargetReg(kArg1, kNotWide), arg1);
154 LoadConstant(TargetReg(kArg0, kNotWide), arg0);
164 LoadConstant(TargetReg(kArg1, kNotWide), arg1);
173 LoadConstant(TargetReg(kArg0, kNotWide), arg0);
182 LoadConstant(TargetReg(kArg1, kNotWide), arg1);
191 LoadConstant(TargetReg(kArg0, kNotWide), arg0);
322 LoadConstant(TargetReg(kArg2, kNotWide), arg2);
332 LoadConstant(TargetRe
[all...] |
| H A D | gen_common.cc | 256 m2l_->LoadConstant(arg0_32, index_);
608 LoadConstant(r_idx, static_cast<int>(elems - 1));
1167 LoadConstant(result_reg, 0); // assume false
1198 LoadConstant(result_reg, 1); // .eq case - load true
1264 LoadConstant(rl_result.reg, 0);
1287 LoadConstant(rl_result.reg, 1); // .eq case - load true
1298 LoadConstant(rl_result.reg, 1); // assume true
1724 LoadConstant(rl_result.reg, 0);
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| H A D | gen_loadstore.cc | 31 LIR* Mir2Lir::LoadConstant(RegStorage r_dest, int value) { function in class:art::Mir2Lir
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| H A D | mir_to_lir.cc | 418 LoadConstant(rl_dest.reg, static_cast<int>(special.d.data));
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| H A D | mir_to_lir.h | 974 virtual LIR* LoadConstant(RegStorage r_dest, int value);
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| /art/compiler/dex/quick/arm64/ |
| H A D | fp_arm64.cc | 311 LoadConstant(rl_result.reg, default_result);
319 LoadConstant(rl_result.reg, default_result);
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| H A D | call_arm64.cc | 76 LoadConstant(r_idx, size);
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| H A D | utility_arm64.cc | 925 LoadConstant(r_scratch, value);
973 res = LoadConstant(r_tmp, value);
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| H A D | int_arm64.cc | 432 LoadConstant(r_magic, magic_table[lit].magic32);
620 LoadConstant(lit_temp, lit);
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| /art/compiler/dex/quick/x86/ |
| H A D | call_x86.cc | 368 cg->LoadConstant(target_reg, direct_method);
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| H A D | int_x86.cc | 717 LoadConstant(rs_r0, magic);
1564 x86_m2l->LoadConstant(m2l_->TargetReg(kArg0, kNotWide), index_);
2581 LoadConstant(rl_result.reg.GetLow(), 0);
2585 LoadConstant(rl_result.reg.GetLow(), 0);
2617 LoadConstant(rl_result.reg.GetHigh(), 0);
2621 LoadConstant(rl_result.reg.GetHigh(), 0);
3024 LoadConstant(result_reg, 0);
3392 LoadConstant(r_tmp.GetLow(), 0);
3413 LoadConstant(r_tmp.GetHigh(), 0);
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| H A D | fp_x86.cc | 239 LoadConstant(rl_result.reg, 0x7fffffff);
260 LoadConstant(rl_result.reg, 0x7fffffff);
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