1efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* 2efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Copyright (C) 2012 The Android Open Source Project 3efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * 4efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Licensed under the Apache License, Version 2.0 (the "License"); 5efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * you may not use this file except in compliance with the License. 6efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * You may obtain a copy of the License at 7efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * 8efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * http://www.apache.org/licenses/LICENSE-2.0 9efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * 10efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Unless required by applicable law or agreed to in writing, software 11efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * distributed under the License is distributed on an "AS IS" BASIS, 12efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * See the License for the specific language governing permissions and 14efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * limitations under the License. 15efc6369224b036a1fb77849f7ae65b3492c832c0buzbee */ 16efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 170b9203e7996ee1856f620f95d95d8a273c43a3dfAndreas Gampe#include "codegen_x86.h" 180b9203e7996ee1856f620f95d95d8a273c43a3dfAndreas Gampe 196dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev#include <cstdarg> 20f3e2cc4a38389aa75eb8ee3973a535254bf1c8d2Nicolas Geoffray#include <inttypes.h> 216dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev#include <string> 22f3e2cc4a38389aa75eb8ee3973a535254bf1c8d2Nicolas Geoffray 238366ca0d7ba3b80a2d5be65ba436446cc32440bdElliott Hughes#include "arch/instruction_set_features.h" 243d21bdf8894e780d349c481e5c9e29fe1556051cMathieu Chartier#include "art_method.h" 2553c913bb71b218714823c8c87a1f92830c336f61Andreas Gampe#include "backend_x86.h" 260b9203e7996ee1856f620f95d95d8a273c43a3dfAndreas Gampe#include "base/logging.h" 270b9203e7996ee1856f620f95d95d8a273c43a3dfAndreas Gampe#include "dex/compiler_ir.h" 287940e44f4517de5e2634a7e07d58d0fb26160513Brian Carlstrom#include "dex/quick/mir_to_lir-inl.h" 29b5860fb459f1ed71f39d8a87b45bee6727d79fe8buzbee#include "dex/reg_storage_eq.h" 300b9203e7996ee1856f620f95d95d8a273c43a3dfAndreas Gampe#include "driver/compiler_driver.h" 317e70b002c4552347ed1af8c002a0e13f08864f20Ian Rogers#include "mirror/array-inl.h" 32e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell#include "mirror/string.h" 33b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A#include "oat.h" 34641ce0371c2f0dc95d26be02d8366124c8b66653Brian Carlstrom#include "x86_lir.h" 35efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 36efc6369224b036a1fb77849f7ae65b3492c832c0buzbeenamespace art { 37efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 38089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_regs_arr_32[] = { 399ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_rAX, rs_rCX, rs_rDX, rs_rBX, rs_rX86_SP_32, rs_rBP, rs_rSI, rs_rDI, 409ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 41089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_regs_arr_64[] = { 4276af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko rs_rAX, rs_rCX, rs_rDX, rs_rBX, rs_rX86_SP_32, rs_rBP, rs_rSI, rs_rDI, 43091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_r8, rs_r9, rs_r10, rs_r11, rs_r12, rs_r13, rs_r14, rs_r15 44efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 45089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_regs_arr_64q[] = { 460999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko rs_r0q, rs_r1q, rs_r2q, rs_r3q, rs_rX86_SP_64, rs_r5q, rs_r6q, rs_r7q, 47a20468c004264592f309a548fc71ba62a69b8742Dmitry Petrochenko rs_r8q, rs_r9q, rs_r10q, rs_r11q, rs_r12q, rs_r13q, rs_r14q, rs_r15q 480999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko}; 49089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage sp_regs_arr_32[] = { 509ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_fr0, rs_fr1, rs_fr2, rs_fr3, rs_fr4, rs_fr5, rs_fr6, rs_fr7, 519ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 52089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage sp_regs_arr_64[] = { 53091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_fr0, rs_fr1, rs_fr2, rs_fr3, rs_fr4, rs_fr5, rs_fr6, rs_fr7, 54091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_fr8, rs_fr9, rs_fr10, rs_fr11, rs_fr12, rs_fr13, rs_fr14, rs_fr15 55efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 56089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage dp_regs_arr_32[] = { 579ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_dr0, rs_dr1, rs_dr2, rs_dr3, rs_dr4, rs_dr5, rs_dr6, rs_dr7, 589ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 59089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage dp_regs_arr_64[] = { 60091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_dr0, rs_dr1, rs_dr2, rs_dr3, rs_dr4, rs_dr5, rs_dr6, rs_dr7, 61091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_dr8, rs_dr9, rs_dr10, rs_dr11, rs_dr12, rs_dr13, rs_dr14, rs_dr15 62efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 63c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovstatic constexpr RegStorage xp_regs_arr_32[] = { 64c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_xr0, rs_xr1, rs_xr2, rs_xr3, rs_xr4, rs_xr5, rs_xr6, rs_xr7, 65c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov}; 66c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovstatic constexpr RegStorage xp_regs_arr_64[] = { 67c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_xr0, rs_xr1, rs_xr2, rs_xr3, rs_xr4, rs_xr5, rs_xr6, rs_xr7, 68c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_xr8, rs_xr9, rs_xr10, rs_xr11, rs_xr12, rs_xr13, rs_xr14, rs_xr15 69c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov}; 70089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage reserved_regs_arr_32[] = {rs_rX86_SP_32}; 7176af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenkostatic constexpr RegStorage reserved_regs_arr_64[] = {rs_rX86_SP_32}; 72089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage reserved_regs_arr_64q[] = {rs_rX86_SP_64}; 73089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_temps_arr_32[] = {rs_rAX, rs_rCX, rs_rDX, rs_rBX}; 74089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_temps_arr_64[] = { 759ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_rAX, rs_rCX, rs_rDX, rs_rSI, rs_rDI, 769ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_r8, rs_r9, rs_r10, rs_r11 779ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 78c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 79c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// How to add register to be available for promotion: 80c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 1) Remove register from array defining temp 81c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 2) Update ClobberCallerSave 82c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 3) Update JNI compiler ABI: 83c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 3.1) add reg in JniCallingConvention method 84c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 3.2) update CoreSpillMask/FpSpillMask 85c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4) Update entrypoints 86c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4.1) Update constants in asm_support_x86_64.h for new frame size 87c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4.2) Remove entry in SmashCallerSaves 88c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4.3) Update jni_entrypoints to spill/unspill new callee save reg 89c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4.4) Update quick_entrypoints to spill/unspill new callee save reg 90c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 5) Update runtime ABI 91c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 5.1) Update quick_method_frame_info with new required spills 92c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 5.2) Update QuickArgumentVisitor with new offsets to gprs and xmms 93c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// Note that you cannot use register corresponding to incoming args 94c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// according to ABI and QCG needs one additional XMM temp for 95c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// bulk copy in preparation to call. 96089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_temps_arr_64q[] = { 970999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko rs_r0q, rs_r1q, rs_r2q, rs_r6q, rs_r7q, 980999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko rs_r8q, rs_r9q, rs_r10q, rs_r11q 990999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko}; 100089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage sp_temps_arr_32[] = { 1019ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_fr0, rs_fr1, rs_fr2, rs_fr3, rs_fr4, rs_fr5, rs_fr6, rs_fr7, 1029ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 103089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage sp_temps_arr_64[] = { 104091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_fr0, rs_fr1, rs_fr2, rs_fr3, rs_fr4, rs_fr5, rs_fr6, rs_fr7, 105c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_fr8, rs_fr9, rs_fr10, rs_fr11 106091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee}; 107089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage dp_temps_arr_32[] = { 1089ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_dr0, rs_dr1, rs_dr2, rs_dr3, rs_dr4, rs_dr5, rs_dr6, rs_dr7, 1099ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 110089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage dp_temps_arr_64[] = { 111091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_dr0, rs_dr1, rs_dr2, rs_dr3, rs_dr4, rs_dr5, rs_dr6, rs_dr7, 112c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_dr8, rs_dr9, rs_dr10, rs_dr11 113091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee}; 114091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee 115089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage xp_temps_arr_32[] = { 116fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell rs_xr0, rs_xr1, rs_xr2, rs_xr3, rs_xr4, rs_xr5, rs_xr6, rs_xr7, 117fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell}; 118089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage xp_temps_arr_64[] = { 119fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell rs_xr0, rs_xr1, rs_xr2, rs_xr3, rs_xr4, rs_xr5, rs_xr6, rs_xr7, 120c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_xr8, rs_xr9, rs_xr10, rs_xr11 121fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell}; 122fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 123089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> empty_pool; 124089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_regs_32(core_regs_arr_32); 125089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_regs_64(core_regs_arr_64); 126089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_regs_64q(core_regs_arr_64q); 127089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> sp_regs_32(sp_regs_arr_32); 128089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> sp_regs_64(sp_regs_arr_64); 129089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> dp_regs_32(dp_regs_arr_32); 130089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> dp_regs_64(dp_regs_arr_64); 131c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovstatic constexpr ArrayRef<const RegStorage> xp_regs_32(xp_regs_arr_32); 132c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovstatic constexpr ArrayRef<const RegStorage> xp_regs_64(xp_regs_arr_64); 133089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> reserved_regs_32(reserved_regs_arr_32); 134089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> reserved_regs_64(reserved_regs_arr_64); 135089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> reserved_regs_64q(reserved_regs_arr_64q); 136089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_temps_32(core_temps_arr_32); 137089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_temps_64(core_temps_arr_64); 138089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_temps_64q(core_temps_arr_64q); 139089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> sp_temps_32(sp_temps_arr_32); 140089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> sp_temps_64(sp_temps_arr_64); 141089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> dp_temps_32(dp_temps_arr_32); 142089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> dp_temps_64(dp_temps_arr_64); 143089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Marko 144089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> xp_temps_32(xp_temps_arr_32); 145089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> xp_temps_64(xp_temps_arr_64); 146fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 1472ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::LocCReturn() { 14800e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee return x86_loc_c_return; 149efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 150efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 151a0cd2d701f29e0bc6275f1b13c0edfd4ec391879buzbeeRegLocation X86Mir2Lir::LocCReturnRef() { 152a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu return cu_->target64 ? x86_64_loc_c_return_ref : x86_loc_c_return_ref; 153a0cd2d701f29e0bc6275f1b13c0edfd4ec391879buzbee} 154a0cd2d701f29e0bc6275f1b13c0edfd4ec391879buzbee 1552ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::LocCReturnWide() { 156dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina return cu_->target64 ? x86_64_loc_c_return_wide : x86_loc_c_return_wide; 157efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 158efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 1592ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::LocCReturnFloat() { 16000e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee return x86_loc_c_return_float; 161efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 162efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 1632ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::LocCReturnDouble() { 16400e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee return x86_loc_c_return_double; 165efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 166efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 167b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers// 32-bit reg storage locations for 32-bit targets. 168b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogersstatic const RegStorage RegStorage32FromSpecialTargetRegister_Target32[] { 169b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kSelf - Thread pointer. 170b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kSuspend - Used to reduce suspend checks for some targets. 171b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kLr - no register as the return address is pushed on entry. 172b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kPc - not exposed on X86 see kX86StartOfMethod. 173b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rX86_SP_32, // kSp 174b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kArg0 175b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rCX, // kArg1 176b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDX, // kArg2 177b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rBX, // kArg3 178b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg4 179b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg5 180b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg6 181b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg7 182966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell rs_fr0, // kFArg0 183966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell rs_fr1, // kFArg1 184966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell rs_fr2, // kFArg2 185966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell rs_fr3, // kFArg3 186b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg4 187b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg5 188b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg6 189b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg7 190b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg8 191b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg9 192b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg10 193b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg11 194b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg12 195b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg13 196b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg14 197b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg15 198b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kRet0 199b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDX, // kRet1 200b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kInvokeTgt 201b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kHiddenArg - used to hold the method index before copying to fr0. 202966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell rs_fr7, // kHiddenFpArg 203b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rCX, // kCount 204b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers}; 205b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers 206b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers// 32-bit reg storage locations for 64-bit targets. 207b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogersstatic const RegStorage RegStorage32FromSpecialTargetRegister_Target64[] { 208b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kSelf - Thread pointer. 209b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kSuspend - Used to reduce suspend checks for some targets. 210b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kLr - no register as the return address is pushed on entry. 21127dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell RegStorage(kRIPReg), // kPc 212b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rX86_SP_32, // kSp 213b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDI, // kArg0 214b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rSI, // kArg1 215b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDX, // kArg2 216b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rCX, // kArg3 217b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_r8, // kArg4 218b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_r9, // kArg5 219b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg6 220b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg7 221b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr0, // kFArg0 222b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr1, // kFArg1 223b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr2, // kFArg2 224b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr3, // kFArg3 225b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr4, // kFArg4 226b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr5, // kFArg5 227b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr6, // kFArg6 228b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr7, // kFArg7 229b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg8 230b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg9 231b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg10 232b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg11 233b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg12 234b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg13 235b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg14 236b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg15 237b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kRet0 238b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDX, // kRet1 239b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kInvokeTgt 240b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kHiddenArg 241b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kHiddenFpArg 242b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rCX, // kCount 243b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers}; 244b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogersstatic_assert(arraysize(RegStorage32FromSpecialTargetRegister_Target32) == 245b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers arraysize(RegStorage32FromSpecialTargetRegister_Target64), 246b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers "Mismatch in RegStorage array sizes"); 247b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers 248a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu// Return a target-dependent special register for 32-bit. 249b28c1c06236751aa5c9e64dcb68b3c940341e496Ian RogersRegStorage X86Mir2Lir::TargetReg32(SpecialTargetRegister reg) const { 250b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_EQ(RegStorage32FromSpecialTargetRegister_Target32[kCount], rs_rCX); 251b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_EQ(RegStorage32FromSpecialTargetRegister_Target64[kCount], rs_rCX); 252b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_LT(reg, arraysize(RegStorage32FromSpecialTargetRegister_Target32)); 253b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers return cu_->target64 ? RegStorage32FromSpecialTargetRegister_Target64[reg] 254b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers : RegStorage32FromSpecialTargetRegister_Target32[reg]; 255efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 256efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 257a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying FuRegStorage X86Mir2Lir::TargetReg(SpecialTargetRegister reg) { 2586a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNUSED(reg); 259a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu LOG(FATAL) << "Do not use this function!!!"; 2606a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNREACHABLE(); 261a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu} 262a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu 263efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* 264efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Decode the register id. 265efc6369224b036a1fb77849f7ae65b3492c832c0buzbee */ 2668dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir MarkoResourceMask X86Mir2Lir::GetRegMaskCommon(const RegStorage& reg) const { 2678dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko /* Double registers in x86 are just a single FP register. This is always just a single bit. */ 2688dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko return ResourceMask::Bit( 2698dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko /* FP register starts at bit position 16 */ 2708dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ((reg.IsFloat() || reg.StorageSize() > 8) ? kX86FPReg0 : 0) + reg.GetRegNum()); 2718dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko} 2728dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko 2738dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir MarkoResourceMask X86Mir2Lir::GetPCUseDefEncoding() const { 2748dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko return kEncodeNone; 275efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 276efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 2778dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Markovoid X86Mir2Lir::SetupTargetResourceMasks(LIR* lir, uint64_t flags, 2788dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ResourceMask* use_mask, ResourceMask* def_mask) { 2796a58cb16d803c9a7b3a75ccac8be19dd9d4e520dDmitry Petrochenko DCHECK(cu_->instruction_set == kX86 || cu_->instruction_set == kX86_64); 280b48819db07f9a0992a72173380c24249d7fc648abuzbee DCHECK(!lir->flags.use_def_invalid); 281efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 282efc6369224b036a1fb77849f7ae65b3492c832c0buzbee // X86-specific resource map setup here. 283efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_USE_SP) { 2848dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko use_mask->SetBit(kX86RegSP); 285efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 286efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 287efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_DEF_SP) { 2888dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko def_mask->SetBit(kX86RegSP); 289efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 290efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 291efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_DEFA) { 2928dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(def_mask, rs_rAX.GetReg()); 293efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 294efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 295efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_DEFD) { 2968dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(def_mask, rs_rDX.GetReg()); 297efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 298efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_USEA) { 2998dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rAX.GetReg()); 300efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 301efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 302efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_USEC) { 3038dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rCX.GetReg()); 304efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 305efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 306efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_USED) { 3078dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rDX.GetReg()); 308efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 30970b797d998f2a28e39f7d6ffc8a07c9cbc47da14Vladimir Marko 31070b797d998f2a28e39f7d6ffc8a07c9cbc47da14Vladimir Marko if (flags & REG_USEB) { 3118dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rBX.GetReg()); 31270b797d998f2a28e39f7d6ffc8a07c9cbc47da14Vladimir Marko } 3134028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 3144028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Fixup hard to describe instruction: Uses rAX, rCX, rDI; sets rDI. 3154028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (lir->opcode == kX86RepneScasw) { 3168dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rAX.GetReg()); 3178dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rCX.GetReg()); 3188dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rDI.GetReg()); 3198dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(def_mask, rs_rDI.GetReg()); 3204028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 321e90501da0222717d75c126ebf89569db3976927eSerguei Katkov 322e90501da0222717d75c126ebf89569db3976927eSerguei Katkov if (flags & USE_FP_STACK) { 3238dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko use_mask->SetBit(kX86FPStack); 3248dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko def_mask->SetBit(kX86FPStack); 325e90501da0222717d75c126ebf89569db3976927eSerguei Katkov } 326efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 327efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 328efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* For dumping instructions */ 329efc6369224b036a1fb77849f7ae65b3492c832c0buzbeestatic const char* x86RegName[] = { 330efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", 331efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 332efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 333efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 334efc6369224b036a1fb77849f7ae65b3492c832c0buzbeestatic const char* x86CondName[] = { 335efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "O", 336efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NO", 337efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "B/NAE/C", 338efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NB/AE/NC", 339efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "Z/EQ", 340efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NZ/NE", 341efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "BE/NA", 342efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NBE/A", 343efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "S", 344efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NS", 345efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "P/PE", 346efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NP/PO", 347efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "L/NGE", 348efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NL/GE", 349efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "LE/NG", 350efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NLE/G" 351efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 352efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 353efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* 354efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Interpret a format string and build a string no longer than size 355efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * See format key in Assemble.cc. 356efc6369224b036a1fb77849f7ae65b3492c832c0buzbee */ 3571fd3346740dfb7f47be9922312b68a4227fada96buzbeestd::string X86Mir2Lir::BuildInsnString(const char *fmt, LIR *lir, unsigned char* base_addr) { 358efc6369224b036a1fb77849f7ae65b3492c832c0buzbee std::string buf; 359efc6369224b036a1fb77849f7ae65b3492c832c0buzbee size_t i = 0; 360efc6369224b036a1fb77849f7ae65b3492c832c0buzbee size_t fmt_len = strlen(fmt); 361efc6369224b036a1fb77849f7ae65b3492c832c0buzbee while (i < fmt_len) { 362efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (fmt[i] != '!') { 363efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += fmt[i]; 364efc6369224b036a1fb77849f7ae65b3492c832c0buzbee i++; 365efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } else { 366efc6369224b036a1fb77849f7ae65b3492c832c0buzbee i++; 367efc6369224b036a1fb77849f7ae65b3492c832c0buzbee DCHECK_LT(i, fmt_len); 368efc6369224b036a1fb77849f7ae65b3492c832c0buzbee char operand_number_ch = fmt[i]; 369efc6369224b036a1fb77849f7ae65b3492c832c0buzbee i++; 370efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (operand_number_ch == '!') { 371efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += "!"; 372efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } else { 373efc6369224b036a1fb77849f7ae65b3492c832c0buzbee int operand_number = operand_number_ch - '0'; 374efc6369224b036a1fb77849f7ae65b3492c832c0buzbee DCHECK_LT(operand_number, 6); // Expect upto 6 LIR operands. 375efc6369224b036a1fb77849f7ae65b3492c832c0buzbee DCHECK_LT(i, fmt_len); 376efc6369224b036a1fb77849f7ae65b3492c832c0buzbee int operand = lir->operands[operand_number]; 377efc6369224b036a1fb77849f7ae65b3492c832c0buzbee switch (fmt[i]) { 378efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 'c': 379efc6369224b036a1fb77849f7ae65b3492c832c0buzbee DCHECK_LT(static_cast<size_t>(operand), sizeof(x86CondName)); 380efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += x86CondName[operand]; 381efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 382efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 'd': 383efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += StringPrintf("%d", operand); 384efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 3855192cbb12856b12620dc346758605baaa1469cedYixin Shou case 'q': { 3865192cbb12856b12620dc346758605baaa1469cedYixin Shou int64_t value = static_cast<int64_t>(static_cast<int64_t>(operand) << 32 | 3875192cbb12856b12620dc346758605baaa1469cedYixin Shou static_cast<uint32_t>(lir->operands[operand_number+1])); 3885192cbb12856b12620dc346758605baaa1469cedYixin Shou buf +=StringPrintf("%" PRId64, value); 389e70f179aca4f13b15be8a47a4d9e5b6c2422c69aHaitao Feng break; 3905192cbb12856b12620dc346758605baaa1469cedYixin Shou } 391efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 'p': { 392f6737f7ed741b15cfd60c2530dab69f897540735Vladimir Marko const EmbeddedData* tab_rec = UnwrapPointer<EmbeddedData>(operand); 393fa57c47f1b72916371a9c2d5c1389219bce655b4buzbee buf += StringPrintf("0x%08x", tab_rec->offset); 394efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 395efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 396efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 'r': 397091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee if (RegStorage::IsFloat(operand)) { 398091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee int fp_reg = RegStorage::RegNum(operand); 399efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += StringPrintf("xmm%d", fp_reg); 400efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } else { 401091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee int reg_num = RegStorage::RegNum(operand); 402091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee DCHECK_LT(static_cast<size_t>(reg_num), sizeof(x86RegName)); 403091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee buf += x86RegName[reg_num]; 404efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 405efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 406efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 't': 407107c31e598b649a8bb8d959d6a0377937e63e624Ian Rogers buf += StringPrintf("0x%08" PRIxPTR " (L%p)", 408107c31e598b649a8bb8d959d6a0377937e63e624Ian Rogers reinterpret_cast<uintptr_t>(base_addr) + lir->offset + operand, 409107c31e598b649a8bb8d959d6a0377937e63e624Ian Rogers lir->target); 410efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 411efc6369224b036a1fb77849f7ae65b3492c832c0buzbee default: 412efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += StringPrintf("DecodeError '%c'", fmt[i]); 413efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 414efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 415efc6369224b036a1fb77849f7ae65b3492c832c0buzbee i++; 416efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 417efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 418efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 419efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return buf; 420efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 421efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 4228dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Markovoid X86Mir2Lir::DumpResourceMask(LIR *x86LIR, const ResourceMask& mask, const char *prefix) { 423efc6369224b036a1fb77849f7ae65b3492c832c0buzbee char buf[256]; 424efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf[0] = 0; 425efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 4268dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.Equals(kEncodeAll)) { 427efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcpy(buf, "all"); 428efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } else { 429efc6369224b036a1fb77849f7ae65b3492c832c0buzbee char num[8]; 430efc6369224b036a1fb77849f7ae65b3492c832c0buzbee int i; 431efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 432efc6369224b036a1fb77849f7ae65b3492c832c0buzbee for (i = 0; i < kX86RegEnd; i++) { 4338dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(i)) { 434988e6ea9ac66edf1e205851df9bb53de3f3763f3Ian Rogers snprintf(num, arraysize(num), "%d ", i); 435efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, num); 436efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 437efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 438efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 4398dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(ResourceMask::kCCode)) { 440efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, "cc "); 441efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 442efc6369224b036a1fb77849f7ae65b3492c832c0buzbee /* Memory bits */ 4438dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (x86LIR && (mask.HasBit(ResourceMask::kDalvikReg))) { 444988e6ea9ac66edf1e205851df9bb53de3f3763f3Ian Rogers snprintf(buf + strlen(buf), arraysize(buf) - strlen(buf), "dr%d%s", 445988e6ea9ac66edf1e205851df9bb53de3f3763f3Ian Rogers DECODE_ALIAS_INFO_REG(x86LIR->flags.alias_info), 446988e6ea9ac66edf1e205851df9bb53de3f3763f3Ian Rogers (DECODE_ALIAS_INFO_WIDE(x86LIR->flags.alias_info)) ? "(+1)" : ""); 447efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 4488dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(ResourceMask::kLiteral)) { 449efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, "lit "); 450efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 451efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 4528dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(ResourceMask::kHeapRef)) { 453efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, "heap "); 454efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 4558dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(ResourceMask::kMustNotAlias)) { 456efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, "noalias "); 457efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 458efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 459efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (buf[0]) { 460efc6369224b036a1fb77849f7ae65b3492c832c0buzbee LOG(INFO) << prefix << ": " << buf; 461efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 462efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 46302031b185b4653e6c72e21f7a51238b903f6d638buzbee 4641fd3346740dfb7f47be9922312b68a4227fada96buzbeevoid X86Mir2Lir::AdjustSpillMask() { 465efc6369224b036a1fb77849f7ae65b3492c832c0buzbee // Adjustment for LR spilling, x86 has no LR so nothing to do here 466091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee core_spill_mask_ |= (1 << rs_rRET.GetRegNum()); 4671fd3346740dfb7f47be9922312b68a4227fada96buzbee num_core_spills_++; 468efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 469efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 470e87f9b5185379c8cf8392d65a63e7bf7e51b97e7Mark MendellRegStorage X86Mir2Lir::AllocateByteRegister() { 4717e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu RegStorage reg = AllocTypedTemp(false, kCoreReg); 472dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (!cu_->target64) { 473b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_LT(reg.GetRegNum(), rs_rX86_SP_32.GetRegNum()); 4747e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu } 4757e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu return reg; 4767e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu} 4777e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu 47860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan BanerjiRegStorage X86Mir2Lir::Get128BitRegister(RegStorage reg) { 479b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return GetRegInfo(reg)->Master()->GetReg(); 48060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 48160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 482b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogersbool X86Mir2Lir::IsByteRegister(RegStorage reg) const { 483b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers return cu_->target64 || reg.GetRegNum() < rs_rX86_SP_32.GetRegNum(); 484e87f9b5185379c8cf8392d65a63e7bf7e51b97e7Mark Mendell} 485e87f9b5185379c8cf8392d65a63e7bf7e51b97e7Mark Mendell 486efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* Clobber all regs that might be used by an external C call */ 48731c2aac7137b69d5622eea09597500731fbee2efVladimir Markovoid X86Mir2Lir::ClobberCallerSave() { 488dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 489c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rAX); 490c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rCX); 491c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rDX); 492c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rSI); 493c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rDI); 494c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 49535ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_r8); 49635ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_r9); 49735ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_r10); 49835ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_r11); 49935ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu 50035ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_fr8); 50135ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_fr9); 50235ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_fr10); 50335ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_fr11); 504c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } else { 505c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rAX); 506c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rCX); 507c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rDX); 508c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rBX); 50935ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu } 510c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 511c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr0); 512c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr1); 513c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr2); 514c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr3); 515c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr4); 516c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr5); 517c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr6); 518c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr7); 519efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 520efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 5211fd3346740dfb7f47be9922312b68a4227fada96buzbeeRegLocation X86Mir2Lir::GetReturnWideAlt() { 52252a77fc135f0e0df57ee24641c3f5ae415ff7bd6buzbee RegLocation res = LocCReturnWide(); 523b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_EQ(res.reg.GetLowReg(), rs_rAX.GetReg()); 524b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_EQ(res.reg.GetHighReg(), rs_rDX.GetReg()); 525091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee Clobber(rs_rAX); 526091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee Clobber(rs_rDX); 527091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee MarkInUse(rs_rAX); 528091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee MarkInUse(rs_rDX); 529091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee MarkWide(res.reg); 530efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return res; 531efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 532efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 5332ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::GetReturnAlt() { 53452a77fc135f0e0df57ee24641c3f5ae415ff7bd6buzbee RegLocation res = LocCReturn(); 535091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee res.reg.SetReg(rs_rDX.GetReg()); 536091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee Clobber(rs_rDX); 537091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee MarkInUse(rs_rDX); 538efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return res; 539efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 540efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 541efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* To be used when explicitly managing register use */ 5422ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromvoid X86Mir2Lir::LockCallTemps() { 543b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg0)); 544b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg1)); 545b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg2)); 546b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg3)); 547966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell LockTemp(TargetReg32(kFArg0)); 548966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell LockTemp(TargetReg32(kFArg1)); 549966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell LockTemp(TargetReg32(kFArg2)); 550966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell LockTemp(TargetReg32(kFArg3)); 551dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 552b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg4)); 553b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg5)); 554b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg4)); 555b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg5)); 556b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg6)); 557b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg7)); 55858994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 559efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 560efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 561efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* To be used when explicitly managing register use */ 5622ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromvoid X86Mir2Lir::FreeCallTemps() { 563b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg0)); 564b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg1)); 565b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg2)); 566b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg3)); 567bfe400bb1a28cde991cdb3e39bc27bae6b04b8c2Vladimir Marko FreeTemp(TargetReg32(kHiddenArg)); 568966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell FreeTemp(TargetReg32(kFArg0)); 569966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell FreeTemp(TargetReg32(kFArg1)); 570966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell FreeTemp(TargetReg32(kFArg2)); 571966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell FreeTemp(TargetReg32(kFArg3)); 572dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 573b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg4)); 574b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg5)); 575b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg4)); 576b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg5)); 577b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg6)); 578b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg7)); 57958994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 580efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 581efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 58299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusorubool X86Mir2Lir::ProvidesFullMemoryBarrier(X86OpCode opcode) { 58399ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru switch (opcode) { 58499ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru case kX86LockCmpxchgMR: 58599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru case kX86LockCmpxchgAR: 5860f9b9c508814a62c6e21c6a06cfe4de39b5036c0Ian Rogers case kX86LockCmpxchg64M: 5870f9b9c508814a62c6e21c6a06cfe4de39b5036c0Ian Rogers case kX86LockCmpxchg64A: 58899ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru case kX86XchgMR: 58999ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru case kX86Mfence: 59099ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Atomic memory instructions provide full barrier. 59199ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru return true; 59299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru default: 59399ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru break; 59499ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 59599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 59699ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Conservative if cannot prove it provides full barrier. 59799ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru return false; 59899ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru} 59999ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 600b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampebool X86Mir2Lir::GenMemBarrier(MemBarrierKind barrier_kind) { 6010b9203e7996ee1856f620f95d95d8a273c43a3dfAndreas Gampe if (!cu_->compiler_driver->GetInstructionSetFeatures()->IsSmp()) { 6028366ca0d7ba3b80a2d5be65ba436446cc32440bdElliott Hughes return false; 6038366ca0d7ba3b80a2d5be65ba436446cc32440bdElliott Hughes } 60499ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Start off with using the last LIR as the barrier. If it is not enough, then we will update it. 60599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru LIR* mem_barrier = last_lir_insn_; 60699ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 607b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe bool ret = false; 60899ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru /* 60948f5c47907654350ce30a8dfdda0e977f5d3d39fHans Boehm * According to the JSR-133 Cookbook, for x86 only StoreLoad/AnyAny barriers need memory fence. 61048f5c47907654350ce30a8dfdda0e977f5d3d39fHans Boehm * All other barriers (LoadAny, AnyStore, StoreStore) are nops due to the x86 memory model. 61148f5c47907654350ce30a8dfdda0e977f5d3d39fHans Boehm * For those cases, all we need to ensure is that there is a scheduling barrier in place. 61299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru */ 61348f5c47907654350ce30a8dfdda0e977f5d3d39fHans Boehm if (barrier_kind == kAnyAny) { 61499ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // If no LIR exists already that can be used a barrier, then generate an mfence. 61599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru if (mem_barrier == nullptr) { 61699ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru mem_barrier = NewLIR0(kX86Mfence); 617b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe ret = true; 61899ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 61999ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 62099ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // If last instruction does not provide full barrier, then insert an mfence. 62199ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru if (ProvidesFullMemoryBarrier(static_cast<X86OpCode>(mem_barrier->opcode)) == false) { 62299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru mem_barrier = NewLIR0(kX86Mfence); 623b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe ret = true; 62499ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 625b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler } else if (barrier_kind == kNTStoreStore) { 626b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler mem_barrier = NewLIR0(kX86Sfence); 627b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler ret = true; 62899ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 62999ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 63099ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Now ensure that a scheduling barrier is in place. 63199ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru if (mem_barrier == nullptr) { 63299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru GenBarrier(); 63399ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } else { 63499ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Mark as a scheduling barrier. 63599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru DCHECK(!mem_barrier->flags.use_def_invalid); 6368dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko mem_barrier->u.m.def_mask = &kEncodeAll; 63799ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 638b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe return ret; 639efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 64000e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee 6411fd3346740dfb7f47be9922312b68a4227fada96buzbeevoid X86Mir2Lir::CompilerInitializeRegAlloc() { 642dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 643e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reg_pool_.reset(new (arena_) RegisterPool(this, arena_, core_regs_64, core_regs_64q, sp_regs_64, 644e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko dp_regs_64, reserved_regs_64, reserved_regs_64q, 645e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko core_temps_64, core_temps_64q, 646e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko sp_temps_64, dp_temps_64)); 6479ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko } else { 648e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reg_pool_.reset(new (arena_) RegisterPool(this, arena_, core_regs_32, empty_pool, sp_regs_32, 649e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko dp_regs_32, reserved_regs_32, empty_pool, 650e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko core_temps_32, empty_pool, 651e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko sp_temps_32, dp_temps_32)); 6529ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko } 653091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee 654091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // Target-specific adjustments. 655091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee 656fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Add in XMM registers. 657c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov const ArrayRef<const RegStorage> *xp_regs = cu_->target64 ? &xp_regs_64 : &xp_regs_32; 658c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov for (RegStorage reg : *xp_regs) { 659fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell RegisterInfo* info = new (arena_) RegisterInfo(reg, GetRegMaskCommon(reg)); 660e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reginfo_map_[reg.GetReg()] = info; 661c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 662c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov const ArrayRef<const RegStorage> *xp_temps = cu_->target64 ? &xp_temps_64 : &xp_temps_32; 663c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov for (RegStorage reg : *xp_temps) { 664c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov RegisterInfo* xp_reg_info = GetRegInfo(reg); 665c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov xp_reg_info->SetIsTemp(true); 666fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 667fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 66827dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell // Special Handling for x86_64 RIP addressing. 66927dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell if (cu_->target64) { 67027dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell RegisterInfo* info = new (arena_) RegisterInfo(RegStorage(kRIPReg), kEncodeNone); 67127dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell reginfo_map_[kRIPReg] = info; 67227dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell } 67327dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell 674091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // Alias single precision xmm to double xmms. 675091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // TODO: as needed, add larger vector sizes - alias all to the largest. 676e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (RegisterInfo* info : reg_pool_->sp_regs_) { 677091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee int sp_reg_num = info->GetReg().GetRegNum(); 678fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell RegStorage xp_reg = RegStorage::Solo128(sp_reg_num); 679fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell RegisterInfo* xp_reg_info = GetRegInfo(xp_reg); 680fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // 128-bit xmm vector register's master storage should refer to itself. 681fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell DCHECK_EQ(xp_reg_info, xp_reg_info->Master()); 682fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 683fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Redirect 32-bit vector's master storage to 128-bit vector. 684fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell info->SetMaster(xp_reg_info); 685fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 68676af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko RegStorage dp_reg = RegStorage::FloatSolo64(sp_reg_num); 687091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee RegisterInfo* dp_reg_info = GetRegInfo(dp_reg); 688fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Redirect 64-bit vector's master storage to 128-bit vector. 689fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell dp_reg_info->SetMaster(xp_reg_info); 69076af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // Singles should show a single 32-bit mask bit, at first referring to the low half. 69176af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko DCHECK_EQ(info->StorageMask(), 0x1U); 69276af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko } 69376af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko 694dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 69576af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // Alias 32bit W registers to corresponding 64bit X registers. 696e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (RegisterInfo* info : reg_pool_->core_regs_) { 69776af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko int x_reg_num = info->GetReg().GetRegNum(); 69876af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko RegStorage x_reg = RegStorage::Solo64(x_reg_num); 69976af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko RegisterInfo* x_reg_info = GetRegInfo(x_reg); 70076af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // 64bit X register's master storage should refer to itself. 70176af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko DCHECK_EQ(x_reg_info, x_reg_info->Master()); 70276af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // Redirect 32bit W master storage to 64bit X. 70376af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko info->SetMaster(x_reg_info); 70476af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // 32bit W should show a single 32-bit mask bit, at first referring to the low half. 70576af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko DCHECK_EQ(info->StorageMask(), 0x1U); 70676af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko } 707efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 708091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee 709091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // Don't start allocating temps at r0/s0/d0 or you may clobber return regs in early-exit methods. 710091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // TODO: adjust for x86/hard float calling convention. 711091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee reg_pool_->next_core_reg_ = 2; 712091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee reg_pool_->next_sp_reg_ = 2; 713091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee reg_pool_->next_dp_reg_ = 1; 714efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 715efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 71660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjiint X86Mir2Lir::VectorRegisterSize() { 71760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return 128; 71860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 71960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 720b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan Aint X86Mir2Lir::NumReservableVectorRegisters(bool long_or_fp) { 721b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int num_vector_temps = cu_->target64 ? xp_temps_64.size() : xp_temps_32.size(); 722b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 723b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Leave a few temps for use by backend as scratch. 724b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return long_or_fp ? num_vector_temps - 2 : num_vector_temps - 1; 72560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 72660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 7271109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbeckystatic dwarf::Reg DwarfCoreReg(bool is_x86_64, int num) { 7281109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky return is_x86_64 ? dwarf::Reg::X86_64Core(num) : dwarf::Reg::X86Core(num); 7291109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky} 7301109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky 7311109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbeckystatic dwarf::Reg DwarfFpReg(bool is_x86_64, int num) { 7321109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky return is_x86_64 ? dwarf::Reg::X86_64Fp(num) : dwarf::Reg::X86Fp(num); 7331109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky} 7341109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky 7351fd3346740dfb7f47be9922312b68a4227fada96buzbeevoid X86Mir2Lir::SpillCoreRegs() { 7361fd3346740dfb7f47be9922312b68a4227fada96buzbee if (num_core_spills_ == 0) { 737efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return; 738efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 739efc6369224b036a1fb77849f7ae65b3492c832c0buzbee // Spill mask not including fake return address register 740091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee uint32_t mask = core_spill_mask_ & ~(1 << rs_rRET.GetRegNum()); 741b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers int offset = 742b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers frame_size_ - (GetInstructionSetPointerSize(cu_->instruction_set) * num_core_spills_); 743c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov OpSize size = cu_->target64 ? k64 : k32; 744b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32; 7451109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky for (int reg = 0; mask != 0u; mask >>= 1, reg++) { 7461109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky if ((mask & 0x1) != 0u) { 7473d21bdf8894e780d349c481e5c9e29fe1556051cMathieu Chartier DCHECK_NE(offset, 0) << "offset 0 should be for method"; 7481109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky RegStorage r_src = cu_->target64 ? RegStorage::Solo64(reg) : RegStorage::Solo32(reg); 7491109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky StoreBaseDisp(rs_rSP, offset, r_src, size, kNotVolatile); 7501109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky cfi_.RelOffset(DwarfCoreReg(cu_->target64, reg), offset); 7519ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko offset += GetInstructionSetPointerSize(cu_->instruction_set); 752efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 753efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 754efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 755efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 7561fd3346740dfb7f47be9922312b68a4227fada96buzbeevoid X86Mir2Lir::UnSpillCoreRegs() { 7571fd3346740dfb7f47be9922312b68a4227fada96buzbee if (num_core_spills_ == 0) { 758efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return; 759efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 760efc6369224b036a1fb77849f7ae65b3492c832c0buzbee // Spill mask not including fake return address register 761091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee uint32_t mask = core_spill_mask_ & ~(1 << rs_rRET.GetRegNum()); 7629ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko int offset = frame_size_ - (GetInstructionSetPointerSize(cu_->instruction_set) * num_core_spills_); 763c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov OpSize size = cu_->target64 ? k64 : k32; 764b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32; 7651109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky for (int reg = 0; mask != 0u; mask >>= 1, reg++) { 7661109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky if ((mask & 0x1) != 0u) { 7671109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky RegStorage r_dest = cu_->target64 ? RegStorage::Solo64(reg) : RegStorage::Solo32(reg); 7681109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky LoadBaseDisp(rs_rSP, offset, r_dest, size, kNotVolatile); 7691109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky cfi_.Restore(DwarfCoreReg(cu_->target64, reg)); 7709ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko offset += GetInstructionSetPointerSize(cu_->instruction_set); 771efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 772efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 773efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 774efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 775c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovvoid X86Mir2Lir::SpillFPRegs() { 776c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov if (num_fp_spills_ == 0) { 777c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov return; 778c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 779c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov uint32_t mask = fp_spill_mask_; 780b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers int offset = frame_size_ - 781b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers (GetInstructionSetPointerSize(cu_->instruction_set) * (num_fp_spills_ + num_core_spills_)); 782b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32; 7831109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky for (int reg = 0; mask != 0u; mask >>= 1, reg++) { 7841109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky if ((mask & 0x1) != 0u) { 785b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers StoreBaseDisp(rs_rSP, offset, RegStorage::FloatSolo64(reg), k64, kNotVolatile); 7861109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky cfi_.RelOffset(DwarfFpReg(cu_->target64, reg), offset); 787c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov offset += sizeof(double); 788c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 789c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 790c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov} 791c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovvoid X86Mir2Lir::UnSpillFPRegs() { 792c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov if (num_fp_spills_ == 0) { 793c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov return; 794c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 795c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov uint32_t mask = fp_spill_mask_; 796b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers int offset = frame_size_ - 797b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers (GetInstructionSetPointerSize(cu_->instruction_set) * (num_fp_spills_ + num_core_spills_)); 798b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32; 7991109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky for (int reg = 0; mask != 0u; mask >>= 1, reg++) { 8001109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky if ((mask & 0x1) != 0u) { 801b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LoadBaseDisp(rs_rSP, offset, RegStorage::FloatSolo64(reg), 802c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov k64, kNotVolatile); 8031109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky cfi_.Restore(DwarfFpReg(cu_->target64, reg)); 804c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov offset += sizeof(double); 805c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 806c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 807c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov} 808c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 809c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 8102ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstrombool X86Mir2Lir::IsUnconditionalBranch(LIR* lir) { 811cbd6d44c0a94f3d26671b5325aa21bbf1335ffe8buzbee return (lir->opcode == kX86Jmp8 || lir->opcode == kX86Jmp32); 812efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 813efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 814674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir MarkoRegisterClass X86Mir2Lir::RegClassForFieldLoadStore(OpSize size, bool is_volatile) { 815ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell // Prefer XMM registers. Fixes a problem with iget/iput to a FP when cached temporary 816ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell // with same VR is a Core register. 817ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell if (size == kSingle || size == kDouble) { 818ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell return kFPReg; 819ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell } 820ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell 821e0ccdc0dd166136cd43e5f54201179a4496d33e8Chao-ying Fu // X86_64 can handle any size. 822dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 82306839f868c9c4bb1f2f6333f9e88a560e80bcad8Chao-ying Fu return RegClassBySize(size); 824e0ccdc0dd166136cd43e5f54201179a4496d33e8Chao-ying Fu } 825e0ccdc0dd166136cd43e5f54201179a4496d33e8Chao-ying Fu 826674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko if (UNLIKELY(is_volatile)) { 827674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko // On x86, atomic 64-bit load/store requires an fp register. 828674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko // Smaller aligned load/store is atomic for both core and fp registers. 829674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko if (size == k64 || size == kDouble) { 830674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko return kFPReg; 831674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko } 832674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko } 833674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko return RegClassBySize(size); 834674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko} 835674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko 836dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena SayapinaX86Mir2Lir::X86Mir2Lir(CompilationUnit* cu, MIRGraph* mir_graph, ArenaAllocator* arena) 83755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell : Mir2Lir(cu, mir_graph, arena), 838717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov in_to_reg_storage_x86_64_mapper_(this), in_to_reg_storage_x86_mapper_(this), 8391961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko pc_rel_base_reg_(RegStorage::InvalidReg()), 8401961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko pc_rel_base_reg_used_(false), 8411961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko setup_pc_rel_base_reg_(nullptr), 842e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko method_address_insns_(arena->Adapter()), 843e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko class_type_address_insns_(arena->Adapter()), 844e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko call_method_insns_(arena->Adapter()), 845dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko dex_cache_access_insns_(arena->Adapter()), 846d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell const_vectors_(nullptr) { 847e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko method_address_insns_.reserve(100); 848e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko class_type_address_insns_.reserve(100); 849e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko call_method_insns_.reserve(100); 8501961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko for (int i = 0; i < kX86Last; i++) { 8511961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko DCHECK_EQ(X86Mir2Lir::EncodingMap[i].opcode, i) 8521961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko << "Encoding order for " << X86Mir2Lir::EncodingMap[i].name 8531961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko << " is wrong: expecting " << i << ", seeing " 8541961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko << static_cast<int>(X86Mir2Lir::EncodingMap[i].opcode); 855efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 8561fd3346740dfb7f47be9922312b68a4227fada96buzbee} 8571fd3346740dfb7f47be9922312b68a4227fada96buzbee 858862a76027076c341c26aa6cd4a30a7cdd6dc2143buzbeeMir2Lir* X86CodeGenerator(CompilationUnit* const cu, MIRGraph* const mir_graph, 859862a76027076c341c26aa6cd4a30a7cdd6dc2143buzbee ArenaAllocator* const arena) { 860dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina return new X86Mir2Lir(cu, mir_graph, arena); 861efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 862efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 863984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe// Not used in x86(-64) 864984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas GampeRegStorage X86Mir2Lir::LoadHelper(QuickEntrypointEnum trampoline) { 8656a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNUSED(trampoline); 8662f244e9faccfcca68af3c5484c397a01a1c3a342Andreas Gampe LOG(FATAL) << "Unexpected use of LoadHelper in x86"; 8676a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNREACHABLE(); 8682f244e9faccfcca68af3c5484c397a01a1c3a342Andreas Gampe} 8692f244e9faccfcca68af3c5484c397a01a1c3a342Andreas Gampe 870b373e091eac39b1a79c11f2dcbd610af01e9e8a9Dave AllisonLIR* X86Mir2Lir::CheckSuspendUsingLoad() { 87169dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison // First load the pointer in fs:[suspend-trigger] into eax 87269dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison // Then use a test instruction to indirect via that address. 873dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison if (cu_->target64) { 874dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison NewLIR2(kX86Mov64RT, rs_rAX.GetReg(), 875dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison Thread::ThreadSuspendTriggerOffset<8>().Int32Value()); 876dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison } else { 877dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison NewLIR2(kX86Mov32RT, rs_rAX.GetReg(), 878dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison Thread::ThreadSuspendTriggerOffset<4>().Int32Value()); 879dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison } 88069dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison return NewLIR3(kX86Test32RM, rs_rAX.GetReg(), rs_rAX.GetReg(), 0); 881b373e091eac39b1a79c11f2dcbd610af01e9e8a9Dave Allison} 882b373e091eac39b1a79c11f2dcbd610af01e9e8a9Dave Allison 8832ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromuint64_t X86Mir2Lir::GetTargetInstFlags(int opcode) { 884409fe94ad529d9334587be80b9f6a3d166805508buzbee DCHECK(!IsPseudoLirOp(opcode)); 8851fd3346740dfb7f47be9922312b68a4227fada96buzbee return X86Mir2Lir::EncodingMap[opcode].flags; 8861bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee} 8871bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee 8882ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromconst char* X86Mir2Lir::GetTargetInstName(int opcode) { 889409fe94ad529d9334587be80b9f6a3d166805508buzbee DCHECK(!IsPseudoLirOp(opcode)); 8901fd3346740dfb7f47be9922312b68a4227fada96buzbee return X86Mir2Lir::EncodingMap[opcode].name; 8911bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee} 8921bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee 8932ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromconst char* X86Mir2Lir::GetTargetInstFmt(int opcode) { 894409fe94ad529d9334587be80b9f6a3d166805508buzbee DCHECK(!IsPseudoLirOp(opcode)); 8951fd3346740dfb7f47be9922312b68a4227fada96buzbee return X86Mir2Lir::EncodingMap[opcode].fmt; 8961bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee} 8971bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee 898d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbeevoid X86Mir2Lir::GenConstWide(RegLocation rl_dest, int64_t value) { 899d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee // Can we do this directly to memory? 900d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee rl_dest = UpdateLocWide(rl_dest); 901d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee if ((rl_dest.location == kLocDalvikFrame) || 902d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee (rl_dest.location == kLocCompilerTemp)) { 903d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee int32_t val_lo = Low32Bits(value); 904d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee int32_t val_hi = High32Bits(value); 905b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers int r_base = rs_rX86_SP_32.GetReg(); 906d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee int displacement = SRegOffset(rl_dest.s_reg_low); 907d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee 9088dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 9092700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR * store = NewLIR3(kX86Mov32MI, r_base, displacement + LOWORD_OFFSET, val_lo); 910d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee AnnotateDalvikRegAccess(store, (displacement + LOWORD_OFFSET) >> 2, 911d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee false /* is_load */, true /* is64bit */); 9122700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee store = NewLIR3(kX86Mov32MI, r_base, displacement + HIWORD_OFFSET, val_hi); 913d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee AnnotateDalvikRegAccess(store, (displacement + HIWORD_OFFSET) >> 2, 914d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee false /* is_load */, true /* is64bit */); 915d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee return; 916d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee } 917d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee 918d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee // Just use the standard code to do the generation. 919d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee Mir2Lir::GenConstWide(rl_dest, value); 920d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee} 921e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell 922e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell// TODO: Merge with existing RegLocation dumper in vreg_analysis.cc 923e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendellvoid X86Mir2Lir::DumpRegLocation(RegLocation loc) { 924e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell LOG(INFO) << "location: " << loc.location << ',' 925e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.wide ? " w" : " ") 926e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.defined ? " D" : " ") 927e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.is_const ? " c" : " ") 928e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.fp ? " F" : " ") 929e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.core ? " C" : " ") 930e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.ref ? " r" : " ") 931e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.high_word ? " h" : " ") 932e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.home ? " H" : " ") 9332700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee << ", low: " << static_cast<int>(loc.reg.GetLowReg()) 93400e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee << ", high: " << static_cast<int>(loc.reg.GetHighReg()) 935e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << ", s_reg: " << loc.s_reg_low 936e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << ", orig: " << loc.orig_sreg; 937e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell} 938e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell 93949161cef10a308aedada18e9aa742498d6e6c8c7Jeff Haovoid X86Mir2Lir::LoadMethodAddress(const MethodReference& target_method, InvokeType type, 94055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell SpecialTargetRegister symbolic_reg) { 94155d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell /* 94255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * For x86, just generate a 32 bit move immediate instruction, that will be filled 94355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * in at 'link time'. For now, put a unique value based on target to ensure that 94455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * code deduplication works. 94555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell */ 94649161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao int target_method_idx = target_method.dex_method_index; 94749161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao const DexFile* target_dex_file = target_method.dex_file; 94849161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao const DexFile::MethodId& target_method_id = target_dex_file->GetMethodId(target_method_idx); 94949161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao uintptr_t target_method_id_ptr = reinterpret_cast<uintptr_t>(&target_method_id); 95055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 95149161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao // Generate the move instruction with the unique pointer and save index, dex_file, and type. 952ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe LIR *move = RawLIR(current_dalvik_offset_, kX86Mov32RI, 953ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe TargetReg(symbolic_reg, kNotWide).GetReg(), 95449161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao static_cast<int>(target_method_id_ptr), target_method_idx, 95549161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao WrapPointer(const_cast<DexFile*>(target_dex_file)), type); 95655d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell AppendLIR(move); 957e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko method_address_insns_.push_back(move); 95855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell} 95955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 960e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shihvoid X86Mir2Lir::LoadClassType(const DexFile& dex_file, uint32_t type_idx, 961e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih SpecialTargetRegister symbolic_reg) { 96255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell /* 96355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * For x86, just generate a 32 bit move immediate instruction, that will be filled 96455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * in at 'link time'. For now, put a unique value based on target to ensure that 96555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * code deduplication works. 96655d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell */ 967e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih const DexFile::TypeId& id = dex_file.GetTypeId(type_idx); 96855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell uintptr_t ptr = reinterpret_cast<uintptr_t>(&id); 96955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 97055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // Generate the move instruction with the unique pointer and save index and type. 971ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe LIR *move = RawLIR(current_dalvik_offset_, kX86Mov32RI, 972ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe TargetReg(symbolic_reg, kNotWide).GetReg(), 973e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih static_cast<int>(ptr), type_idx, 974e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih WrapPointer(const_cast<DexFile*>(&dex_file))); 97555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell AppendLIR(move); 976e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko class_type_address_insns_.push_back(move); 97755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell} 97855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 979f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir MarkoLIR* X86Mir2Lir::CallWithLinkerFixup(const MethodReference& target_method, InvokeType type) { 98055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell /* 98155d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * For x86, just generate a 32 bit call relative instruction, that will be filled 982f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko * in at 'link time'. 98355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell */ 98449161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao int target_method_idx = target_method.dex_method_index; 98549161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao const DexFile* target_dex_file = target_method.dex_file; 98649161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao 98749161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao // Generate the call instruction with the unique pointer and save index, dex_file, and type. 988f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko // NOTE: Method deduplication takes linker patches into account, so we can just pass 0 989f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko // as a placeholder for the offset. 990f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko LIR* call = RawLIR(current_dalvik_offset_, kX86CallI, 0, 99149161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao target_method_idx, WrapPointer(const_cast<DexFile*>(target_dex_file)), type); 99255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell AppendLIR(call); 993e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko call_method_insns_.push_back(call); 99455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell return call; 99555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell} 99655d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 997f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Markostatic LIR* GenInvokeNoInlineCall(Mir2Lir* mir_to_lir, InvokeType type) { 998f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko QuickEntrypointEnum trampoline; 999f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko switch (type) { 1000f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kInterface: 1001f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeInterfaceTrampolineWithAccessCheck; 1002f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 1003f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kDirect: 1004f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeDirectTrampolineWithAccessCheck; 1005f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 1006f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kStatic: 1007f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeStaticTrampolineWithAccessCheck; 1008f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 1009f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kSuper: 1010f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeSuperTrampolineWithAccessCheck; 1011f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 1012f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kVirtual: 1013f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeVirtualTrampolineWithAccessCheck; 1014f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 1015f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko default: 1016f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko LOG(FATAL) << "Unexpected invoke type"; 1017f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeInterfaceTrampolineWithAccessCheck; 1018f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } 1019f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko return mir_to_lir->InvokeTrampoline(kOpBlx, RegStorage::InvalidReg(), trampoline); 1020f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko} 1021f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko 1022f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir MarkoLIR* X86Mir2Lir::GenCallInsn(const MirMethodLoweringInfo& method_info) { 1023f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko LIR* call_insn; 1024f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko if (method_info.FastPath()) { 1025f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko if (method_info.DirectCode() == static_cast<uintptr_t>(-1)) { 1026f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko // We can have the linker fixup a call relative. 1027f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko call_insn = CallWithLinkerFixup(method_info.GetTargetMethod(), method_info.GetSharpType()); 1028f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } else { 1029f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko call_insn = OpMem(kOpBlx, TargetReg(kArg0, kRef), 10303d21bdf8894e780d349c481e5c9e29fe1556051cMathieu Chartier ArtMethod::EntryPointFromQuickCompiledCodeOffset( 10312d7210188805292e463be4bcf7a133b654d7e0eaMathieu Chartier cu_->target64 ? 8 : 4).Int32Value()); 1032f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } 1033f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } else { 1034f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko call_insn = GenInvokeNoInlineCall(this, method_info.GetSharpType()); 1035f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } 1036f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko return call_insn; 1037f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko} 1038f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko 103955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendellvoid X86Mir2Lir::InstallLiteralPools() { 104055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // These are handled differently for x86. 104155d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK(code_literal_list_ == nullptr); 104255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK(method_literal_list_ == nullptr); 104355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK(class_literal_list_ == nullptr); 104455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 1045d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 1046b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (const_vectors_ != nullptr) { 1047b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Vector literals must be 16-byte aligned. The header that is placed 1048b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // in the code section causes misalignment so we take it into account. 1049b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Otherwise, we are sure that for x86 method is aligned to 16. 1050b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A DCHECK_EQ(GetInstructionSetAlignment(cu_->instruction_set), 16u); 1051b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A uint32_t bytes_to_fill = (0x10 - ((code_buffer_.size() + sizeof(OatQuickMethodHeader)) & 0xF)) & 0xF; 1052b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A while (bytes_to_fill > 0) { 1053d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell code_buffer_.push_back(0); 1054b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A bytes_to_fill--; 1055d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1056b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1057d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell for (LIR *p = const_vectors_; p != nullptr; p = p->next) { 105880b96d1a76790527f72a660ac03d9c215eed17ceVladimir Marko Push32(&code_buffer_, p->operands[0]); 105980b96d1a76790527f72a660ac03d9c215eed17ceVladimir Marko Push32(&code_buffer_, p->operands[1]); 106080b96d1a76790527f72a660ac03d9c215eed17ceVladimir Marko Push32(&code_buffer_, p->operands[2]); 106180b96d1a76790527f72a660ac03d9c215eed17ceVladimir Marko Push32(&code_buffer_, p->operands[3]); 1062d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1063d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1064d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 1065dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko patches_.reserve(method_address_insns_.size() + class_type_address_insns_.size() + 1066dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko call_method_insns_.size() + dex_cache_access_insns_.size()); 1067dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko 106855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // Handle the fixups for methods. 1069e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (LIR* p : method_address_insns_) { 107055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK_EQ(p->opcode, kX86Mov32RI); 107149161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao uint32_t target_method_idx = p->operands[2]; 1072f6737f7ed741b15cfd60c2530dab69f897540735Vladimir Marko const DexFile* target_dex_file = UnwrapPointer<DexFile>(p->operands[3]); 107355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 107455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // The offset to patch is the last 4 bytes of the instruction. 107555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell int patch_offset = p->offset + p->flags.size - 4; 1076f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko patches_.push_back(LinkerPatch::MethodPatch(patch_offset, 1077f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko target_dex_file, target_method_idx)); 107855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell } 107955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 108055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // Handle the fixups for class types. 1081e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (LIR* p : class_type_address_insns_) { 108255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK_EQ(p->opcode, kX86Mov32RI); 1083e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih 1084f6737f7ed741b15cfd60c2530dab69f897540735Vladimir Marko const DexFile* class_dex_file = UnwrapPointer<DexFile>(p->operands[3]); 1085f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko uint32_t target_type_idx = p->operands[2]; 108655d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 108755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // The offset to patch is the last 4 bytes of the instruction. 108855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell int patch_offset = p->offset + p->flags.size - 4; 1089f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko patches_.push_back(LinkerPatch::TypePatch(patch_offset, 1090f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko class_dex_file, target_type_idx)); 109155d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell } 109255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 109355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // And now the PC-relative calls to methods. 1094e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (LIR* p : call_method_insns_) { 109555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK_EQ(p->opcode, kX86CallI); 109649161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao uint32_t target_method_idx = p->operands[1]; 1097f6737f7ed741b15cfd60c2530dab69f897540735Vladimir Marko const DexFile* target_dex_file = UnwrapPointer<DexFile>(p->operands[2]); 109855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 109955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // The offset to patch is the last 4 bytes of the instruction. 110055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell int patch_offset = p->offset + p->flags.size - 4; 1101f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko patches_.push_back(LinkerPatch::RelativeCodePatch(patch_offset, 1102f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko target_dex_file, target_method_idx)); 110355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell } 110455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 1105dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko // PC-relative references to dex cache arrays. 1106dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko for (LIR* p : dex_cache_access_insns_) { 11073d21bdf8894e780d349c481e5c9e29fe1556051cMathieu Chartier DCHECK(p->opcode == kX86Mov32RM || p->opcode == kX86Mov64RM); 1108dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko const DexFile* dex_file = UnwrapPointer<DexFile>(p->operands[3]); 1109dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko uint32_t offset = p->operands[4]; 1110dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko // The offset to patch is the last 4 bytes of the instruction. 1111dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko int patch_offset = p->offset + p->flags.size - 4; 1112dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko DCHECK(!p->flags.is_nop); 11131961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko patches_.push_back(LinkerPatch::DexCacheArrayPatch(patch_offset, dex_file, 11141961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko p->target->offset, offset)); 1115dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko } 1116dc56cc509d8e1718ad321f7a91661dbe85ec8cefVladimir Marko 111755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // And do the normal processing. 111855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell Mir2Lir::InstallLiteralPools(); 111955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell} 112055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 112170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolovbool X86Mir2Lir::GenInlinedArrayCopyCharArray(CallInfo* info) { 112270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_src = info->args[0]; 112370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_srcPos = info->args[1]; 112470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_dst = info->args[2]; 112570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_dstPos = info->args[3]; 112670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_length = info->args[4]; 112770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (rl_srcPos.is_const && (mir_graph_->ConstantValue(rl_srcPos) < 0)) { 112870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov return false; 112970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 113070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (rl_dstPos.is_const && (mir_graph_->ConstantValue(rl_dstPos) < 0)) { 113170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov return false; 113270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 113370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov ClobberCallerSave(); 11345a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LockCallTemps(); // Using fixed registers. 11355a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov RegStorage tmp_reg = cu_->target64 ? rs_r11 : rs_rBX; 11365a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_src, rs_rAX); 11375a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_dst, rs_rCX); 11385a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* src_dst_same = OpCmpBranch(kCondEq, rs_rAX, rs_rCX, nullptr); 11395a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* src_null_branch = OpCmpImmBranch(kCondEq, rs_rAX, 0, nullptr); 11405a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* dst_null_branch = OpCmpImmBranch(kCondEq, rs_rCX, 0, nullptr); 11415a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_length, rs_rDX); 11425a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // If the length of the copy is > 128 characters (256 bytes) or negative then go slow path. 11435a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* len_too_big = OpCmpImmBranch(kCondHi, rs_rDX, 128, nullptr); 11445a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_src, rs_rAX); 11455a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadWordDisp(rs_rAX, mirror::Array::LengthOffset().Int32Value(), rs_rAX); 114670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* src_bad_len = nullptr; 1147f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate LIR* src_bad_off = nullptr; 114870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* srcPos_negative = nullptr; 114970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (!rl_srcPos.is_const) { 11505a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_srcPos, tmp_reg); 11515a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov srcPos_negative = OpCmpImmBranch(kCondLt, tmp_reg, 0, nullptr); 1152f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // src_pos < src_len 1153f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_off = OpCmpBranch(kCondLt, rs_rAX, tmp_reg, nullptr); 1154f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // src_len - src_pos < copy_len 1155f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate OpRegRegReg(kOpSub, tmp_reg, rs_rAX, tmp_reg); 1156f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_len = OpCmpBranch(kCondLt, tmp_reg, rs_rDX, nullptr); 115770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } else { 11585a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov int32_t pos_val = mir_graph_->ConstantValue(rl_srcPos.orig_sreg); 115970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (pos_val == 0) { 11605a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov src_bad_len = OpCmpBranch(kCondLt, rs_rAX, rs_rDX, nullptr); 116170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } else { 1162f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // src_pos < src_len 1163f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_off = OpCmpImmBranch(kCondLt, rs_rAX, pos_val, nullptr); 1164f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // src_len - src_pos < copy_len 1165f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate OpRegRegImm(kOpSub, tmp_reg, rs_rAX, pos_val); 1166f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_len = OpCmpBranch(kCondLt, tmp_reg, rs_rDX, nullptr); 116770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 116870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 116970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* dstPos_negative = nullptr; 117070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* dst_bad_len = nullptr; 1171f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate LIR* dst_bad_off = nullptr; 117270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LoadValueDirectFixed(rl_dst, rs_rAX); 117370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LoadWordDisp(rs_rAX, mirror::Array::LengthOffset().Int32Value(), rs_rAX); 117470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (!rl_dstPos.is_const) { 11755a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_dstPos, tmp_reg); 11765a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov dstPos_negative = OpCmpImmBranch(kCondLt, tmp_reg, 0, nullptr); 1177f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // dst_pos < dst_len 1178f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_off = OpCmpBranch(kCondLt, rs_rAX, tmp_reg, nullptr); 1179f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // dst_len - dst_pos < copy_len 1180f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate OpRegRegReg(kOpSub, tmp_reg, rs_rAX, tmp_reg); 1181f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_len = OpCmpBranch(kCondLt, tmp_reg, rs_rDX, nullptr); 118270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } else { 11835a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov int32_t pos_val = mir_graph_->ConstantValue(rl_dstPos.orig_sreg); 118470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (pos_val == 0) { 11855a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov dst_bad_len = OpCmpBranch(kCondLt, rs_rAX, rs_rDX, nullptr); 118670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } else { 1187f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // dst_pos < dst_len 1188f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_off = OpCmpImmBranch(kCondLt, rs_rAX, pos_val, nullptr); 1189f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // dst_len - dst_pos < copy_len 1190f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate OpRegRegImm(kOpSub, tmp_reg, rs_rAX, pos_val); 1191f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_len = OpCmpBranch(kCondLt, tmp_reg, rs_rDX, nullptr); 119270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 119370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 11945a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // Everything is checked now. 11955a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_src, rs_rAX); 11965a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_dst, tmp_reg); 11975a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_srcPos, rs_rCX); 119870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov NewLIR5(kX86Lea32RA, rs_rAX.GetReg(), rs_rAX.GetReg(), 11995a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov rs_rCX.GetReg(), 1, mirror::Array::DataOffset(2).Int32Value()); 12005a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // RAX now holds the address of the first src element to be copied. 120170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 12025a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_dstPos, rs_rCX); 12035a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov NewLIR5(kX86Lea32RA, tmp_reg.GetReg(), tmp_reg.GetReg(), 12045a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov rs_rCX.GetReg(), 1, mirror::Array::DataOffset(2).Int32Value() ); 12055a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // RBX now holds the address of the first dst element to be copied. 120670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 12075a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // Check if the number of elements to be copied is odd or even. If odd 120870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov // then copy the first element (so that the remaining number of elements 120970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov // is even). 12105a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_length, rs_rCX); 121170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov OpRegImm(kOpAnd, rs_rCX, 1); 121270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* jmp_to_begin_loop = OpCmpImmBranch(kCondEq, rs_rCX, 0, nullptr); 121370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov OpRegImm(kOpSub, rs_rDX, 1); 121470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LoadBaseIndexedDisp(rs_rAX, rs_rDX, 1, 0, rs_rCX, kSignedHalf); 12155a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov StoreBaseIndexedDisp(tmp_reg, rs_rDX, 1, 0, rs_rCX, kSignedHalf); 121670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 12175a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // Since the remaining number of elements is even, we will copy by 121870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov // two elements at a time. 12195a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* beginLoop = NewLIR0(kPseudoTargetLabel); 12205a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* jmp_to_ret = OpCmpImmBranch(kCondEq, rs_rDX, 0, nullptr); 122170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov OpRegImm(kOpSub, rs_rDX, 2); 122270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LoadBaseIndexedDisp(rs_rAX, rs_rDX, 1, 0, rs_rCX, kSingle); 12235a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov StoreBaseIndexedDisp(tmp_reg, rs_rDX, 1, 0, rs_rCX, kSingle); 122470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov OpUnconditionalBranch(beginLoop); 122570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR *check_failed = NewLIR0(kPseudoTargetLabel); 122670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* launchpad_branch = OpUnconditionalBranch(nullptr); 122770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR *return_point = NewLIR0(kPseudoTargetLabel); 122870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov jmp_to_ret->target = return_point; 122970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov jmp_to_begin_loop->target = beginLoop; 123070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov src_dst_same->target = check_failed; 123170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov len_too_big->target = check_failed; 123270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov src_null_branch->target = check_failed; 123370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (srcPos_negative != nullptr) 123470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov srcPos_negative ->target = check_failed; 1235f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate if (src_bad_off != nullptr) 1236f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_off->target = check_failed; 123770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (src_bad_len != nullptr) 123870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov src_bad_len->target = check_failed; 123970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov dst_null_branch->target = check_failed; 124070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (dstPos_negative != nullptr) 124170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov dstPos_negative->target = check_failed; 1242f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate if (dst_bad_off != nullptr) 1243f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_off->target = check_failed; 124470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (dst_bad_len != nullptr) 124570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov dst_bad_len->target = check_failed; 124670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov AddIntrinsicSlowPath(info, launchpad_branch, return_point); 12479863daf4fdc1a08339edac794452dbc719aef4f1Serguei Katkov ClobberCallerSave(); // We must clobber everything because slow path will return here 124870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov return true; 124970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov} 125070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 125170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 12524028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell/* 12534028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell * Fast string.index_of(I) & (II). Inline check for simple case of char <= 0xffff, 12544028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell * otherwise bails to standard library code. 12554028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell */ 12564028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendellbool X86Mir2Lir::GenInlinedIndexOf(CallInfo* info, bool zero_based) { 12574028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell RegLocation rl_obj = info->args[0]; 12584028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell RegLocation rl_char = info->args[1]; 1259a44d4f508fa1642294e79d3ebecd790afe75ea60buzbee RegLocation rl_start; // Note: only present in III flavor or IndexOf. 12608bd698fb785b58302be684efcbb24a0b8c6535d7nikolay serdjuk // RBX is promotable in 64-bit mode. 1261c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk RegStorage rs_tmp = cu_->target64 ? rs_r11 : rs_rBX; 1262c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk int start_value = -1; 12634028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 12644028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell uint32_t char_value = 12654028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell rl_char.is_const ? mir_graph_->ConstantValue(rl_char.orig_sreg) : 0; 12664028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 12674028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (char_value > 0xFFFF) { 12684028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // We have to punt to the real String.indexOf. 12694028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell return false; 12704028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 12714028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 12724028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Okay, we are commited to inlining this. 1273c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // EAX: 16 bit character being searched. 1274c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // ECX: count: number of words to be searched. 1275c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // EDI: String being searched. 1276c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // EDX: temporary during execution. 1277c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // EBX or R11: temporary during execution (depending on mode). 1278c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // REP SCASW: search instruction. 1279c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 12808bd698fb785b58302be684efcbb24a0b8c6535d7nikolay serdjuk FlushAllRegs(); 1281c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1282a0cd2d701f29e0bc6275f1b13c0edfd4ec391879buzbee RegLocation rl_return = GetReturn(kCoreReg); 12834028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell RegLocation rl_dest = InlineTarget(info); 12844028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 12852cebb24bfc3247d3e9be138a3350106737455918Mathieu Chartier // Is the string non-null? 12862700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LoadValueDirectFixed(rl_obj, rs_rDX); 12872700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee GenNullCheck(rs_rDX, info->opt_flags); 12883bc8615332b7848dec8c2297a40f7e4d176c0efbVladimir Marko info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked. 12894028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 1290c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk LIR *slowpath_branch = nullptr, *length_compare = nullptr; 1291c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1292c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // We need the value in EAX. 12934028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (rl_char.is_const) { 12942700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LoadConstantNoClobber(rs_rAX, char_value); 12954028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } else { 1296c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Does the character fit in 16 bits? Compare it at runtime. 12972700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LoadValueDirectFixed(rl_char, rs_rAX); 12983a74d15ccc9a902874473ac9632e568b19b91b1cMingyao Yang slowpath_branch = OpCmpImmBranch(kCondGt, rs_rAX, 0xFFFF, nullptr); 12994028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 13004028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13014028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // From here down, we know that we are looking for a char that fits in 16 bits. 1302e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell // Location of reference to data array within the String object. 1303e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell int value_offset = mirror::String::ValueOffset().Int32Value(); 1304e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell // Location of count within the String object. 1305e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell int count_offset = mirror::String::CountOffset().Int32Value(); 13064028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 130769dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison // Compute the number of words to search in to rCX. 130869dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison Load32Disp(rs_rDX, count_offset, rs_rCX); 130969dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison 1310dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // Possible signal here due to null pointer dereference. 1311dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // Note that the signal handler will expect the top word of 1312dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // the stack to be the ArtMethod*. If the PUSH edi instruction 1313dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // below is ahead of the load above then this will not be true 1314dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // and the signal handler will not work. 1315dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison MarkPossibleNullPointerException(0); 1316c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1317dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison if (!cu_->target64) { 13188bd698fb785b58302be684efcbb24a0b8c6535d7nikolay serdjuk // EDI is promotable in 32-bit mode. 1319c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk NewLIR1(kX86Push32R, rs_rDI.GetReg()); 13201109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky cfi_.AdjustCFAOffset(4); 13211109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky // Record cfi only if it is not already spilled. 13221109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky if (!CoreSpillMaskContains(rs_rDI.GetReg())) { 13231109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky cfi_.RelOffset(DwarfCoreReg(cu_->target64, rs_rDI.GetReg()), 0); 13241109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky } 1325c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk } 13264028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13274028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (zero_based) { 1328c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Start index is not present. 13294028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // We have to handle an empty string. Use special instruction JECXZ. 13304028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell length_compare = NewLIR0(kX86Jecxz8); 1331c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1332c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Copy the number of words to search in a temporary register. 1333c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // We will use the register at the end to calculate result. 1334c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpMov, rs_tmp, rs_rCX); 13354028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } else { 1336c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Start index is present. 1337a44d4f508fa1642294e79d3ebecd790afe75ea60buzbee rl_start = info->args[2]; 1338c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 13394028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // We have to offset by the start index. 13404028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (rl_start.is_const) { 13414028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell start_value = mir_graph_->ConstantValue(rl_start.orig_sreg); 13424028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell start_value = std::max(start_value, 0); 13434028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13444028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Is the start > count? 13452700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee length_compare = OpCmpImmBranch(kCondLe, rs_rCX, start_value, nullptr); 1346c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegImm(kOpMov, rs_rDI, start_value); 1347c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1348c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Copy the number of words to search in a temporary register. 1349c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // We will use the register at the end to calculate result. 1350c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpMov, rs_tmp, rs_rCX); 13514028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13524028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (start_value != 0) { 1353c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Decrease the number of words to search by the start index. 13542700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee OpRegImm(kOpSub, rs_rCX, start_value); 13554028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 13564028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } else { 1357c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Handle "start index < 0" case. 1358c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk if (!cu_->target64 && rl_start.location != kLocPhysReg) { 1359a1758d83e298c9ee31848bcae07c2a35f6efd618Alexei Zavjalov // Load the start index from stack, remembering that we pushed EDI. 1360c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk int displacement = SRegOffset(rl_start.s_reg_low) + sizeof(uint32_t); 136174de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 1362b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers Load32Disp(rs_rX86_SP_32, displacement, rs_rDI); 136374de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko // Dalvik register annotation in LoadBaseIndexedDisp() used wrong offset. Fix it. 136474de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko DCHECK(!DECODE_ALIAS_INFO_WIDE(last_lir_insn_->flags.alias_info)); 136574de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - 1; 136674de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false); 1367c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk } else { 1368c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk LoadValueDirectFixed(rl_start, rs_rDI); 13694028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 1370c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpXor, rs_tmp, rs_tmp); 1371c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpCmp, rs_rDI, rs_tmp); 1372c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpCondRegReg(kOpCmov, kCondLt, rs_rDI, rs_tmp); 1373c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1374c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // The length of the string should be greater than the start index. 1375c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk length_compare = OpCmpBranch(kCondLe, rs_rCX, rs_rDI, nullptr); 1376c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1377c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Copy the number of words to search in a temporary register. 1378c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // We will use the register at the end to calculate result. 1379c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpMov, rs_tmp, rs_rCX); 1380c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1381c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Decrease the number of words to search by the start index. 1382c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpSub, rs_rCX, rs_rDI); 13834028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 13844028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 13854028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 1386c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Load the address of the string into EDI. 1387c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // In case of start index we have to add the address to existing value in EDI. 1388c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk if (zero_based || (!zero_based && rl_start.is_const && start_value == 0)) { 1389848f70a3d73833fc1bf3032a9ff6812e429661d9Jeff Hao OpRegRegImm(kOpAdd, rs_rDI, rs_rDX, value_offset); 13904028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } else { 1391848f70a3d73833fc1bf3032a9ff6812e429661d9Jeff Hao OpRegImm(kOpLsl, rs_rDI, 1); 1392848f70a3d73833fc1bf3032a9ff6812e429661d9Jeff Hao OpRegReg(kOpAdd, rs_rDI, rs_rDX); 1393848f70a3d73833fc1bf3032a9ff6812e429661d9Jeff Hao OpRegImm(kOpAdd, rs_rDI, value_offset); 13944028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 13954028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13964028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // EDI now contains the start of the string to be searched. 13974028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // We are all prepared to do the search for the character. 13984028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell NewLIR0(kX86RepneScasw); 13994028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 14004028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Did we find a match? 14014028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell LIR* failed_branch = OpCondBranch(kCondNe, nullptr); 14024028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 14034028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // yes, we matched. Compute the index of the result. 1404c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpSub, rs_tmp, rs_rCX); 1405c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk NewLIR3(kX86Lea32RM, rl_return.reg.GetReg(), rs_tmp.GetReg(), -1); 1406c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 14074028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell LIR *all_done = NewLIR1(kX86Jmp8, 0); 14084028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 14094028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Failed to match; return -1. 14104028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell LIR *not_found = NewLIR0(kPseudoTargetLabel); 14114028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell length_compare->target = not_found; 14124028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell failed_branch->target = not_found; 14132700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LoadConstantNoClobber(rl_return.reg, -1); 14144028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 14154028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // And join up at the end. 14164028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell all_done->target = NewLIR0(kPseudoTargetLabel); 1417c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 14181109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky if (!cu_->target64) { 1419c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk NewLIR1(kX86Pop32R, rs_rDI.GetReg()); 14201109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky cfi_.AdjustCFAOffset(-4); 14211109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky if (!CoreSpillMaskContains(rs_rDI.GetReg())) { 14221109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky cfi_.Restore(DwarfCoreReg(cu_->target64, rs_rDI.GetReg())); 14231109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky } 14241109fb3cacc8bb667979780c2b4b12ce5bb64549David Srbecky } 14254028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 14264028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Out of line code returns here. 14273a74d15ccc9a902874473ac9632e568b19b91b1cMingyao Yang if (slowpath_branch != nullptr) { 14284028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell LIR *return_point = NewLIR0(kPseudoTargetLabel); 14293a74d15ccc9a902874473ac9632e568b19b91b1cMingyao Yang AddIntrinsicSlowPath(info, slowpath_branch, return_point); 14309863daf4fdc1a08339edac794452dbc719aef4f1Serguei Katkov ClobberCallerSave(); // We must clobber everything because slow path will return here 14314028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 14324028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 14334028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell StoreValue(rl_dest, rl_return); 14344028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell return true; 14354028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell} 14364028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 1437d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendellvoid X86Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { 1438d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) { 143960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpReserveVectorRegisters: 144060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji ReserveVectorRegisters(mir); 144160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 144260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpReturnVectorRegisters: 1443b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A ReturnVectorRegisters(mir); 144460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 1445d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell case kMirOpConstVector: 14466a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenConst128(mir); 1447d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell break; 1448fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpMoveVector: 14496a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenMoveVector(mir); 1450fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1451fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedMultiply: 14526a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenMultiplyVector(mir); 1453fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1454fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedAddition: 14556a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenAddVector(mir); 1456fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1457fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedSubtract: 14586a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenSubtractVector(mir); 1459fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1460fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedShiftLeft: 14616a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenShiftLeftVector(mir); 1462fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1463fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedSignedShiftRight: 14646a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenSignedShiftRightVector(mir); 1465fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1466fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedUnsignedShiftRight: 14676a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenUnsignedShiftRightVector(mir); 1468fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1469fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedAnd: 14706a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenAndVector(mir); 1471fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1472fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedOr: 14736a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenOrVector(mir); 1474fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1475fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedXor: 14766a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenXorVector(mir); 1477fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1478fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedAddReduce: 14796a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenAddReduceVector(mir); 1480fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1481fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedReduce: 14826a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenReduceVector(mir); 1483fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1484fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedSet: 14856a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenSetVector(mir); 1486fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1487b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler case kMirOpMemBarrier: 1488b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler GenMemBarrier(static_cast<MemBarrierKind>(mir->dalvikInsn.vA)); 1489b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler break; 1490b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case kMirOpPackedArrayGet: 1491b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A GenPackedArrayGet(bb, mir); 1492b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 1493b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case kMirOpPackedArrayPut: 1494b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A GenPackedArrayPut(bb, mir); 1495b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 1496d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell default: 1497d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell break; 1498d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1499d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell} 1500d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 150160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjivoid X86Mir2Lir::ReserveVectorRegisters(MIR* mir) { 1502b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A for (uint32_t i = mir->dalvikInsn.vA; i <= mir->dalvikInsn.vB; i++) { 150360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage xp_reg = RegStorage::Solo128(i); 150460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegisterInfo *xp_reg_info = GetRegInfo(xp_reg); 150560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji Clobber(xp_reg); 150660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 150760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji for (RegisterInfo *info = xp_reg_info->GetAliasChain(); 150860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji info != nullptr; 150960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji info = info->GetAliasChain()) { 1510e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko ArenaVector<RegisterInfo*>* regs = 1511e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko info->GetReg().IsSingle() ? ®_pool_->sp_regs_ : ®_pool_->dp_regs_; 1512e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko auto it = std::find(regs->begin(), regs->end(), info); 1513e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko DCHECK(it != regs->end()); 1514e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko regs->erase(it); 151560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 151660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 151760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 151860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 1519b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan Avoid X86Mir2Lir::ReturnVectorRegisters(MIR* mir) { 1520b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A for (uint32_t i = mir->dalvikInsn.vA; i <= mir->dalvikInsn.vB; i++) { 152160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage xp_reg = RegStorage::Solo128(i); 152260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegisterInfo *xp_reg_info = GetRegInfo(xp_reg); 152360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 152460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji for (RegisterInfo *info = xp_reg_info->GetAliasChain(); 152560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji info != nullptr; 152660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji info = info->GetAliasChain()) { 152760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji if (info->GetReg().IsSingle()) { 1528e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reg_pool_->sp_regs_.push_back(info); 152960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } else { 1530e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reg_pool_->dp_regs_.push_back(info); 153160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 153260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 153360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 153460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 153560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 15366a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenConst128(MIR* mir) { 153760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA); 1538b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest); 1539b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1540d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell uint32_t *args = mir->dalvikInsn.arg; 1541fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int reg = rs_dest.GetReg(); 1542d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell // Check for all 0 case. 1543d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell if (args[0] == 0 && args[1] == 0 && args[2] == 0 && args[3] == 0) { 1544d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell NewLIR2(kX86XorpsRR, reg, reg); 1545d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell return; 1546d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 154760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 154860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Append the mov const vector to reg opcode. 1549b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A AppendOpcodeWithConst(kX86MovdqaRM, reg, mir); 155060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 155160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 155260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjivoid X86Mir2Lir::AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir) { 1553b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // To deal with correct memory ordering, reverse order of constants. 1554b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int32_t constants[4]; 1555b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[3] = mir->dalvikInsn.arg[0]; 1556b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[2] = mir->dalvikInsn.arg[1]; 1557b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[1] = mir->dalvikInsn.arg[2]; 1558b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[0] = mir->dalvikInsn.arg[3]; 1559b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1560b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Search if there is already a constant in pool with this value. 1561b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LIR *data_target = ScanVectorLiteral(constants); 1562d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell if (data_target == nullptr) { 1563b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A data_target = AddVectorLiteral(constants); 1564d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1565d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 1566d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell // Load the proper value from the literal area. 1567d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell // We don't know the proper offset for the value, so pick one that will force 156827dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell // 4 byte offset. We will fix this up in the assembler later to have the 156927dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell // right value. 157027dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell LIR* load; 15718dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ScopedMemRefType mem_ref_type(this, ResourceMask::kLiteral); 157227dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell if (cu_->target64) { 15731961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko load = NewLIR3(opcode, reg, kRIPReg, kDummy32BitOffset); 157427dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell } else { 15751961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko // Get the PC to a register and get the anchor. 15761961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko LIR* anchor; 15771961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko RegStorage r_pc = GetPcAndAnchor(&anchor); 15781961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko 15791961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko load = NewLIR3(opcode, reg, r_pc.GetReg(), kDummy32BitOffset); 15801961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko load->operands[4] = WrapPointer(anchor); 15811961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko if (IsTemp(r_pc)) { 15821961b609bfefaedb71cee3651c4f931cc3e7393dVladimir Marko FreeTemp(r_pc); 158327dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell } 158427dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell } 1585d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell load->flags.fixup = kFixupLoad; 1586d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell load->target = data_target; 1587d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell} 1588d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 15896a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenMoveVector(MIR* mir) { 1590fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // We only support 128 bit registers. 159160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 159260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA); 1593b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest); 159460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src = RegStorage::Solo128(mir->dalvikInsn.vB); 1595b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_dest.GetReg(), rs_src.GetReg()); 1596fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1597fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 1598b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan Avoid X86Mir2Lir::GenMultiplyVectorSignedByte(RegStorage rs_dest_src1, RegStorage rs_src2) { 159960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji /* 160060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * Emulate the behavior of a kSignedByte by separating out the 16 values in the two XMM 160160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * and multiplying 8 at a time before recombining back into one XMM register. 160260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * 160360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * let xmm1, xmm2 be real srcs (keep low bits of 16bit lanes) 160460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm3 is tmp (operate on high bits of 16bit lanes) 160560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * 160660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm3 = xmm1 160760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm1 = xmm1 .* xmm2 160860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm1 = xmm1 & 0x00ff00ff00ff00ff00ff00ff00ff00ff // xmm1 now has low bits 160960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm3 = xmm3 .>> 8 161060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm2 = xmm2 & 0xff00ff00ff00ff00ff00ff00ff00ff00 161160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm2 = xmm2 .* xmm3 // xmm2 now has high bits 161260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm1 = xmm1 | xmm2 // combine results 161360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji */ 161460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 161560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Copy xmm1. 1616b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_src1_high_tmp = Get128BitRegister(AllocTempDouble()); 1617b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_dest_high_tmp = Get128BitRegister(AllocTempDouble()); 1618b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_src1_high_tmp.GetReg(), rs_src2.GetReg()); 1619b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_dest_high_tmp.GetReg(), rs_dest_src1.GetReg()); 162060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 162160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Multiply low bits. 1622b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // x7 *= x3 162360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji NewLIR2(kX86PmullwRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 162460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 162560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // xmm1 now has low bits. 162660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji AndMaskVectorRegister(rs_dest_src1, 0x00FF00FF, 0x00FF00FF, 0x00FF00FF, 0x00FF00FF); 162760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 162860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Prepare high bits for multiplication. 1629b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlwRI, rs_src1_high_tmp.GetReg(), 0x8); 1630b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A AndMaskVectorRegister(rs_dest_high_tmp, 0xFF00FF00, 0xFF00FF00, 0xFF00FF00, 0xFF00FF00); 163160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 163260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Multiply high bits and xmm2 now has high bits. 1633b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PmullwRR, rs_src1_high_tmp.GetReg(), rs_dest_high_tmp.GetReg()); 163460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 163560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Combine back into dest XMM register. 1636b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PorRR, rs_dest_src1.GetReg(), rs_src1_high_tmp.GetReg()); 1637b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A} 1638b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1639b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan Avoid X86Mir2Lir::GenMultiplyVectorLong(RegStorage rs_dest_src1, RegStorage rs_src2) { 1640b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A /* 1641b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * We need to emulate the packed long multiply. 1642b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * For kMirOpPackedMultiply xmm1, xmm0: 1643b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - xmm1 is src/dest 1644b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - xmm0 is src 1645b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Get xmm2 and xmm3 as temp 1646b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Idea is to multiply the lower 32 of each operand with the higher 32 of the other. 1647b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Then add the two results. 1648b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Move it to the upper 32 of the destination 1649b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Then multiply the lower 32-bits of the operands and add the result to the destination. 1650b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1651b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * (op dest src ) 1652b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * movdqa %xmm2, %xmm1 1653b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * movdqa %xmm3, %xmm0 1654b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psrlq %xmm3, $0x20 1655b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm3, %xmm2 1656b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psrlq %xmm1, $0x20 1657b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm1, %xmm0 1658b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * paddq %xmm1, %xmm3 1659b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psllq %xmm1, $0x20 1660b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm2, %xmm0 1661b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * paddq %xmm1, %xmm2 1662b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1663b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * When both the operands are the same, then we need to calculate the lower-32 * higher-32 1664b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * calculation only once. Thus we don't need the xmm3 temp above. That sequence becomes: 1665b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1666b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * (op dest src ) 1667b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * movdqa %xmm2, %xmm1 1668b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psrlq %xmm1, $0x20 1669b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm1, %xmm0 1670b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * paddq %xmm1, %xmm1 1671b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psllq %xmm1, $0x20 1672b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm2, %xmm0 1673b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * paddq %xmm1, %xmm2 1674b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1675b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A */ 1676b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1677b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A bool both_operands_same = (rs_dest_src1.GetReg() == rs_src2.GetReg()); 1678b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1679b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_tmp_vector_1; 1680b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_tmp_vector_2; 1681b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rs_tmp_vector_1 = Get128BitRegister(AllocTempDouble()); 1682b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_tmp_vector_1.GetReg(), rs_dest_src1.GetReg()); 1683b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1684b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (both_operands_same == false) { 1685b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rs_tmp_vector_2 = Get128BitRegister(AllocTempDouble()); 1686b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_tmp_vector_2.GetReg(), rs_src2.GetReg()); 1687b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlqRI, rs_tmp_vector_2.GetReg(), 0x20); 1688b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PmuludqRR, rs_tmp_vector_2.GetReg(), rs_tmp_vector_1.GetReg()); 1689b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 1690b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1691b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlqRI, rs_dest_src1.GetReg(), 0x20); 1692b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PmuludqRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1693b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1694b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (both_operands_same == false) { 1695b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddqRR, rs_dest_src1.GetReg(), rs_tmp_vector_2.GetReg()); 1696b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 1697b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddqRR, rs_dest_src1.GetReg(), rs_dest_src1.GetReg()); 1698b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 1699b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1700b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsllqRI, rs_dest_src1.GetReg(), 0x20); 1701b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PmuludqRR, rs_tmp_vector_1.GetReg(), rs_src2.GetReg()); 1702b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddqRR, rs_dest_src1.GetReg(), rs_tmp_vector_1.GetReg()); 170360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 170460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 17056a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenMultiplyVector(MIR* mir) { 170660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 170760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 170860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1709b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 171060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 1711fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1712fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1713fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1714fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PmulldRR; 1715fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1716fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1717fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PmullwRR; 1718fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1719fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSingle: 1720fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86MulpsRR; 1721fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1722fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kDouble: 1723fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86MulpdRR; 1724fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 172560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 172660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // HW doesn't support 16x16 byte multiplication so emulate it. 1727b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A GenMultiplyVectorSignedByte(rs_dest_src1, rs_src2); 1728b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return; 1729b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k64: 1730b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A GenMultiplyVectorLong(rs_dest_src1, rs_src2); 173160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return; 1732fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1733fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector multiply " << opsize; 1734fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1735fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1736fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1737fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1738fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 17396a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenAddVector(MIR* mir) { 174060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 174160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 174260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1743b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 174460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 1745fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1746fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1747fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1748fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PadddRR; 1749fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1750b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k64: 1751b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A opcode = kX86PaddqRR; 1752b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 1753fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1754fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 1755fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PaddwRR; 1756fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1757fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedByte: 1758fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedByte: 1759fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PaddbRR; 1760fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1761fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSingle: 1762fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86AddpsRR; 1763fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1764fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kDouble: 1765fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86AddpdRR; 1766fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1767fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1768fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector addition " << opsize; 1769fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1770fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1771fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1772fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1773fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 17746a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenSubtractVector(MIR* mir) { 177560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 177660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 177760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1778b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 177960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 1780fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1781fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1782fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1783fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsubdRR; 1784fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1785b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k64: 1786b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A opcode = kX86PsubqRR; 1787b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 1788fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1789fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 1790fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsubwRR; 1791fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1792fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedByte: 1793fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedByte: 1794fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsubbRR; 1795fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1796fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSingle: 1797fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86SubpsRR; 1798fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1799fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kDouble: 1800fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86SubpdRR; 1801fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1802fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1803fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector subtraction " << opsize; 1804fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1805fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1806fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1807fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1808fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 18096a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenShiftByteVector(MIR* mir) { 1810b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Destination does not need clobbered because it has already been as part 1811b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // of the general packed shift handler (caller of this method). 181260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 181360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 181460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji int opcode = 0; 181560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) { 181660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpPackedShiftLeft: 181760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji opcode = kX86PsllwRI; 181860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 181960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpPackedSignedShiftRight: 182060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpPackedUnsignedShiftRight: 1821b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Add support for emulated byte shifts. 182260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji default: 182360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji LOG(FATAL) << "Unsupported shift operation on byte vector " << opcode; 182460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 182560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 182660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 1827b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Clear xmm register and return if shift more than byte length. 1828b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int imm = mir->dalvikInsn.vB; 1829b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (imm >= 8) { 1830b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PxorRR, rs_dest_src1.GetReg(), rs_dest_src1.GetReg()); 1831b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return; 1832b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 183360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 183460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Shift lower values. 183560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji NewLIR2(opcode, rs_dest_src1.GetReg(), imm); 183660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 1837b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A /* 1838b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * The above shift will shift the whole word, but that means 1839b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * both the bytes will shift as well. To emulate a byte level 1840b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * shift, we can just throw away the lower (8 - N) bits of the 1841b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * upper byte, and we are done. 1842b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A */ 1843b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A uint8_t byte_mask = 0xFF << imm; 1844b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A uint32_t int_mask = byte_mask; 1845b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int_mask = int_mask << 8 | byte_mask; 1846b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int_mask = int_mask << 8 | byte_mask; 1847b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int_mask = int_mask << 8 | byte_mask; 184860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 1849b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // And the destination with the mask 1850b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A AndMaskVectorRegister(rs_dest_src1, int_mask, int_mask, int_mask, int_mask); 185160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 185260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 18536a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenShiftLeftVector(MIR* mir) { 185460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 185560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 185660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1857b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 185860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji int imm = mir->dalvikInsn.vB; 1859fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1860fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1861fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1862fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PslldRI; 1863fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1864fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k64: 1865fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsllqRI; 1866fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1867fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1868fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 1869fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsllwRI; 1870fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 187160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 187260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kUnsignedByte: 18736a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenShiftByteVector(mir); 187460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return; 1875fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1876fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector shift left " << opsize; 1877fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1878fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1879fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), imm); 1880fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1881fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 18826a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenSignedShiftRightVector(MIR* mir) { 188360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 188460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 188560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1886b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 188760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji int imm = mir->dalvikInsn.vB; 1888fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1889fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1890fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1891fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsradRI; 1892fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1893fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1894fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 1895fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsrawRI; 1896fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 189760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 189860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kUnsignedByte: 18996a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenShiftByteVector(mir); 190060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return; 1901b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k64: 1902b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Implement emulated shift algorithm. 1903fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1904fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector signed shift right " << opsize; 19056a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNREACHABLE(); 1906fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1907fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), imm); 1908fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1909fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 19106a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenUnsignedShiftRightVector(MIR* mir) { 191160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 191260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 191360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1914b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 191560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji int imm = mir->dalvikInsn.vB; 1916fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1917fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1918fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1919fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsrldRI; 1920fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1921fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k64: 1922fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsrlqRI; 1923fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1924fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1925fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 1926fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsrlwRI; 1927fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 192860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 192960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kUnsignedByte: 19306a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenShiftByteVector(mir); 193160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return; 1932fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1933fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector unsigned shift right " << opsize; 1934fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1935fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1936fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), imm); 1937fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1938fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 19396a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenAndVector(MIR* mir) { 1940fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // We only support 128 bit registers. 194160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 194260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1943b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 194460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 1945fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(kX86PandRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1946fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1947fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 19486a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenOrVector(MIR* mir) { 1949fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // We only support 128 bit registers. 195060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 195160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1952b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 195360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 1954fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(kX86PorRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1955fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1956fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 19576a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenXorVector(MIR* mir) { 1958fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // We only support 128 bit registers. 195960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 196060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1961b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 196260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 1963fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(kX86PxorRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1964fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1965fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 196660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjivoid X86Mir2Lir::AndMaskVectorRegister(RegStorage rs_src1, uint32_t m1, uint32_t m2, uint32_t m3, uint32_t m4) { 196760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji MaskVectorRegister(kX86PandRM, rs_src1, m1, m2, m3, m4); 196860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 196960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 197060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjivoid X86Mir2Lir::MaskVectorRegister(X86OpCode opcode, RegStorage rs_src1, uint32_t m0, uint32_t m1, uint32_t m2, uint32_t m3) { 197160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Create temporary MIR as container for 128-bit binary mask. 197260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji MIR const_mir; 197360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji MIR* const_mirp = &const_mir; 197460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpConstVector); 197560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.arg[0] = m0; 197660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.arg[1] = m1; 197760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.arg[2] = m2; 197860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.arg[3] = m3; 197960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 198060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Mask vector with const from literal pool. 198160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji AppendOpcodeWithConst(opcode, rs_src1.GetReg(), const_mirp); 198260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 198360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 19846a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenAddReduceVector(MIR* mir) { 198560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 1986b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage vector_src = RegStorage::Solo128(mir->dalvikInsn.vB); 1987b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A bool is_wide = opsize == k64 || opsize == kDouble; 1988b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1989b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Get the location of the virtual register. Since this bytecode is overloaded 1990b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // for different types (and sizes), we need different logic for each path. 1991b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // The design of bytecode uses same VR for source and destination. 1992b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegLocation rl_src, rl_dest, rl_result; 1993b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (is_wide) { 1994b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = mir_graph_->GetSrcWide(mir, 0); 1995b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_dest = mir_graph_->GetDestWide(mir); 1996b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 1997b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = mir_graph_->GetSrc(mir, 0); 1998b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_dest = mir_graph_->GetDest(mir); 1999b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 200060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2001b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // We need a temp for byte and short values 2002b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage temp; 200360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2004b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // There is a different path depending on type and size. 2005b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize == kSingle) { 2006b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle float case. 2007b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Add support for fast math (not value safe) and do horizontal add in that case. 200860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2009b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = LoadValue(rl_src, kFPReg); 2010b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLoc(rl_dest, kFPReg, true); 201160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2012b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Since we are doing an add-reduce, we move the reg holding the VR 2013b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // into the result so we include it in result. 2014b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A OpRegCopy(rl_result.reg, rl_src.reg); 2015b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86AddssRR, rl_result.reg.GetReg(), vector_src.GetReg()); 201660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2017b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Since FP must keep order of operation for value safety, we shift to low 2018b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // 32-bits and add to result. 2019b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A for (int i = 0; i < 3; i++) { 2020b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(kX86ShufpsRRI, vector_src.GetReg(), vector_src.GetReg(), 0x39); 2021b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86AddssRR, rl_result.reg.GetReg(), vector_src.GetReg()); 2022b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 202360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2024b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A StoreValue(rl_dest, rl_result); 2025b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == kDouble) { 2026b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle double case. 2027b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = LoadValueWide(rl_src, kFPReg); 2028b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLocWide(rl_dest, kFPReg, true); 2029b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LOG(FATAL) << "Unsupported vector add reduce for double."; 2030b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == k64) { 2031b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A /* 2032b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * Handle long case: 2033b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1) Reduce the vector register to lower half (with addition). 2034b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-1) Get an xmm temp and fill it with vector register. 2035b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-2) Shift the xmm temp by 8-bytes. 2036b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-3) Add the xmm temp to vector register that is being reduced. 2037b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2) Allocate temp GP / GP pair. 2038b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2-1) In 64-bit case, use movq to move result to a 64-bit GP. 2039b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2-2) In 32-bit case, use movd twice to move to 32-bit GP pair. 2040b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 3) Finish the add reduction by doing what add-long/2addr does, 2041b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * but instead of having a VR as one of the sources, we have our temp GP. 2042b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A */ 2043b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_tmp_vector = Get128BitRegister(AllocTempDouble()); 2044b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_tmp_vector.GetReg(), vector_src.GetReg()); 2045b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrldqRI, rs_tmp_vector.GetReg(), 8); 2046b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddqRR, vector_src.GetReg(), rs_tmp_vector.GetReg()); 2047b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A FreeTemp(rs_tmp_vector); 2048b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2049b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // We would like to be able to reuse the add-long implementation, so set up a fake 2050b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // register location to pass it. 2051b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegLocation temp_loc = mir_graph_->GetBadLoc(); 2052b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp_loc.core = 1; 2053b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp_loc.wide = 1; 2054b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp_loc.location = kLocPhysReg; 2055b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp_loc.reg = AllocTempWide(); 2056b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2057b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (cu_->target64) { 2058b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A DCHECK(!temp_loc.reg.IsPair()); 2059b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovqrxRR, temp_loc.reg.GetReg(), vector_src.GetReg()); 2060b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2061b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, temp_loc.reg.GetLowReg(), vector_src.GetReg()); 2062b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlqRI, vector_src.GetReg(), 0x20); 2063b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, temp_loc.reg.GetHighReg(), vector_src.GetReg()); 2064b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 206560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 20665c5676b26a08454b3f0133783778991bbe5dd681Razvan A Lupusoru GenArithOpLong(Instruction::ADD_LONG_2ADDR, rl_dest, temp_loc, temp_loc, mir->optimization_flags); 2067b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == kSignedByte || opsize == kUnsignedByte) { 2068b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_tmp = Get128BitRegister(AllocTempDouble()); 2069b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PxorRR, rs_tmp.GetReg(), rs_tmp.GetReg()); 2070b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsadbwRR, vector_src.GetReg(), rs_tmp.GetReg()); 2071b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(kX86PshufdRRI, rs_tmp.GetReg(), vector_src.GetReg(), 0x4e); 2072b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddbRR, vector_src.GetReg(), rs_tmp.GetReg()); 2073b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Move to a GPR 2074b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp = AllocTemp(); 2075b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, temp.GetReg(), vector_src.GetReg()); 2076b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2077b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle and the int and short cases together 2078b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2079b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Initialize as if we were handling int case. Below we update 2080b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // the opcode if handling byte or short. 2081b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int vec_bytes = (mir->dalvikInsn.vC & 0xFFFF) / 8; 2082b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int vec_unit_size; 2083b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int horizontal_add_opcode; 2084b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int extract_opcode; 2085b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2086b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize == kSignedHalf || opsize == kUnsignedHalf) { 2087b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A extract_opcode = kX86PextrwRRI; 2088b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A horizontal_add_opcode = kX86PhaddwRR; 2089b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A vec_unit_size = 2; 2090b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == k32) { 2091b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A vec_unit_size = 4; 2092b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A horizontal_add_opcode = kX86PhadddRR; 2093b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A extract_opcode = kX86PextrdRRI; 2094b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2095b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LOG(FATAL) << "Unsupported vector add reduce " << opsize; 2096b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return; 209760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 209860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2099b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int elems = vec_bytes / vec_unit_size; 210060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2101b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A while (elems > 1) { 2102b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(horizontal_add_opcode, vector_src.GetReg(), vector_src.GetReg()); 2103b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A elems >>= 1; 2104b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 210560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2106b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle this as arithmetic unary case. 2107b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 210860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2109b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Extract to a GP register because this is integral typed. 2110b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp = AllocTemp(); 2111b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(extract_opcode, temp.GetReg(), vector_src.GetReg(), 0); 2112b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2113b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2114b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize != k64 && opsize != kSingle && opsize != kDouble) { 2115b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // The logic below looks very similar to the handling of ADD_INT_2ADDR 2116b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // except the rhs is not a VR but a physical register allocated above. 2117b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // No load of source VR is done because it assumes that rl_result will 2118b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // share physical register / memory location. 21196a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers rl_result = UpdateLocTyped(rl_dest); 2120b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (rl_result.location == kLocPhysReg) { 2121b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Ensure res is in a core reg. 2122b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLoc(rl_dest, kCoreReg, true); 2123b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A OpRegReg(kOpAdd, rl_result.reg, temp); 2124b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A StoreFinalValue(rl_dest, rl_result); 2125b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2126b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Do the addition directly to memory. 2127085b733d15ec09afa27b85358acb89d9bc02e843Maxim Kazantsev ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 2128b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A OpMemReg(kOpAdd, rl_result, temp.GetReg()); 2129b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2130b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2131fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2132fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 21336a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenReduceVector(MIR* mir) { 213460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 213560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegLocation rl_dest = mir_graph_->GetDest(mir); 2136b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage vector_src = RegStorage::Solo128(mir->dalvikInsn.vB); 213760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegLocation rl_result; 213860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji bool is_wide = false; 213960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2140b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // There is a different path depending on type and size. 2141b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize == kSingle) { 2142b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle float case. 2143b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Add support for fast math (not value safe) and do horizontal add in that case. 2144fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 21456f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev int extract_index = mir->dalvikInsn.arg[0]; 21466f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev 2147b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLoc(rl_dest, kFPReg, true); 2148b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PxorRR, rl_result.reg.GetReg(), rl_result.reg.GetReg()); 2149b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 21506f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev if (LIKELY(extract_index != 0)) { 21516f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev // We know the index of element which we want to extract. We want to extract it and 21526f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev // keep values in vector register correct for future use. So the way we act is: 21536f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev // 1. Generate shuffle mask that allows to swap zeroth and required elements; 21546f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev // 2. Shuffle vector register with this mask; 21556f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev // 3. Extract zeroth element where required value lies; 21566f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev // 4. Shuffle with same mask again to restore original values in vector register. 21576f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev // The mask is generated from equivalence mask 0b11100100 swapping 0th and extracted 21586f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev // element indices. 21596f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev int shuffle[4] = {0b00, 0b01, 0b10, 0b11}; 21606f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev shuffle[0] = extract_index; 21616f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev shuffle[extract_index] = 0; 21626f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev int mask = 0; 21636f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev for (int i = 0; i < 4; i++) { 21646f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev mask |= (shuffle[i] << (2 * i)); 21656f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev } 21666f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev NewLIR3(kX86ShufpsRRI, vector_src.GetReg(), vector_src.GetReg(), mask); 21676f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev NewLIR2(kX86AddssRR, rl_result.reg.GetReg(), vector_src.GetReg()); 21686f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev NewLIR3(kX86ShufpsRRI, vector_src.GetReg(), vector_src.GetReg(), mask); 21696f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev } else { 21706f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev // We need to extract zeroth element and don't need any complex stuff to do it. 2171b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86AddssRR, rl_result.reg.GetReg(), vector_src.GetReg()); 2172b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2173b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 21746f5f5d05caed8465ad15ca5728e2a30c7a080d94Maxim Kazantsev StoreFinalValue(rl_dest, rl_result); 2175b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == kDouble) { 2176b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Handle double case. 2177b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LOG(FATAL) << "Unsupported add reduce for double."; 2178b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == k64) { 2179b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A /* 2180b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * Handle long case: 2181b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1) Reduce the vector register to lower half (with addition). 2182b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-1) Get an xmm temp and fill it with vector register. 2183b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-2) Shift the xmm temp by 8-bytes. 2184b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-3) Add the xmm temp to vector register that is being reduced. 2185b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2) Evaluate destination to a GP / GP pair. 2186b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2-1) In 64-bit case, use movq to move result to a 64-bit GP. 2187b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2-2) In 32-bit case, use movd twice to move to 32-bit GP pair. 2188b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 3) Store the result to the final destination. 2189b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A */ 219053cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji NewLIR2(kX86PsrldqRI, vector_src.GetReg(), 8); 2191b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLocWide(rl_dest, kCoreReg, true); 2192b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (cu_->target64) { 2193b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A DCHECK(!rl_result.reg.IsPair()); 2194b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovqrxRR, rl_result.reg.GetReg(), vector_src.GetReg()); 219560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } else { 2196b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, rl_result.reg.GetLowReg(), vector_src.GetReg()); 2197b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlqRI, vector_src.GetReg(), 0x20); 2198b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, rl_result.reg.GetHighReg(), vector_src.GetReg()); 219960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 2200b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2201b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A StoreValueWide(rl_dest, rl_result); 220260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } else { 220353cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji int extract_index = mir->dalvikInsn.arg[0]; 220453cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji int extr_opcode = 0; 22056a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers rl_result = UpdateLocTyped(rl_dest); 220653cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji 2207b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle the rest of integral types now. 2208b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A switch (opsize) { 2209b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k32: 221053cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji extr_opcode = (rl_result.location == kLocPhysReg) ? kX86PextrdRRI : kX86PextrdMRI; 2211b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 2212b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case kSignedHalf: 2213b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case kUnsignedHalf: 221453cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji extr_opcode = (rl_result.location == kLocPhysReg) ? kX86PextrwRRI : kX86PextrwMRI; 221553cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji break; 221653cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji case kSignedByte: 221753cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji extr_opcode = (rl_result.location == kLocPhysReg) ? kX86PextrbRRI : kX86PextrbMRI; 2218b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 2219b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A default: 2220b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LOG(FATAL) << "Unsupported vector reduce " << opsize; 22216a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNREACHABLE(); 2222b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2223b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2224b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (rl_result.location == kLocPhysReg) { 2225b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(extr_opcode, rl_result.reg.GetReg(), vector_src.GetReg(), extract_index); 222653cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji StoreFinalValue(rl_dest, rl_result); 2227b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2228b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int displacement = SRegOffset(rl_result.s_reg_low); 2229b3cdf93d70256c4b0a9f6ed55ba4601f8c70bad4Mark Mendell ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 2230b72c723bfb21e05cb9b0a7999db805df93fcaee8Razvan A Lupusoru LIR *l = NewLIR4(extr_opcode, rs_rX86_SP_32.GetReg(), displacement, vector_src.GetReg(), 2231b72c723bfb21e05cb9b0a7999db805df93fcaee8Razvan A Lupusoru extract_index); 2232b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A AnnotateDalvikRegAccess(l, displacement >> 2, false /* is_load */, is_wide /* is_64bit */); 2233b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 223460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 2235fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2236fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 22370a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendellvoid X86Mir2Lir::LoadVectorRegister(RegStorage rs_dest, RegStorage rs_src, 22380a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell OpSize opsize, int op_mov) { 22390a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell if (!cu_->target64 && opsize == k64) { 22400a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell // Logic assumes that longs are loaded in GP register pairs. 22410a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell NewLIR2(kX86MovdxrRR, rs_dest.GetReg(), rs_src.GetLowReg()); 22420a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell RegStorage r_tmp = AllocTempDouble(); 22430a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell NewLIR2(kX86MovdxrRR, r_tmp.GetReg(), rs_src.GetHighReg()); 22440a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell NewLIR2(kX86PunpckldqRR, rs_dest.GetReg(), r_tmp.GetReg()); 22450a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell FreeTemp(r_tmp); 22460a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell } else { 22470a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell NewLIR2(op_mov, rs_dest.GetReg(), rs_src.GetReg()); 22480a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell } 22490a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell} 22500a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell 22516a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenSetVector(MIR* mir) { 225260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 225360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 225460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA); 2255b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest); 2256b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int op_shuffle = 0, op_shuffle_high = 0, op_mov = kX86MovdxrRR; 225760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegisterClass reg_type = kCoreReg; 2258b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A bool is_wide = false; 225960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2260fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 2261fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 2262b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PshufdRRI; 2263fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 226460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSingle: 2265b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PshufdRRI; 2266b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_mov = kX86MovdqaRR; 226760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji reg_type = kFPReg; 226860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 226960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case k64: 2270b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PunpcklqdqRR; 227153cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji op_mov = kX86MovqxrRR; 2272b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A is_wide = true; 227360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 227460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 227560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kUnsignedByte: 2276b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // We will have the source loaded up in a 2277b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // double-word before we use this shuffle 2278b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PshufdRRI; 2279b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 2280fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 2281fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 2282fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Handles low quadword. 2283b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PshuflwRRI; 2284fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Handles upper quadword. 2285b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle_high = kX86PshufdRRI; 2286fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 2287fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 2288fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector set " << opsize; 2289fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 2290fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 2291fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 2292b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Load the value from the VR into a physical register. 2293b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegLocation rl_src; 2294b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (!is_wide) { 2295b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = mir_graph_->GetSrc(mir, 0); 229660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji rl_src = LoadValue(rl_src, reg_type); 229760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } else { 2298b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = mir_graph_->GetSrcWide(mir, 0); 229960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji rl_src = LoadValueWide(rl_src, reg_type); 230060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 2301b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage reg_to_shuffle = rl_src.reg; 230260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2303b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Load the value into the XMM register. 23040a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell LoadVectorRegister(rs_dest, reg_to_shuffle, opsize, op_mov); 2305fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 2306b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize == kSignedByte || opsize == kUnsignedByte) { 2307b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // In the byte case, first duplicate it to be a word 2308b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Then duplicate it to be a double-word 2309b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PunpcklbwRR, rs_dest.GetReg(), rs_dest.GetReg()); 2310b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PunpcklwdRR, rs_dest.GetReg(), rs_dest.GetReg()); 2311b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2312fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 2313fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Now shuffle the value across the destination. 2314b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (op_shuffle == kX86PunpcklqdqRR) { 2315b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(op_shuffle, rs_dest.GetReg(), rs_dest.GetReg()); 2316b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2317b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(op_shuffle, rs_dest.GetReg(), rs_dest.GetReg(), 0); 2318b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2319fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 2320fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // And then repeat as needed. 2321b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (op_shuffle_high != 0) { 2322b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(op_shuffle_high, rs_dest.GetReg(), rs_dest.GetReg(), 0); 2323fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 2324fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2325fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 23266a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenPackedArrayGet(BasicBlock* bb, MIR* mir) { 23276a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNUSED(bb, mir); 2328b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A UNIMPLEMENTED(FATAL) << "Extended opcode kMirOpPackedArrayGet not supported."; 2329b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A} 2330b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 23316a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenPackedArrayPut(BasicBlock* bb, MIR* mir) { 23326a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNUSED(bb, mir); 2333b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A UNIMPLEMENTED(FATAL) << "Extended opcode kMirOpPackedArrayPut not supported."; 2334b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A} 2335b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2336b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan ALIR* X86Mir2Lir::ScanVectorLiteral(int32_t* constants) { 2337d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell for (LIR *p = const_vectors_; p != nullptr; p = p->next) { 2338b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (constants[0] == p->operands[0] && constants[1] == p->operands[1] && 2339b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[2] == p->operands[2] && constants[3] == p->operands[3]) { 2340d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell return p; 2341d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 2342d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 2343d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell return nullptr; 2344d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell} 2345d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 2346b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan ALIR* X86Mir2Lir::AddVectorLiteral(int32_t* constants) { 2347d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell LIR* new_value = static_cast<LIR*>(arena_->Alloc(sizeof(LIR), kArenaAllocData)); 2348b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A new_value->operands[0] = constants[0]; 2349b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A new_value->operands[1] = constants[1]; 2350b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A new_value->operands[2] = constants[2]; 2351b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A new_value->operands[3] = constants[3]; 2352d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell new_value->next = const_vectors_; 2353d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell if (const_vectors_ == nullptr) { 2354b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A estimated_native_code_size_ += 12; // Maximum needed to align to 16 byte boundary. 2355d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 2356d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell estimated_native_code_size_ += 16; // Space for one vector. 2357d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell const_vectors_ = new_value; 2358d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell return new_value; 2359d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell} 2360d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 236158994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko// ------------ ABI support: mapping of args to physical registers ------------- 2362717a3e447c6f7a922cf9c3efe522747a187a045dSerguei KatkovRegStorage X86Mir2Lir::InToRegStorageX86_64Mapper::GetNextReg(ShortyArg arg) { 2363a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu const SpecialTargetRegister coreArgMappingToPhysicalReg[] = {kArg1, kArg2, kArg3, kArg4, kArg5}; 2364717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov const size_t coreArgMappingToPhysicalRegSize = arraysize(coreArgMappingToPhysicalReg); 2365a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu const SpecialTargetRegister fpArgMappingToPhysicalReg[] = {kFArg0, kFArg1, kFArg2, kFArg3, 2366ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe kFArg4, kFArg5, kFArg6, kFArg7}; 2367717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov const size_t fpArgMappingToPhysicalRegSize = arraysize(fpArgMappingToPhysicalReg); 236858994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2369717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (arg.IsFP()) { 237058994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko if (cur_fp_reg_ < fpArgMappingToPhysicalRegSize) { 2371717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return m2l_->TargetReg(fpArgMappingToPhysicalReg[cur_fp_reg_++], 2372717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov arg.IsWide() ? kWide : kNotWide); 237358994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 237458994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } else { 237558994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko if (cur_core_reg_ < coreArgMappingToPhysicalRegSize) { 2376717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return m2l_->TargetReg(coreArgMappingToPhysicalReg[cur_core_reg_++], 2377717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov arg.IsRef() ? kRef : (arg.IsWide() ? kWide : kNotWide)); 237858994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 237958994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 2380a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu return RegStorage::InvalidReg(); 238158994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko} 238258994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2383717a3e447c6f7a922cf9c3efe522747a187a045dSerguei KatkovRegStorage X86Mir2Lir::InToRegStorageX86Mapper::GetNextReg(ShortyArg arg) { 2384717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov const SpecialTargetRegister coreArgMappingToPhysicalReg[] = {kArg1, kArg2, kArg3}; 2385717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov const size_t coreArgMappingToPhysicalRegSize = arraysize(coreArgMappingToPhysicalReg); 2386966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell const SpecialTargetRegister fpArgMappingToPhysicalReg[] = {kFArg0, kFArg1, kFArg2, kFArg3}; 2387966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell const size_t fpArgMappingToPhysicalRegSize = arraysize(fpArgMappingToPhysicalReg); 238858994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2389717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov RegStorage result = RegStorage::InvalidReg(); 2390966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell if (arg.IsFP()) { 2391966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell if (cur_fp_reg_ < fpArgMappingToPhysicalRegSize) { 2392966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell return m2l_->TargetReg(fpArgMappingToPhysicalReg[cur_fp_reg_++], 2393966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell arg.IsWide() ? kWide : kNotWide); 2394966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell } 23953e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell } else if (cur_core_reg_ < coreArgMappingToPhysicalRegSize) { 23963e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell result = m2l_->TargetReg(coreArgMappingToPhysicalReg[cur_core_reg_++], 23973e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell arg.IsRef() ? kRef : kNotWide); 23983e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell if (arg.IsWide()) { 23993e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell // This must be a long, as double is handled above. 24003e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell // Ensure that we don't split a long across the last register and the stack. 24013e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell if (cur_core_reg_ == coreArgMappingToPhysicalRegSize) { 24023e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell // Leave the last core register unused and force the whole long to the stack. 24033e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell cur_core_reg_++; 24043e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell result = RegStorage::InvalidReg(); 24053e6a3bf797e49b7f449256455c7e522e888687d8Mark Mendell } else if (cur_core_reg_ < coreArgMappingToPhysicalRegSize) { 2406966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell result = RegStorage::MakeRegPair( 2407966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell result, m2l_->TargetReg(coreArgMappingToPhysicalReg[cur_core_reg_++], kNotWide)); 2408966c3ae95d3c699ee9fbdbccc1acdaaf02325fafMark P Mendell } 24094d5d794382cd6d3a25392d17543d5987e432d314Dmitry Petrochenko } 241058994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 2411717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return result; 241258994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko} 241358994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2414717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov// ---------End of ABI support: mapping of args to physical registers ------------- 241558994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2416984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampebool X86Mir2Lir::GenInlinedCharAt(CallInfo* info) { 2417984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // Location of reference to data array 2418984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe int value_offset = mirror::String::ValueOffset().Int32Value(); 2419984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // Location of count 2420984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe int count_offset = mirror::String::CountOffset().Int32Value(); 2421984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe 2422984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegLocation rl_obj = info->args[0]; 2423984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegLocation rl_idx = info->args[1]; 2424984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe rl_obj = LoadValue(rl_obj, kRefReg); 2425848f70a3d73833fc1bf3032a9ff6812e429661d9Jeff Hao rl_idx = LoadValue(rl_idx, kCoreReg); 2426984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegStorage reg_max; 2427984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe GenNullCheck(rl_obj.reg, info->opt_flags); 2428984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe bool range_check = (!(info->opt_flags & MIR_IGNORE_RANGE_CHECK)); 2429984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe LIR* range_check_branch = nullptr; 2430984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe if (range_check) { 2431984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // On x86, we can compare to memory directly 2432984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // Set up a launch pad to allow retry in case of bounds violation */ 2433984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe if (rl_idx.is_const) { 2434984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe LIR* comparison; 2435984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe range_check_branch = OpCmpMemImmBranch( 243600ca84730a21578dcc6b47bd8e08b78ab9b2ddedVladimir Marko kCondLs, RegStorage::InvalidReg(), rl_obj.reg, count_offset, 2437984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe mir_graph_->ConstantValue(rl_idx.orig_sreg), nullptr, &comparison); 2438984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe MarkPossibleNullPointerExceptionAfter(0, comparison); 2439984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } else { 2440984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe OpRegMem(kOpCmp, rl_idx.reg, rl_obj.reg, count_offset); 2441984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe MarkPossibleNullPointerException(0); 2442984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe range_check_branch = OpCondBranch(kCondUge, nullptr); 2443984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } 2444984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } 2445984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegLocation rl_dest = InlineTarget(info); 2446984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); 2447848f70a3d73833fc1bf3032a9ff6812e429661d9Jeff Hao LoadBaseIndexedDisp(rl_obj.reg, rl_idx.reg, 1, value_offset, rl_result.reg, kUnsignedHalf); 2448848f70a3d73833fc1bf3032a9ff6812e429661d9Jeff Hao FreeTemp(rl_idx.reg); 2449848f70a3d73833fc1bf3032a9ff6812e429661d9Jeff Hao FreeTemp(rl_obj.reg); 2450984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe StoreValue(rl_dest, rl_result); 2451984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe if (range_check) { 2452984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe DCHECK(range_check_branch != nullptr); 2453984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've already null checked. 2454984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe AddIntrinsicSlowPath(info, range_check_branch); 2455984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } 2456984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe return true; 2457984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe} 2458984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe 24596bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalovbool X86Mir2Lir::GenInlinedCurrentThread(CallInfo* info) { 24606bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov RegLocation rl_dest = InlineTarget(info); 24616bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 24626bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov // Early exit if the result is unused. 24636bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov if (rl_dest.orig_sreg < 0) { 24646bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov return true; 24656bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov } 24666bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 24676bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov RegLocation rl_result = EvalLoc(rl_dest, kRefReg, true); 24686bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 24696bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov if (cu_->target64) { 24706bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov OpRegThreadMem(kOpMov, rl_result.reg, Thread::PeerOffset<8>()); 24716bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov } else { 24726bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov OpRegThreadMem(kOpMov, rl_result.reg, Thread::PeerOffset<4>()); 24736bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov } 24746bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 24756bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov StoreValue(rl_dest, rl_result); 24766bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov return true; 24776bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov} 24786bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 24796dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev/** 24806dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev * Lock temp registers for explicit usage. Registers will be freed in destructor. 24816dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev */ 24826dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim KazantsevX86Mir2Lir::ExplicitTempRegisterLock::ExplicitTempRegisterLock(X86Mir2Lir* mir_to_lir, 24836dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev int n_regs, ...) : 24846dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev temp_regs_(n_regs), 24856dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_(mir_to_lir) { 24866dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev va_list regs; 24876dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev va_start(regs, n_regs); 24886dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev for (int i = 0; i < n_regs; i++) { 24896dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev RegStorage reg = *(va_arg(regs, RegStorage*)); 24906dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev RegisterInfo* info = mir_to_lir_->GetRegInfo(reg); 24916dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 24926dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev // Make sure we don't have promoted register here. 24936dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev DCHECK(info->IsTemp()); 24946dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 24956dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev temp_regs_.push_back(reg); 24966dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->FlushReg(reg); 24976dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 24986dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev if (reg.IsPair()) { 24996dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev RegStorage partner = info->Partner(); 25006dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev temp_regs_.push_back(partner); 25016dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->FlushReg(partner); 25026dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev } 25036dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 25046dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->Clobber(reg); 25056dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->LockTemp(reg); 25066dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev } 25076dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 25086dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev va_end(regs); 25096dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev} 25106dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 25116dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev/* 25126dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev * Free all locked registers. 25136dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev */ 25146dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim KazantsevX86Mir2Lir::ExplicitTempRegisterLock::~ExplicitTempRegisterLock() { 25156dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev // Free all locked temps. 25166dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev for (auto it : temp_regs_) { 25176dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->FreeTemp(it); 25186dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev } 25196dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev} 25206dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 2521717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkovint X86Mir2Lir::GenDalvikArgsBulkCopy(CallInfo* info, int first, int count) { 2522717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (count < 4) { 2523717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // It does not make sense to use this utility if we have no chance to use 2524717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // 128-bit move. 2525717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return count; 2526717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2527717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov GenDalvikArgsFlushPromoted(info, first); 2528717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2529717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // The rest can be copied together 2530717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov int current_src_offset = SRegOffset(info->args[first].s_reg_low); 2531717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov int current_dest_offset = StackVisitor::GetOutVROffset(first, cu_->instruction_set); 2532717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2533717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Only davik regs are accessed in this loop; no next_call_insn() calls. 2534717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 2535717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov while (count > 0) { 2536717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // This is based on the knowledge that the stack itself is 16-byte aligned. 2537717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bool src_is_16b_aligned = (current_src_offset & 0xF) == 0; 2538717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bool dest_is_16b_aligned = (current_dest_offset & 0xF) == 0; 2539717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov size_t bytes_to_move; 2540717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2541717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov /* 2542717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * The amount to move defaults to 32-bit. If there are 4 registers left to move, then do a 2543717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * a 128-bit move because we won't get the chance to try to aligned. If there are more than 2544717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * 4 registers left to move, consider doing a 128-bit only if either src or dest are aligned. 2545717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * We do this because we could potentially do a smaller move to align. 2546717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov */ 2547717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (count == 4 || (count > 4 && (src_is_16b_aligned || dest_is_16b_aligned))) { 2548717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Moving 128-bits via xmm register. 2549717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bytes_to_move = sizeof(uint32_t) * 4; 2550717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2551717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Allocate a free xmm temp. Since we are working through the calling sequence, 2552717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // we expect to have an xmm temporary available. AllocTempDouble will abort if 2553717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // there are no free registers. 2554717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov RegStorage temp = AllocTempDouble(); 2555717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2556717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov LIR* ld1 = nullptr; 2557717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov LIR* ld2 = nullptr; 2558717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov LIR* st1 = nullptr; 2559717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov LIR* st2 = nullptr; 2560717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2561717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov /* 2562717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * The logic is similar for both loads and stores. If we have 16-byte alignment, 2563717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * do an aligned move. If we have 8-byte alignment, then do the move in two 2564717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * parts. This approach prevents possible cache line splits. Finally, fall back 2565717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * to doing an unaligned move. In most cases we likely won't split the cache 2566717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * line but we cannot prove it and thus take a conservative approach. 2567717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov */ 2568717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bool src_is_8b_aligned = (current_src_offset & 0x7) == 0; 2569717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bool dest_is_8b_aligned = (current_dest_offset & 0x7) == 0; 2570717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2571717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (src_is_16b_aligned) { 2572717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld1 = OpMovRegMem(temp, TargetPtrReg(kSp), current_src_offset, kMovA128FP); 2573717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else if (src_is_8b_aligned) { 2574717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld1 = OpMovRegMem(temp, TargetPtrReg(kSp), current_src_offset, kMovLo128FP); 2575717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld2 = OpMovRegMem(temp, TargetPtrReg(kSp), current_src_offset + (bytes_to_move >> 1), 2576717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov kMovHi128FP); 2577717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2578717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld1 = OpMovRegMem(temp, TargetPtrReg(kSp), current_src_offset, kMovU128FP); 2579717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2580717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2581717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (dest_is_16b_aligned) { 2582717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st1 = OpMovMemReg(TargetPtrReg(kSp), current_dest_offset, temp, kMovA128FP); 2583717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else if (dest_is_8b_aligned) { 2584717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st1 = OpMovMemReg(TargetPtrReg(kSp), current_dest_offset, temp, kMovLo128FP); 2585717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st2 = OpMovMemReg(TargetPtrReg(kSp), current_dest_offset + (bytes_to_move >> 1), 2586717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov temp, kMovHi128FP); 2587717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2588717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st1 = OpMovMemReg(TargetPtrReg(kSp), current_dest_offset, temp, kMovU128FP); 2589717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2590717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2591717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // TODO If we could keep track of aliasing information for memory accesses that are wider 2592717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // than 64-bit, we wouldn't need to set up a barrier. 2593717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (ld1 != nullptr) { 2594717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (ld2 != nullptr) { 2595717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // For 64-bit load we can actually set up the aliasing information. 2596717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov AnnotateDalvikRegAccess(ld1, current_src_offset >> 2, true, true); 2597717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov AnnotateDalvikRegAccess(ld2, (current_src_offset + (bytes_to_move >> 1)) >> 2, true, 2598717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov true); 2599717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2600717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Set barrier for 128-bit load. 2601717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld1->u.m.def_mask = &kEncodeAll; 2602717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2603717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2604717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (st1 != nullptr) { 2605717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (st2 != nullptr) { 2606717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // For 64-bit store we can actually set up the aliasing information. 2607717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov AnnotateDalvikRegAccess(st1, current_dest_offset >> 2, false, true); 2608717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov AnnotateDalvikRegAccess(st2, (current_dest_offset + (bytes_to_move >> 1)) >> 2, false, 2609717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov true); 2610717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2611717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Set barrier for 128-bit store. 2612717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st1->u.m.def_mask = &kEncodeAll; 2613717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2614717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2615717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2616717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Free the temporary used for the data movement. 2617717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov FreeTemp(temp); 2618717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2619717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Moving 32-bits via general purpose register. 2620717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bytes_to_move = sizeof(uint32_t); 2621717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2622717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Instead of allocating a new temp, simply reuse one of the registers being used 2623717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // for argument passing. 2624717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov RegStorage temp = TargetReg(kArg3, kNotWide); 2625717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2626717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Now load the argument VR and store to the outs. 2627717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov Load32Disp(TargetPtrReg(kSp), current_src_offset, temp); 2628717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov Store32Disp(TargetPtrReg(kSp), current_dest_offset, temp); 2629717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2630717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2631717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov current_src_offset += bytes_to_move; 2632717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov current_dest_offset += bytes_to_move; 2633717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov count -= (bytes_to_move >> 2); 2634717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2635717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov DCHECK_EQ(count, 0); 2636717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return count; 2637717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov} 2638717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 26397934ac288acfb2552bb0b06ec1f61e5820d924a4Brian Carlstrom} // namespace art 2640