target_x86.cc revision ca5413403192022d734ce76fda9a84aa63eb9148
1efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* 2efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Copyright (C) 2012 The Android Open Source Project 3efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * 4efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Licensed under the Apache License, Version 2.0 (the "License"); 5efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * you may not use this file except in compliance with the License. 6efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * You may obtain a copy of the License at 7efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * 8efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * http://www.apache.org/licenses/LICENSE-2.0 9efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * 10efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Unless required by applicable law or agreed to in writing, software 11efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * distributed under the License is distributed on an "AS IS" BASIS, 12efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * See the License for the specific language governing permissions and 14efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * limitations under the License. 15efc6369224b036a1fb77849f7ae65b3492c832c0buzbee */ 16efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 176dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev#include <cstdarg> 18f3e2cc4a38389aa75eb8ee3973a535254bf1c8d2Nicolas Geoffray#include <inttypes.h> 196dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev#include <string> 20f3e2cc4a38389aa75eb8ee3973a535254bf1c8d2Nicolas Geoffray 218366ca0d7ba3b80a2d5be65ba436446cc32440bdElliott Hughes#include "arch/instruction_set_features.h" 2253c913bb71b218714823c8c87a1f92830c336f61Andreas Gampe#include "backend_x86.h" 2302031b185b4653e6c72e21f7a51238b903f6d638buzbee#include "codegen_x86.h" 247940e44f4517de5e2634a7e07d58d0fb26160513Brian Carlstrom#include "dex/compiler_internals.h" 257940e44f4517de5e2634a7e07d58d0fb26160513Brian Carlstrom#include "dex/quick/mir_to_lir-inl.h" 26b5860fb459f1ed71f39d8a87b45bee6727d79fe8buzbee#include "dex/reg_storage_eq.h" 277e70b002c4552347ed1af8c002a0e13f08864f20Ian Rogers#include "mirror/array-inl.h" 28f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko#include "mirror/art_method.h" 29e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell#include "mirror/string.h" 30b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A#include "oat.h" 31641ce0371c2f0dc95d26be02d8366124c8b66653Brian Carlstrom#include "x86_lir.h" 32547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen#include "utils/dwarf_cfi.h" 33efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 34efc6369224b036a1fb77849f7ae65b3492c832c0buzbeenamespace art { 35efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 36089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_regs_arr_32[] = { 379ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_rAX, rs_rCX, rs_rDX, rs_rBX, rs_rX86_SP_32, rs_rBP, rs_rSI, rs_rDI, 389ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 39089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_regs_arr_64[] = { 4076af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko rs_rAX, rs_rCX, rs_rDX, rs_rBX, rs_rX86_SP_32, rs_rBP, rs_rSI, rs_rDI, 41091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_r8, rs_r9, rs_r10, rs_r11, rs_r12, rs_r13, rs_r14, rs_r15 42efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 43089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_regs_arr_64q[] = { 440999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko rs_r0q, rs_r1q, rs_r2q, rs_r3q, rs_rX86_SP_64, rs_r5q, rs_r6q, rs_r7q, 45a20468c004264592f309a548fc71ba62a69b8742Dmitry Petrochenko rs_r8q, rs_r9q, rs_r10q, rs_r11q, rs_r12q, rs_r13q, rs_r14q, rs_r15q 460999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko}; 47089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage sp_regs_arr_32[] = { 489ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_fr0, rs_fr1, rs_fr2, rs_fr3, rs_fr4, rs_fr5, rs_fr6, rs_fr7, 499ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 50089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage sp_regs_arr_64[] = { 51091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_fr0, rs_fr1, rs_fr2, rs_fr3, rs_fr4, rs_fr5, rs_fr6, rs_fr7, 52091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_fr8, rs_fr9, rs_fr10, rs_fr11, rs_fr12, rs_fr13, rs_fr14, rs_fr15 53efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 54089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage dp_regs_arr_32[] = { 559ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_dr0, rs_dr1, rs_dr2, rs_dr3, rs_dr4, rs_dr5, rs_dr6, rs_dr7, 569ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 57089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage dp_regs_arr_64[] = { 58091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_dr0, rs_dr1, rs_dr2, rs_dr3, rs_dr4, rs_dr5, rs_dr6, rs_dr7, 59091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_dr8, rs_dr9, rs_dr10, rs_dr11, rs_dr12, rs_dr13, rs_dr14, rs_dr15 60efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 61c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovstatic constexpr RegStorage xp_regs_arr_32[] = { 62c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_xr0, rs_xr1, rs_xr2, rs_xr3, rs_xr4, rs_xr5, rs_xr6, rs_xr7, 63c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov}; 64c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovstatic constexpr RegStorage xp_regs_arr_64[] = { 65c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_xr0, rs_xr1, rs_xr2, rs_xr3, rs_xr4, rs_xr5, rs_xr6, rs_xr7, 66c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_xr8, rs_xr9, rs_xr10, rs_xr11, rs_xr12, rs_xr13, rs_xr14, rs_xr15 67c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov}; 68089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage reserved_regs_arr_32[] = {rs_rX86_SP_32}; 6976af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenkostatic constexpr RegStorage reserved_regs_arr_64[] = {rs_rX86_SP_32}; 70089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage reserved_regs_arr_64q[] = {rs_rX86_SP_64}; 71089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_temps_arr_32[] = {rs_rAX, rs_rCX, rs_rDX, rs_rBX}; 72089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_temps_arr_64[] = { 739ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_rAX, rs_rCX, rs_rDX, rs_rSI, rs_rDI, 749ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_r8, rs_r9, rs_r10, rs_r11 759ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 76c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 77c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// How to add register to be available for promotion: 78c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 1) Remove register from array defining temp 79c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 2) Update ClobberCallerSave 80c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 3) Update JNI compiler ABI: 81c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 3.1) add reg in JniCallingConvention method 82c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 3.2) update CoreSpillMask/FpSpillMask 83c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4) Update entrypoints 84c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4.1) Update constants in asm_support_x86_64.h for new frame size 85c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4.2) Remove entry in SmashCallerSaves 86c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4.3) Update jni_entrypoints to spill/unspill new callee save reg 87c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 4.4) Update quick_entrypoints to spill/unspill new callee save reg 88c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 5) Update runtime ABI 89c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 5.1) Update quick_method_frame_info with new required spills 90c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// 5.2) Update QuickArgumentVisitor with new offsets to gprs and xmms 91c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// Note that you cannot use register corresponding to incoming args 92c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// according to ABI and QCG needs one additional XMM temp for 93c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov// bulk copy in preparation to call. 94089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage core_temps_arr_64q[] = { 950999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko rs_r0q, rs_r1q, rs_r2q, rs_r6q, rs_r7q, 960999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko rs_r8q, rs_r9q, rs_r10q, rs_r11q 970999a6f7c83d10aa59b75f079f0d2fdbac982cf7Dmitry Petrochenko}; 98089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage sp_temps_arr_32[] = { 999ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_fr0, rs_fr1, rs_fr2, rs_fr3, rs_fr4, rs_fr5, rs_fr6, rs_fr7, 1009ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 101089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage sp_temps_arr_64[] = { 102091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_fr0, rs_fr1, rs_fr2, rs_fr3, rs_fr4, rs_fr5, rs_fr6, rs_fr7, 103c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_fr8, rs_fr9, rs_fr10, rs_fr11 104091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee}; 105089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage dp_temps_arr_32[] = { 1069ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko rs_dr0, rs_dr1, rs_dr2, rs_dr3, rs_dr4, rs_dr5, rs_dr6, rs_dr7, 1079ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko}; 108089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage dp_temps_arr_64[] = { 109091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee rs_dr0, rs_dr1, rs_dr2, rs_dr3, rs_dr4, rs_dr5, rs_dr6, rs_dr7, 110c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_dr8, rs_dr9, rs_dr10, rs_dr11 111091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee}; 112091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee 113089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage xp_temps_arr_32[] = { 114fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell rs_xr0, rs_xr1, rs_xr2, rs_xr3, rs_xr4, rs_xr5, rs_xr6, rs_xr7, 115fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell}; 116089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr RegStorage xp_temps_arr_64[] = { 117fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell rs_xr0, rs_xr1, rs_xr2, rs_xr3, rs_xr4, rs_xr5, rs_xr6, rs_xr7, 118c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov rs_xr8, rs_xr9, rs_xr10, rs_xr11 119fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell}; 120fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 121089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> empty_pool; 122089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_regs_32(core_regs_arr_32); 123089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_regs_64(core_regs_arr_64); 124089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_regs_64q(core_regs_arr_64q); 125089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> sp_regs_32(sp_regs_arr_32); 126089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> sp_regs_64(sp_regs_arr_64); 127089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> dp_regs_32(dp_regs_arr_32); 128089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> dp_regs_64(dp_regs_arr_64); 129c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovstatic constexpr ArrayRef<const RegStorage> xp_regs_32(xp_regs_arr_32); 130c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovstatic constexpr ArrayRef<const RegStorage> xp_regs_64(xp_regs_arr_64); 131089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> reserved_regs_32(reserved_regs_arr_32); 132089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> reserved_regs_64(reserved_regs_arr_64); 133089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> reserved_regs_64q(reserved_regs_arr_64q); 134089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_temps_32(core_temps_arr_32); 135089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_temps_64(core_temps_arr_64); 136089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> core_temps_64q(core_temps_arr_64q); 137089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> sp_temps_32(sp_temps_arr_32); 138089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> sp_temps_64(sp_temps_arr_64); 139089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> dp_temps_32(dp_temps_arr_32); 140089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> dp_temps_64(dp_temps_arr_64); 141089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Marko 142089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> xp_temps_32(xp_temps_arr_32); 143089142cf1d0c028b5a7c703baf0b97f4a4ada3f7Vladimir Markostatic constexpr ArrayRef<const RegStorage> xp_temps_64(xp_temps_arr_64); 144fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 1452ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::LocCReturn() { 14600e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee return x86_loc_c_return; 147efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 148efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 149a0cd2d701f29e0bc6275f1b13c0edfd4ec391879buzbeeRegLocation X86Mir2Lir::LocCReturnRef() { 150a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu return cu_->target64 ? x86_64_loc_c_return_ref : x86_loc_c_return_ref; 151a0cd2d701f29e0bc6275f1b13c0edfd4ec391879buzbee} 152a0cd2d701f29e0bc6275f1b13c0edfd4ec391879buzbee 1532ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::LocCReturnWide() { 154dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina return cu_->target64 ? x86_64_loc_c_return_wide : x86_loc_c_return_wide; 155efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 156efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 1572ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::LocCReturnFloat() { 15800e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee return x86_loc_c_return_float; 159efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 160efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 1612ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::LocCReturnDouble() { 16200e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee return x86_loc_c_return_double; 163efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 164efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 165b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers// 32-bit reg storage locations for 32-bit targets. 166b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogersstatic const RegStorage RegStorage32FromSpecialTargetRegister_Target32[] { 167b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kSelf - Thread pointer. 168b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kSuspend - Used to reduce suspend checks for some targets. 169b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kLr - no register as the return address is pushed on entry. 170b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kPc - not exposed on X86 see kX86StartOfMethod. 171b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rX86_SP_32, // kSp 172b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kArg0 173b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rCX, // kArg1 174b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDX, // kArg2 175b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rBX, // kArg3 176b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg4 177b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg5 178b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg6 179b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg7 180b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kFArg0 181b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rCX, // kFArg1 182b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDX, // kFArg2 183b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rBX, // kFArg3 184b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg4 185b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg5 186b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg6 187b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg7 188b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg8 189b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg9 190b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg10 191b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg11 192b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg12 193b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg13 194b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg14 195b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg15 196b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kRet0 197b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDX, // kRet1 198b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kInvokeTgt 199b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kHiddenArg - used to hold the method index before copying to fr0. 200b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr0, // kHiddenFpArg 201b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rCX, // kCount 202b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers}; 203b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers 204b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers// 32-bit reg storage locations for 64-bit targets. 205b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogersstatic const RegStorage RegStorage32FromSpecialTargetRegister_Target64[] { 206b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kSelf - Thread pointer. 207b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kSuspend - Used to reduce suspend checks for some targets. 208b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kLr - no register as the return address is pushed on entry. 20927dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell RegStorage(kRIPReg), // kPc 210b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rX86_SP_32, // kSp 211b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDI, // kArg0 212b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rSI, // kArg1 213b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDX, // kArg2 214b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rCX, // kArg3 215b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_r8, // kArg4 216b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_r9, // kArg5 217b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg6 218b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kArg7 219b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr0, // kFArg0 220b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr1, // kFArg1 221b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr2, // kFArg2 222b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr3, // kFArg3 223b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr4, // kFArg4 224b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr5, // kFArg5 225b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr6, // kFArg6 226b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_fr7, // kFArg7 227b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg8 228b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg9 229b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg10 230b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg11 231b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg12 232b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg13 233b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg14 234b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kFArg15 235b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kRet0 236b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rDX, // kRet1 237b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kInvokeTgt 238b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rAX, // kHiddenArg 239b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers RegStorage::InvalidReg(), // kHiddenFpArg 240b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers rs_rCX, // kCount 241b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers}; 242b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogersstatic_assert(arraysize(RegStorage32FromSpecialTargetRegister_Target32) == 243b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers arraysize(RegStorage32FromSpecialTargetRegister_Target64), 244b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers "Mismatch in RegStorage array sizes"); 245b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers 246a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu// Return a target-dependent special register for 32-bit. 247b28c1c06236751aa5c9e64dcb68b3c940341e496Ian RogersRegStorage X86Mir2Lir::TargetReg32(SpecialTargetRegister reg) const { 248b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_EQ(RegStorage32FromSpecialTargetRegister_Target32[kCount], rs_rCX); 249b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_EQ(RegStorage32FromSpecialTargetRegister_Target64[kCount], rs_rCX); 250b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_LT(reg, arraysize(RegStorage32FromSpecialTargetRegister_Target32)); 251b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers return cu_->target64 ? RegStorage32FromSpecialTargetRegister_Target64[reg] 252b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers : RegStorage32FromSpecialTargetRegister_Target32[reg]; 253efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 254efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 255a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying FuRegStorage X86Mir2Lir::TargetReg(SpecialTargetRegister reg) { 2566a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNUSED(reg); 257a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu LOG(FATAL) << "Do not use this function!!!"; 2586a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNREACHABLE(); 259a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu} 260a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu 261efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* 262efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Decode the register id. 263efc6369224b036a1fb77849f7ae65b3492c832c0buzbee */ 2648dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir MarkoResourceMask X86Mir2Lir::GetRegMaskCommon(const RegStorage& reg) const { 2658dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko /* Double registers in x86 are just a single FP register. This is always just a single bit. */ 2668dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko return ResourceMask::Bit( 2678dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko /* FP register starts at bit position 16 */ 2688dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ((reg.IsFloat() || reg.StorageSize() > 8) ? kX86FPReg0 : 0) + reg.GetRegNum()); 2698dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko} 2708dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko 2718dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir MarkoResourceMask X86Mir2Lir::GetPCUseDefEncoding() const { 2728dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko return kEncodeNone; 273efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 274efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 2758dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Markovoid X86Mir2Lir::SetupTargetResourceMasks(LIR* lir, uint64_t flags, 2768dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ResourceMask* use_mask, ResourceMask* def_mask) { 2776a58cb16d803c9a7b3a75ccac8be19dd9d4e520dDmitry Petrochenko DCHECK(cu_->instruction_set == kX86 || cu_->instruction_set == kX86_64); 278b48819db07f9a0992a72173380c24249d7fc648abuzbee DCHECK(!lir->flags.use_def_invalid); 279efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 280efc6369224b036a1fb77849f7ae65b3492c832c0buzbee // X86-specific resource map setup here. 281efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_USE_SP) { 2828dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko use_mask->SetBit(kX86RegSP); 283efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 284efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 285efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_DEF_SP) { 2868dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko def_mask->SetBit(kX86RegSP); 287efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 288efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 289efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_DEFA) { 2908dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(def_mask, rs_rAX.GetReg()); 291efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 292efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 293efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_DEFD) { 2948dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(def_mask, rs_rDX.GetReg()); 295efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 296efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_USEA) { 2978dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rAX.GetReg()); 298efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 299efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 300efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_USEC) { 3018dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rCX.GetReg()); 302efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 303efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 304efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (flags & REG_USED) { 3058dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rDX.GetReg()); 306efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 30770b797d998f2a28e39f7d6ffc8a07c9cbc47da14Vladimir Marko 30870b797d998f2a28e39f7d6ffc8a07c9cbc47da14Vladimir Marko if (flags & REG_USEB) { 3098dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rBX.GetReg()); 31070b797d998f2a28e39f7d6ffc8a07c9cbc47da14Vladimir Marko } 3114028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 3124028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Fixup hard to describe instruction: Uses rAX, rCX, rDI; sets rDI. 3134028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (lir->opcode == kX86RepneScasw) { 3148dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rAX.GetReg()); 3158dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rCX.GetReg()); 3168dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(use_mask, rs_rDI.GetReg()); 3178dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko SetupRegMask(def_mask, rs_rDI.GetReg()); 3184028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 319e90501da0222717d75c126ebf89569db3976927eSerguei Katkov 320e90501da0222717d75c126ebf89569db3976927eSerguei Katkov if (flags & USE_FP_STACK) { 3218dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko use_mask->SetBit(kX86FPStack); 3228dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko def_mask->SetBit(kX86FPStack); 323e90501da0222717d75c126ebf89569db3976927eSerguei Katkov } 324efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 325efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 326efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* For dumping instructions */ 327efc6369224b036a1fb77849f7ae65b3492c832c0buzbeestatic const char* x86RegName[] = { 328efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", 329efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 330efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 331efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 332efc6369224b036a1fb77849f7ae65b3492c832c0buzbeestatic const char* x86CondName[] = { 333efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "O", 334efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NO", 335efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "B/NAE/C", 336efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NB/AE/NC", 337efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "Z/EQ", 338efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NZ/NE", 339efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "BE/NA", 340efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NBE/A", 341efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "S", 342efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NS", 343efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "P/PE", 344efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NP/PO", 345efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "L/NGE", 346efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NL/GE", 347efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "LE/NG", 348efc6369224b036a1fb77849f7ae65b3492c832c0buzbee "NLE/G" 349efc6369224b036a1fb77849f7ae65b3492c832c0buzbee}; 350efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 351efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* 352efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * Interpret a format string and build a string no longer than size 353efc6369224b036a1fb77849f7ae65b3492c832c0buzbee * See format key in Assemble.cc. 354efc6369224b036a1fb77849f7ae65b3492c832c0buzbee */ 3551fd3346740dfb7f47be9922312b68a4227fada96buzbeestd::string X86Mir2Lir::BuildInsnString(const char *fmt, LIR *lir, unsigned char* base_addr) { 356efc6369224b036a1fb77849f7ae65b3492c832c0buzbee std::string buf; 357efc6369224b036a1fb77849f7ae65b3492c832c0buzbee size_t i = 0; 358efc6369224b036a1fb77849f7ae65b3492c832c0buzbee size_t fmt_len = strlen(fmt); 359efc6369224b036a1fb77849f7ae65b3492c832c0buzbee while (i < fmt_len) { 360efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (fmt[i] != '!') { 361efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += fmt[i]; 362efc6369224b036a1fb77849f7ae65b3492c832c0buzbee i++; 363efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } else { 364efc6369224b036a1fb77849f7ae65b3492c832c0buzbee i++; 365efc6369224b036a1fb77849f7ae65b3492c832c0buzbee DCHECK_LT(i, fmt_len); 366efc6369224b036a1fb77849f7ae65b3492c832c0buzbee char operand_number_ch = fmt[i]; 367efc6369224b036a1fb77849f7ae65b3492c832c0buzbee i++; 368efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (operand_number_ch == '!') { 369efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += "!"; 370efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } else { 371efc6369224b036a1fb77849f7ae65b3492c832c0buzbee int operand_number = operand_number_ch - '0'; 372efc6369224b036a1fb77849f7ae65b3492c832c0buzbee DCHECK_LT(operand_number, 6); // Expect upto 6 LIR operands. 373efc6369224b036a1fb77849f7ae65b3492c832c0buzbee DCHECK_LT(i, fmt_len); 374efc6369224b036a1fb77849f7ae65b3492c832c0buzbee int operand = lir->operands[operand_number]; 375efc6369224b036a1fb77849f7ae65b3492c832c0buzbee switch (fmt[i]) { 376efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 'c': 377efc6369224b036a1fb77849f7ae65b3492c832c0buzbee DCHECK_LT(static_cast<size_t>(operand), sizeof(x86CondName)); 378efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += x86CondName[operand]; 379efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 380efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 'd': 381efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += StringPrintf("%d", operand); 382efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 3835192cbb12856b12620dc346758605baaa1469cedYixin Shou case 'q': { 3845192cbb12856b12620dc346758605baaa1469cedYixin Shou int64_t value = static_cast<int64_t>(static_cast<int64_t>(operand) << 32 | 3855192cbb12856b12620dc346758605baaa1469cedYixin Shou static_cast<uint32_t>(lir->operands[operand_number+1])); 3865192cbb12856b12620dc346758605baaa1469cedYixin Shou buf +=StringPrintf("%" PRId64, value); 387e70f179aca4f13b15be8a47a4d9e5b6c2422c69aHaitao Feng break; 3885192cbb12856b12620dc346758605baaa1469cedYixin Shou } 389efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 'p': { 3900d82948094d9a198e01aa95f64012bdedd5b6fc9buzbee EmbeddedData *tab_rec = reinterpret_cast<EmbeddedData*>(UnwrapPointer(operand)); 391fa57c47f1b72916371a9c2d5c1389219bce655b4buzbee buf += StringPrintf("0x%08x", tab_rec->offset); 392efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 393efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 394efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 'r': 395091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee if (RegStorage::IsFloat(operand)) { 396091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee int fp_reg = RegStorage::RegNum(operand); 397efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += StringPrintf("xmm%d", fp_reg); 398efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } else { 399091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee int reg_num = RegStorage::RegNum(operand); 400091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee DCHECK_LT(static_cast<size_t>(reg_num), sizeof(x86RegName)); 401091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee buf += x86RegName[reg_num]; 402efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 403efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 404efc6369224b036a1fb77849f7ae65b3492c832c0buzbee case 't': 405107c31e598b649a8bb8d959d6a0377937e63e624Ian Rogers buf += StringPrintf("0x%08" PRIxPTR " (L%p)", 406107c31e598b649a8bb8d959d6a0377937e63e624Ian Rogers reinterpret_cast<uintptr_t>(base_addr) + lir->offset + operand, 407107c31e598b649a8bb8d959d6a0377937e63e624Ian Rogers lir->target); 408efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 409efc6369224b036a1fb77849f7ae65b3492c832c0buzbee default: 410efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf += StringPrintf("DecodeError '%c'", fmt[i]); 411efc6369224b036a1fb77849f7ae65b3492c832c0buzbee break; 412efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 413efc6369224b036a1fb77849f7ae65b3492c832c0buzbee i++; 414efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 415efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 416efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 417efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return buf; 418efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 419efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 4208dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Markovoid X86Mir2Lir::DumpResourceMask(LIR *x86LIR, const ResourceMask& mask, const char *prefix) { 421efc6369224b036a1fb77849f7ae65b3492c832c0buzbee char buf[256]; 422efc6369224b036a1fb77849f7ae65b3492c832c0buzbee buf[0] = 0; 423efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 4248dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.Equals(kEncodeAll)) { 425efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcpy(buf, "all"); 426efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } else { 427efc6369224b036a1fb77849f7ae65b3492c832c0buzbee char num[8]; 428efc6369224b036a1fb77849f7ae65b3492c832c0buzbee int i; 429efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 430efc6369224b036a1fb77849f7ae65b3492c832c0buzbee for (i = 0; i < kX86RegEnd; i++) { 4318dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(i)) { 432988e6ea9ac66edf1e205851df9bb53de3f3763f3Ian Rogers snprintf(num, arraysize(num), "%d ", i); 433efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, num); 434efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 435efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 436efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 4378dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(ResourceMask::kCCode)) { 438efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, "cc "); 439efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 440efc6369224b036a1fb77849f7ae65b3492c832c0buzbee /* Memory bits */ 4418dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (x86LIR && (mask.HasBit(ResourceMask::kDalvikReg))) { 442988e6ea9ac66edf1e205851df9bb53de3f3763f3Ian Rogers snprintf(buf + strlen(buf), arraysize(buf) - strlen(buf), "dr%d%s", 443988e6ea9ac66edf1e205851df9bb53de3f3763f3Ian Rogers DECODE_ALIAS_INFO_REG(x86LIR->flags.alias_info), 444988e6ea9ac66edf1e205851df9bb53de3f3763f3Ian Rogers (DECODE_ALIAS_INFO_WIDE(x86LIR->flags.alias_info)) ? "(+1)" : ""); 445efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 4468dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(ResourceMask::kLiteral)) { 447efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, "lit "); 448efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 449efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 4508dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(ResourceMask::kHeapRef)) { 451efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, "heap "); 452efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 4538dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko if (mask.HasBit(ResourceMask::kMustNotAlias)) { 454efc6369224b036a1fb77849f7ae65b3492c832c0buzbee strcat(buf, "noalias "); 455efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 456efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 457efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (buf[0]) { 458efc6369224b036a1fb77849f7ae65b3492c832c0buzbee LOG(INFO) << prefix << ": " << buf; 459efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 460efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 46102031b185b4653e6c72e21f7a51238b903f6d638buzbee 4621fd3346740dfb7f47be9922312b68a4227fada96buzbeevoid X86Mir2Lir::AdjustSpillMask() { 463efc6369224b036a1fb77849f7ae65b3492c832c0buzbee // Adjustment for LR spilling, x86 has no LR so nothing to do here 464091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee core_spill_mask_ |= (1 << rs_rRET.GetRegNum()); 4651fd3346740dfb7f47be9922312b68a4227fada96buzbee num_core_spills_++; 466efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 467efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 468e87f9b5185379c8cf8392d65a63e7bf7e51b97e7Mark MendellRegStorage X86Mir2Lir::AllocateByteRegister() { 4697e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu RegStorage reg = AllocTypedTemp(false, kCoreReg); 470dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (!cu_->target64) { 471b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_LT(reg.GetRegNum(), rs_rX86_SP_32.GetRegNum()); 4727e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu } 4737e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu return reg; 4747e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu} 4757e399fd3a99ba9c9dbfafdf14f75dd318fa7d454Chao-ying Fu 47660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan BanerjiRegStorage X86Mir2Lir::Get128BitRegister(RegStorage reg) { 477b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return GetRegInfo(reg)->Master()->GetReg(); 47860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 47960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 480b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogersbool X86Mir2Lir::IsByteRegister(RegStorage reg) const { 481b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers return cu_->target64 || reg.GetRegNum() < rs_rX86_SP_32.GetRegNum(); 482e87f9b5185379c8cf8392d65a63e7bf7e51b97e7Mark Mendell} 483e87f9b5185379c8cf8392d65a63e7bf7e51b97e7Mark Mendell 484efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* Clobber all regs that might be used by an external C call */ 48531c2aac7137b69d5622eea09597500731fbee2efVladimir Markovoid X86Mir2Lir::ClobberCallerSave() { 486dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 487c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rAX); 488c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rCX); 489c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rDX); 490c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rSI); 491c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rDI); 492c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 49335ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_r8); 49435ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_r9); 49535ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_r10); 49635ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_r11); 49735ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu 49835ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_fr8); 49935ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_fr9); 50035ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_fr10); 50135ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu Clobber(rs_fr11); 502c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } else { 503c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rAX); 504c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rCX); 505c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rDX); 506c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_rBX); 50735ec2b5faf9a2dbc3c0cddb7ebc09952b8a27d2aChao-ying Fu } 508c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 509c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr0); 510c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr1); 511c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr2); 512c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr3); 513c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr4); 514c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr5); 515c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr6); 516c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov Clobber(rs_fr7); 517efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 518efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 5191fd3346740dfb7f47be9922312b68a4227fada96buzbeeRegLocation X86Mir2Lir::GetReturnWideAlt() { 52052a77fc135f0e0df57ee24641c3f5ae415ff7bd6buzbee RegLocation res = LocCReturnWide(); 521b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_EQ(res.reg.GetLowReg(), rs_rAX.GetReg()); 522b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers DCHECK_EQ(res.reg.GetHighReg(), rs_rDX.GetReg()); 523091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee Clobber(rs_rAX); 524091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee Clobber(rs_rDX); 525091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee MarkInUse(rs_rAX); 526091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee MarkInUse(rs_rDX); 527091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee MarkWide(res.reg); 528efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return res; 529efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 530efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 5312ce745c06271d5223d57dbf08117b20d5b60694aBrian CarlstromRegLocation X86Mir2Lir::GetReturnAlt() { 53252a77fc135f0e0df57ee24641c3f5ae415ff7bd6buzbee RegLocation res = LocCReturn(); 533091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee res.reg.SetReg(rs_rDX.GetReg()); 534091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee Clobber(rs_rDX); 535091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee MarkInUse(rs_rDX); 536efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return res; 537efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 538efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 539efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* To be used when explicitly managing register use */ 5402ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromvoid X86Mir2Lir::LockCallTemps() { 541b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg0)); 542b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg1)); 543b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg2)); 544b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg3)); 545dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 546b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg4)); 547b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kArg5)); 548b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg0)); 549b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg1)); 550b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg2)); 551b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg3)); 552b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg4)); 553b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg5)); 554b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg6)); 555b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LockTemp(TargetReg32(kFArg7)); 55658994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 557efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 558efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 559efc6369224b036a1fb77849f7ae65b3492c832c0buzbee/* To be used when explicitly managing register use */ 5602ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromvoid X86Mir2Lir::FreeCallTemps() { 561b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg0)); 562b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg1)); 563b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg2)); 564b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg3)); 565dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 566b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg4)); 567b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kArg5)); 568b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg0)); 569b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg1)); 570b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg2)); 571b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg3)); 572b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg4)); 573b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg5)); 574b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg6)); 575b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers FreeTemp(TargetReg32(kFArg7)); 57658994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 577efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 578efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 57999ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusorubool X86Mir2Lir::ProvidesFullMemoryBarrier(X86OpCode opcode) { 58099ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru switch (opcode) { 58199ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru case kX86LockCmpxchgMR: 58299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru case kX86LockCmpxchgAR: 5830f9b9c508814a62c6e21c6a06cfe4de39b5036c0Ian Rogers case kX86LockCmpxchg64M: 5840f9b9c508814a62c6e21c6a06cfe4de39b5036c0Ian Rogers case kX86LockCmpxchg64A: 58599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru case kX86XchgMR: 58699ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru case kX86Mfence: 58799ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Atomic memory instructions provide full barrier. 58899ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru return true; 58999ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru default: 59099ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru break; 59199ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 59299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 59399ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Conservative if cannot prove it provides full barrier. 59499ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru return false; 59599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru} 59699ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 597b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampebool X86Mir2Lir::GenMemBarrier(MemBarrierKind barrier_kind) { 5988366ca0d7ba3b80a2d5be65ba436446cc32440bdElliott Hughes if (!cu_->GetInstructionSetFeatures()->IsSmp()) { 5998366ca0d7ba3b80a2d5be65ba436446cc32440bdElliott Hughes return false; 6008366ca0d7ba3b80a2d5be65ba436446cc32440bdElliott Hughes } 60199ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Start off with using the last LIR as the barrier. If it is not enough, then we will update it. 60299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru LIR* mem_barrier = last_lir_insn_; 60399ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 604b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe bool ret = false; 60599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru /* 60648f5c47907654350ce30a8dfdda0e977f5d3d39fHans Boehm * According to the JSR-133 Cookbook, for x86 only StoreLoad/AnyAny barriers need memory fence. 60748f5c47907654350ce30a8dfdda0e977f5d3d39fHans Boehm * All other barriers (LoadAny, AnyStore, StoreStore) are nops due to the x86 memory model. 60848f5c47907654350ce30a8dfdda0e977f5d3d39fHans Boehm * For those cases, all we need to ensure is that there is a scheduling barrier in place. 60999ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru */ 61048f5c47907654350ce30a8dfdda0e977f5d3d39fHans Boehm if (barrier_kind == kAnyAny) { 61199ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // If no LIR exists already that can be used a barrier, then generate an mfence. 61299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru if (mem_barrier == nullptr) { 61399ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru mem_barrier = NewLIR0(kX86Mfence); 614b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe ret = true; 61599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 61699ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 61799ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // If last instruction does not provide full barrier, then insert an mfence. 61899ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru if (ProvidesFullMemoryBarrier(static_cast<X86OpCode>(mem_barrier->opcode)) == false) { 61999ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru mem_barrier = NewLIR0(kX86Mfence); 620b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe ret = true; 62199ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 622b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler } else if (barrier_kind == kNTStoreStore) { 623b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler mem_barrier = NewLIR0(kX86Sfence); 624b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler ret = true; 62599ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 62699ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru 62799ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Now ensure that a scheduling barrier is in place. 62899ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru if (mem_barrier == nullptr) { 62999ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru GenBarrier(); 63099ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } else { 63199ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru // Mark as a scheduling barrier. 63299ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru DCHECK(!mem_barrier->flags.use_def_invalid); 6338dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko mem_barrier->u.m.def_mask = &kEncodeAll; 63499ad7230ccaace93bf323dea9790f35fe991a4a2Razvan A Lupusoru } 635b14329f90f725af0f67c45dfcb94933a426d63ceAndreas Gampe return ret; 636efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 63700e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee 6381fd3346740dfb7f47be9922312b68a4227fada96buzbeevoid X86Mir2Lir::CompilerInitializeRegAlloc() { 639dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 640e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reg_pool_.reset(new (arena_) RegisterPool(this, arena_, core_regs_64, core_regs_64q, sp_regs_64, 641e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko dp_regs_64, reserved_regs_64, reserved_regs_64q, 642e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko core_temps_64, core_temps_64q, 643e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko sp_temps_64, dp_temps_64)); 6449ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko } else { 645e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reg_pool_.reset(new (arena_) RegisterPool(this, arena_, core_regs_32, empty_pool, sp_regs_32, 646e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko dp_regs_32, reserved_regs_32, empty_pool, 647e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko core_temps_32, empty_pool, 648e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko sp_temps_32, dp_temps_32)); 6499ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko } 650091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee 651091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // Target-specific adjustments. 652091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee 653fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Add in XMM registers. 654c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov const ArrayRef<const RegStorage> *xp_regs = cu_->target64 ? &xp_regs_64 : &xp_regs_32; 655c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov for (RegStorage reg : *xp_regs) { 656fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell RegisterInfo* info = new (arena_) RegisterInfo(reg, GetRegMaskCommon(reg)); 657e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reginfo_map_[reg.GetReg()] = info; 658c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 659c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov const ArrayRef<const RegStorage> *xp_temps = cu_->target64 ? &xp_temps_64 : &xp_temps_32; 660c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov for (RegStorage reg : *xp_temps) { 661c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov RegisterInfo* xp_reg_info = GetRegInfo(reg); 662c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov xp_reg_info->SetIsTemp(true); 663fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 664fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 66527dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell // Special Handling for x86_64 RIP addressing. 66627dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell if (cu_->target64) { 66727dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell RegisterInfo* info = new (arena_) RegisterInfo(RegStorage(kRIPReg), kEncodeNone); 66827dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell reginfo_map_[kRIPReg] = info; 66927dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell } 67027dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell 671091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // Alias single precision xmm to double xmms. 672091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // TODO: as needed, add larger vector sizes - alias all to the largest. 673e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (RegisterInfo* info : reg_pool_->sp_regs_) { 674091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee int sp_reg_num = info->GetReg().GetRegNum(); 675fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell RegStorage xp_reg = RegStorage::Solo128(sp_reg_num); 676fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell RegisterInfo* xp_reg_info = GetRegInfo(xp_reg); 677fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // 128-bit xmm vector register's master storage should refer to itself. 678fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell DCHECK_EQ(xp_reg_info, xp_reg_info->Master()); 679fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 680fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Redirect 32-bit vector's master storage to 128-bit vector. 681fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell info->SetMaster(xp_reg_info); 682fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 68376af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko RegStorage dp_reg = RegStorage::FloatSolo64(sp_reg_num); 684091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee RegisterInfo* dp_reg_info = GetRegInfo(dp_reg); 685fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Redirect 64-bit vector's master storage to 128-bit vector. 686fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell dp_reg_info->SetMaster(xp_reg_info); 68776af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // Singles should show a single 32-bit mask bit, at first referring to the low half. 68876af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko DCHECK_EQ(info->StorageMask(), 0x1U); 68976af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko } 69076af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko 691dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 69276af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // Alias 32bit W registers to corresponding 64bit X registers. 693e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (RegisterInfo* info : reg_pool_->core_regs_) { 69476af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko int x_reg_num = info->GetReg().GetRegNum(); 69576af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko RegStorage x_reg = RegStorage::Solo64(x_reg_num); 69676af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko RegisterInfo* x_reg_info = GetRegInfo(x_reg); 69776af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // 64bit X register's master storage should refer to itself. 69876af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko DCHECK_EQ(x_reg_info, x_reg_info->Master()); 69976af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // Redirect 32bit W master storage to 64bit X. 70076af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko info->SetMaster(x_reg_info); 70176af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko // 32bit W should show a single 32-bit mask bit, at first referring to the low half. 70276af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko DCHECK_EQ(info->StorageMask(), 0x1U); 70376af0d307194045ece429dbaf62e93d3e08c6c20Dmitry Petrochenko } 704efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 705091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee 706091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // Don't start allocating temps at r0/s0/d0 or you may clobber return regs in early-exit methods. 707091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee // TODO: adjust for x86/hard float calling convention. 708091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee reg_pool_->next_core_reg_ = 2; 709091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee reg_pool_->next_sp_reg_ = 2; 710091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee reg_pool_->next_dp_reg_ = 1; 711efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 712efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 71360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjiint X86Mir2Lir::VectorRegisterSize() { 71460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return 128; 71560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 71660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 717b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan Aint X86Mir2Lir::NumReservableVectorRegisters(bool long_or_fp) { 718b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int num_vector_temps = cu_->target64 ? xp_temps_64.size() : xp_temps_32.size(); 719b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 720b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Leave a few temps for use by backend as scratch. 721b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return long_or_fp ? num_vector_temps - 2 : num_vector_temps - 1; 72260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 72360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 7241fd3346740dfb7f47be9922312b68a4227fada96buzbeevoid X86Mir2Lir::SpillCoreRegs() { 7251fd3346740dfb7f47be9922312b68a4227fada96buzbee if (num_core_spills_ == 0) { 726efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return; 727efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 728efc6369224b036a1fb77849f7ae65b3492c832c0buzbee // Spill mask not including fake return address register 729091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee uint32_t mask = core_spill_mask_ & ~(1 << rs_rRET.GetRegNum()); 730b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers int offset = 731b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers frame_size_ - (GetInstructionSetPointerSize(cu_->instruction_set) * num_core_spills_); 732c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov OpSize size = cu_->target64 ? k64 : k32; 733b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32; 734efc6369224b036a1fb77849f7ae65b3492c832c0buzbee for (int reg = 0; mask; mask >>= 1, reg++) { 735efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (mask & 0x1) { 736b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers StoreBaseDisp(rs_rSP, offset, 737b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers cu_->target64 ? RegStorage::Solo64(reg) : RegStorage::Solo32(reg), 738c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov size, kNotVolatile); 7399ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko offset += GetInstructionSetPointerSize(cu_->instruction_set); 740efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 741efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 742efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 743efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 7441fd3346740dfb7f47be9922312b68a4227fada96buzbeevoid X86Mir2Lir::UnSpillCoreRegs() { 7451fd3346740dfb7f47be9922312b68a4227fada96buzbee if (num_core_spills_ == 0) { 746efc6369224b036a1fb77849f7ae65b3492c832c0buzbee return; 747efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 748efc6369224b036a1fb77849f7ae65b3492c832c0buzbee // Spill mask not including fake return address register 749091cc408e9dc87e60fb64c61e186bea568fc3d3abuzbee uint32_t mask = core_spill_mask_ & ~(1 << rs_rRET.GetRegNum()); 7509ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko int offset = frame_size_ - (GetInstructionSetPointerSize(cu_->instruction_set) * num_core_spills_); 751c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov OpSize size = cu_->target64 ? k64 : k32; 752b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32; 753efc6369224b036a1fb77849f7ae65b3492c832c0buzbee for (int reg = 0; mask; mask >>= 1, reg++) { 754efc6369224b036a1fb77849f7ae65b3492c832c0buzbee if (mask & 0x1) { 755b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LoadBaseDisp(rs_rSP, offset, cu_->target64 ? RegStorage::Solo64(reg) : RegStorage::Solo32(reg), 756c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov size, kNotVolatile); 7579ee801f5308aa3c62ae3bedae2658612762ffb91Dmitry Petrochenko offset += GetInstructionSetPointerSize(cu_->instruction_set); 758efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 759efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 760efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 761efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 762c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovvoid X86Mir2Lir::SpillFPRegs() { 763c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov if (num_fp_spills_ == 0) { 764c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov return; 765c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 766c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov uint32_t mask = fp_spill_mask_; 767b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers int offset = frame_size_ - 768b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers (GetInstructionSetPointerSize(cu_->instruction_set) * (num_fp_spills_ + num_core_spills_)); 769b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32; 770c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov for (int reg = 0; mask; mask >>= 1, reg++) { 771c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov if (mask & 0x1) { 772b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers StoreBaseDisp(rs_rSP, offset, RegStorage::FloatSolo64(reg), k64, kNotVolatile); 773c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov offset += sizeof(double); 774c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 775c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 776c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov} 777c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkovvoid X86Mir2Lir::UnSpillFPRegs() { 778c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov if (num_fp_spills_ == 0) { 779c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov return; 780c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 781c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov uint32_t mask = fp_spill_mask_; 782b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers int offset = frame_size_ - 783b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers (GetInstructionSetPointerSize(cu_->instruction_set) * (num_fp_spills_ + num_core_spills_)); 784b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers const RegStorage rs_rSP = cu_->target64 ? rs_rX86_SP_64 : rs_rX86_SP_32; 785c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov for (int reg = 0; mask; mask >>= 1, reg++) { 786c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov if (mask & 0x1) { 787b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers LoadBaseDisp(rs_rSP, offset, RegStorage::FloatSolo64(reg), 788c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov k64, kNotVolatile); 789c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov offset += sizeof(double); 790c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 791c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov } 792c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov} 793c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 794c380191f3048db2a3796d65db8e5d5a5e7b08c65Serguei Katkov 7952ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstrombool X86Mir2Lir::IsUnconditionalBranch(LIR* lir) { 796cbd6d44c0a94f3d26671b5325aa21bbf1335ffe8buzbee return (lir->opcode == kX86Jmp8 || lir->opcode == kX86Jmp32); 797efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 798efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 799674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir MarkoRegisterClass X86Mir2Lir::RegClassForFieldLoadStore(OpSize size, bool is_volatile) { 800ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell // Prefer XMM registers. Fixes a problem with iget/iput to a FP when cached temporary 801ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell // with same VR is a Core register. 802ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell if (size == kSingle || size == kDouble) { 803ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell return kFPReg; 804ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell } 805ca5413403192022d734ce76fda9a84aa63eb9148Mark Mendell 806e0ccdc0dd166136cd43e5f54201179a4496d33e8Chao-ying Fu // X86_64 can handle any size. 807dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina if (cu_->target64) { 80806839f868c9c4bb1f2f6333f9e88a560e80bcad8Chao-ying Fu return RegClassBySize(size); 809e0ccdc0dd166136cd43e5f54201179a4496d33e8Chao-ying Fu } 810e0ccdc0dd166136cd43e5f54201179a4496d33e8Chao-ying Fu 811674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko if (UNLIKELY(is_volatile)) { 812674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko // On x86, atomic 64-bit load/store requires an fp register. 813674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko // Smaller aligned load/store is atomic for both core and fp registers. 814674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko if (size == k64 || size == kDouble) { 815674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko return kFPReg; 816674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko } 817674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko } 818674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko return RegClassBySize(size); 819674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko} 820674744e635ddbdfb311fbd25b5a27356560d30c3Vladimir Marko 821dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena SayapinaX86Mir2Lir::X86Mir2Lir(CompilationUnit* cu, MIRGraph* mir_graph, ArenaAllocator* arena) 82255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell : Mir2Lir(cu, mir_graph, arena), 823717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov in_to_reg_storage_x86_64_mapper_(this), in_to_reg_storage_x86_mapper_(this), 824dd7624d2b9e599d57762d12031b10b89defc9807Ian Rogers base_of_code_(nullptr), store_method_addr_(false), store_method_addr_used_(false), 825e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko method_address_insns_(arena->Adapter()), 826e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko class_type_address_insns_(arena->Adapter()), 827e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko call_method_insns_(arena->Adapter()), 828dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina stack_decrement_(nullptr), stack_increment_(nullptr), 829d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell const_vectors_(nullptr) { 830e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko method_address_insns_.reserve(100); 831e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko class_type_address_insns_.reserve(100); 832e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko call_method_insns_.reserve(100); 833d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell store_method_addr_used_ = false; 834dd7624d2b9e599d57762d12031b10b89defc9807Ian Rogers for (int i = 0; i < kX86Last; i++) { 8356a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers DCHECK_EQ(X86Mir2Lir::EncodingMap[i].opcode, i) 8366a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers << "Encoding order for " << X86Mir2Lir::EncodingMap[i].name 8376a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers << " is wrong: expecting " << i << ", seeing " 8386a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers << static_cast<int>(X86Mir2Lir::EncodingMap[i].opcode); 839efc6369224b036a1fb77849f7ae65b3492c832c0buzbee } 8401fd3346740dfb7f47be9922312b68a4227fada96buzbee} 8411fd3346740dfb7f47be9922312b68a4227fada96buzbee 842862a76027076c341c26aa6cd4a30a7cdd6dc2143buzbeeMir2Lir* X86CodeGenerator(CompilationUnit* const cu, MIRGraph* const mir_graph, 843862a76027076c341c26aa6cd4a30a7cdd6dc2143buzbee ArenaAllocator* const arena) { 844dd64450b37776f68b9bfc47f8d9a88bc72c95727Elena Sayapina return new X86Mir2Lir(cu, mir_graph, arena); 845efc6369224b036a1fb77849f7ae65b3492c832c0buzbee} 846efc6369224b036a1fb77849f7ae65b3492c832c0buzbee 847984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe// Not used in x86(-64) 848984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas GampeRegStorage X86Mir2Lir::LoadHelper(QuickEntrypointEnum trampoline) { 8496a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNUSED(trampoline); 8502f244e9faccfcca68af3c5484c397a01a1c3a342Andreas Gampe LOG(FATAL) << "Unexpected use of LoadHelper in x86"; 8516a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNREACHABLE(); 8522f244e9faccfcca68af3c5484c397a01a1c3a342Andreas Gampe} 8532f244e9faccfcca68af3c5484c397a01a1c3a342Andreas Gampe 854b373e091eac39b1a79c11f2dcbd610af01e9e8a9Dave AllisonLIR* X86Mir2Lir::CheckSuspendUsingLoad() { 85569dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison // First load the pointer in fs:[suspend-trigger] into eax 85669dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison // Then use a test instruction to indirect via that address. 857dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison if (cu_->target64) { 858dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison NewLIR2(kX86Mov64RT, rs_rAX.GetReg(), 859dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison Thread::ThreadSuspendTriggerOffset<8>().Int32Value()); 860dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison } else { 861dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison NewLIR2(kX86Mov32RT, rs_rAX.GetReg(), 862dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison Thread::ThreadSuspendTriggerOffset<4>().Int32Value()); 863dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison } 86469dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison return NewLIR3(kX86Test32RM, rs_rAX.GetReg(), rs_rAX.GetReg(), 0); 865b373e091eac39b1a79c11f2dcbd610af01e9e8a9Dave Allison} 866b373e091eac39b1a79c11f2dcbd610af01e9e8a9Dave Allison 8672ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromuint64_t X86Mir2Lir::GetTargetInstFlags(int opcode) { 868409fe94ad529d9334587be80b9f6a3d166805508buzbee DCHECK(!IsPseudoLirOp(opcode)); 8691fd3346740dfb7f47be9922312b68a4227fada96buzbee return X86Mir2Lir::EncodingMap[opcode].flags; 8701bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee} 8711bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee 8722ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromconst char* X86Mir2Lir::GetTargetInstName(int opcode) { 873409fe94ad529d9334587be80b9f6a3d166805508buzbee DCHECK(!IsPseudoLirOp(opcode)); 8741fd3346740dfb7f47be9922312b68a4227fada96buzbee return X86Mir2Lir::EncodingMap[opcode].name; 8751bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee} 8761bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee 8772ce745c06271d5223d57dbf08117b20d5b60694aBrian Carlstromconst char* X86Mir2Lir::GetTargetInstFmt(int opcode) { 878409fe94ad529d9334587be80b9f6a3d166805508buzbee DCHECK(!IsPseudoLirOp(opcode)); 8791fd3346740dfb7f47be9922312b68a4227fada96buzbee return X86Mir2Lir::EncodingMap[opcode].fmt; 8801bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee} 8811bc37c60da71c923ea9a2e99d31ba1b3d76d79a8buzbee 882d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbeevoid X86Mir2Lir::GenConstWide(RegLocation rl_dest, int64_t value) { 883d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee // Can we do this directly to memory? 884d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee rl_dest = UpdateLocWide(rl_dest); 885d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee if ((rl_dest.location == kLocDalvikFrame) || 886d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee (rl_dest.location == kLocCompilerTemp)) { 887d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee int32_t val_lo = Low32Bits(value); 888d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee int32_t val_hi = High32Bits(value); 889b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers int r_base = rs_rX86_SP_32.GetReg(); 890d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee int displacement = SRegOffset(rl_dest.s_reg_low); 891d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee 8928dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 8932700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LIR * store = NewLIR3(kX86Mov32MI, r_base, displacement + LOWORD_OFFSET, val_lo); 894d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee AnnotateDalvikRegAccess(store, (displacement + LOWORD_OFFSET) >> 2, 895d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee false /* is_load */, true /* is64bit */); 8962700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee store = NewLIR3(kX86Mov32MI, r_base, displacement + HIWORD_OFFSET, val_hi); 897d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee AnnotateDalvikRegAccess(store, (displacement + HIWORD_OFFSET) >> 2, 898d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee false /* is_load */, true /* is64bit */); 899d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee return; 900d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee } 901d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee 902d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee // Just use the standard code to do the generation. 903d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee Mir2Lir::GenConstWide(rl_dest, value); 904d61ba4ba6fcde666adb5d5c81b1c32f0534fb2c8Bill Buzbee} 905e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell 906e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell// TODO: Merge with existing RegLocation dumper in vreg_analysis.cc 907e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendellvoid X86Mir2Lir::DumpRegLocation(RegLocation loc) { 908e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell LOG(INFO) << "location: " << loc.location << ',' 909e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.wide ? " w" : " ") 910e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.defined ? " D" : " ") 911e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.is_const ? " c" : " ") 912e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.fp ? " F" : " ") 913e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.core ? " C" : " ") 914e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.ref ? " r" : " ") 915e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.high_word ? " h" : " ") 916e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << (loc.home ? " H" : " ") 9172700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee << ", low: " << static_cast<int>(loc.reg.GetLowReg()) 91800e1ec6581b5b7b46ca4c314c2854e9caa647dd2Bill Buzbee << ", high: " << static_cast<int>(loc.reg.GetHighReg()) 919e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << ", s_reg: " << loc.s_reg_low 920e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell << ", orig: " << loc.orig_sreg; 921e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell} 922e02d48fb24747f90fd893e1c3572bb3c500afcedMark Mendell 92367c39c4aefca23cb136157b889c09ee200b3dec6Mark Mendellvoid X86Mir2Lir::Materialize() { 92467c39c4aefca23cb136157b889c09ee200b3dec6Mark Mendell // A good place to put the analysis before starting. 92567c39c4aefca23cb136157b889c09ee200b3dec6Mark Mendell AnalyzeMIR(); 92667c39c4aefca23cb136157b889c09ee200b3dec6Mark Mendell 92767c39c4aefca23cb136157b889c09ee200b3dec6Mark Mendell // Now continue with regular code generation. 92867c39c4aefca23cb136157b889c09ee200b3dec6Mark Mendell Mir2Lir::Materialize(); 92967c39c4aefca23cb136157b889c09ee200b3dec6Mark Mendell} 93067c39c4aefca23cb136157b889c09ee200b3dec6Mark Mendell 93149161cef10a308aedada18e9aa742498d6e6c8c7Jeff Haovoid X86Mir2Lir::LoadMethodAddress(const MethodReference& target_method, InvokeType type, 93255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell SpecialTargetRegister symbolic_reg) { 93355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell /* 93455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * For x86, just generate a 32 bit move immediate instruction, that will be filled 93555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * in at 'link time'. For now, put a unique value based on target to ensure that 93655d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * code deduplication works. 93755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell */ 93849161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao int target_method_idx = target_method.dex_method_index; 93949161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao const DexFile* target_dex_file = target_method.dex_file; 94049161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao const DexFile::MethodId& target_method_id = target_dex_file->GetMethodId(target_method_idx); 94149161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao uintptr_t target_method_id_ptr = reinterpret_cast<uintptr_t>(&target_method_id); 94255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 94349161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao // Generate the move instruction with the unique pointer and save index, dex_file, and type. 944ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe LIR *move = RawLIR(current_dalvik_offset_, kX86Mov32RI, 945ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe TargetReg(symbolic_reg, kNotWide).GetReg(), 94649161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao static_cast<int>(target_method_id_ptr), target_method_idx, 94749161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao WrapPointer(const_cast<DexFile*>(target_dex_file)), type); 94855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell AppendLIR(move); 949e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko method_address_insns_.push_back(move); 95055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell} 95155d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 952e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shihvoid X86Mir2Lir::LoadClassType(const DexFile& dex_file, uint32_t type_idx, 953e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih SpecialTargetRegister symbolic_reg) { 95455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell /* 95555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * For x86, just generate a 32 bit move immediate instruction, that will be filled 95655d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * in at 'link time'. For now, put a unique value based on target to ensure that 95755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * code deduplication works. 95855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell */ 959e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih const DexFile::TypeId& id = dex_file.GetTypeId(type_idx); 96055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell uintptr_t ptr = reinterpret_cast<uintptr_t>(&id); 96155d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 96255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // Generate the move instruction with the unique pointer and save index and type. 963ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe LIR *move = RawLIR(current_dalvik_offset_, kX86Mov32RI, 964ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe TargetReg(symbolic_reg, kNotWide).GetReg(), 965e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih static_cast<int>(ptr), type_idx, 966e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih WrapPointer(const_cast<DexFile*>(&dex_file))); 96755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell AppendLIR(move); 968e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko class_type_address_insns_.push_back(move); 96955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell} 97055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 971f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir MarkoLIR* X86Mir2Lir::CallWithLinkerFixup(const MethodReference& target_method, InvokeType type) { 97255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell /* 97355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell * For x86, just generate a 32 bit call relative instruction, that will be filled 974f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko * in at 'link time'. 97555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell */ 97649161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao int target_method_idx = target_method.dex_method_index; 97749161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao const DexFile* target_dex_file = target_method.dex_file; 97849161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao 97949161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao // Generate the call instruction with the unique pointer and save index, dex_file, and type. 980f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko // NOTE: Method deduplication takes linker patches into account, so we can just pass 0 981f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko // as a placeholder for the offset. 982f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko LIR* call = RawLIR(current_dalvik_offset_, kX86CallI, 0, 98349161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao target_method_idx, WrapPointer(const_cast<DexFile*>(target_dex_file)), type); 98455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell AppendLIR(call); 985e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko call_method_insns_.push_back(call); 98655d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell return call; 98755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell} 98855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 989f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Markostatic LIR* GenInvokeNoInlineCall(Mir2Lir* mir_to_lir, InvokeType type) { 990f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko QuickEntrypointEnum trampoline; 991f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko switch (type) { 992f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kInterface: 993f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeInterfaceTrampolineWithAccessCheck; 994f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 995f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kDirect: 996f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeDirectTrampolineWithAccessCheck; 997f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 998f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kStatic: 999f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeStaticTrampolineWithAccessCheck; 1000f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 1001f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kSuper: 1002f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeSuperTrampolineWithAccessCheck; 1003f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 1004f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko case kVirtual: 1005f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeVirtualTrampolineWithAccessCheck; 1006f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko break; 1007f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko default: 1008f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko LOG(FATAL) << "Unexpected invoke type"; 1009f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko trampoline = kQuickInvokeInterfaceTrampolineWithAccessCheck; 1010f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } 1011f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko return mir_to_lir->InvokeTrampoline(kOpBlx, RegStorage::InvalidReg(), trampoline); 1012f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko} 1013f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko 1014f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir MarkoLIR* X86Mir2Lir::GenCallInsn(const MirMethodLoweringInfo& method_info) { 1015f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko LIR* call_insn; 1016f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko if (method_info.FastPath()) { 1017f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko if (method_info.DirectCode() == static_cast<uintptr_t>(-1)) { 1018f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko // We can have the linker fixup a call relative. 1019f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko call_insn = CallWithLinkerFixup(method_info.GetTargetMethod(), method_info.GetSharpType()); 1020f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } else { 1021f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko call_insn = OpMem(kOpBlx, TargetReg(kArg0, kRef), 10222d7210188805292e463be4bcf7a133b654d7e0eaMathieu Chartier mirror::ArtMethod::EntryPointFromQuickCompiledCodeOffset( 10232d7210188805292e463be4bcf7a133b654d7e0eaMathieu Chartier cu_->target64 ? 8 : 4).Int32Value()); 1024f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } 1025f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } else { 1026f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko call_insn = GenInvokeNoInlineCall(this, method_info.GetSharpType()); 1027f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko } 1028f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko return call_insn; 1029f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko} 1030f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko 103155d0eac918321e0525f6e6491f36a80977e0d416Mark Mendellvoid X86Mir2Lir::InstallLiteralPools() { 103255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // These are handled differently for x86. 103355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK(code_literal_list_ == nullptr); 103455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK(method_literal_list_ == nullptr); 103555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK(class_literal_list_ == nullptr); 103655d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 1037d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 1038b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (const_vectors_ != nullptr) { 1039b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Vector literals must be 16-byte aligned. The header that is placed 1040b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // in the code section causes misalignment so we take it into account. 1041b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Otherwise, we are sure that for x86 method is aligned to 16. 1042b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A DCHECK_EQ(GetInstructionSetAlignment(cu_->instruction_set), 16u); 1043b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A uint32_t bytes_to_fill = (0x10 - ((code_buffer_.size() + sizeof(OatQuickMethodHeader)) & 0xF)) & 0xF; 1044b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A while (bytes_to_fill > 0) { 1045d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell code_buffer_.push_back(0); 1046b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A bytes_to_fill--; 1047d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1048b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1049d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell for (LIR *p = const_vectors_; p != nullptr; p = p->next) { 1050547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen PushWord(&code_buffer_, p->operands[0]); 1051547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen PushWord(&code_buffer_, p->operands[1]); 1052547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen PushWord(&code_buffer_, p->operands[2]); 1053547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen PushWord(&code_buffer_, p->operands[3]); 1054d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1055d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1056d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 105755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // Handle the fixups for methods. 1058e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (LIR* p : method_address_insns_) { 105955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK_EQ(p->opcode, kX86Mov32RI); 106049161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao uint32_t target_method_idx = p->operands[2]; 106149161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao const DexFile* target_dex_file = 106249161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao reinterpret_cast<const DexFile*>(UnwrapPointer(p->operands[3])); 106355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 106455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // The offset to patch is the last 4 bytes of the instruction. 106555d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell int patch_offset = p->offset + p->flags.size - 4; 1066f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko patches_.push_back(LinkerPatch::MethodPatch(patch_offset, 1067f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko target_dex_file, target_method_idx)); 106855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell } 106955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 107055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // Handle the fixups for class types. 1071e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (LIR* p : class_type_address_insns_) { 107255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK_EQ(p->opcode, kX86Mov32RI); 1073e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih 1074e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih const DexFile* class_dex_file = 1075e7f82e2515f47f3c3292281312d7031a34a58ffcFred Shih reinterpret_cast<const DexFile*>(UnwrapPointer(p->operands[3])); 1076f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko uint32_t target_type_idx = p->operands[2]; 107755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 107855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // The offset to patch is the last 4 bytes of the instruction. 107955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell int patch_offset = p->offset + p->flags.size - 4; 1080f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko patches_.push_back(LinkerPatch::TypePatch(patch_offset, 1081f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko class_dex_file, target_type_idx)); 108255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell } 108355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 108455d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // And now the PC-relative calls to methods. 1085f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko patches_.reserve(call_method_insns_.size()); 1086e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko for (LIR* p : call_method_insns_) { 108755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell DCHECK_EQ(p->opcode, kX86CallI); 108849161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao uint32_t target_method_idx = p->operands[1]; 108949161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao const DexFile* target_dex_file = 109049161cef10a308aedada18e9aa742498d6e6c8c7Jeff Hao reinterpret_cast<const DexFile*>(UnwrapPointer(p->operands[2])); 109155d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 109255d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // The offset to patch is the last 4 bytes of the instruction. 109355d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell int patch_offset = p->offset + p->flags.size - 4; 1094f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko patches_.push_back(LinkerPatch::RelativeCodePatch(patch_offset, 1095f4da675bbc4615c5f854c81964cac9dd1153baeaVladimir Marko target_dex_file, target_method_idx)); 109655d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell } 109755d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 109855d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell // And do the normal processing. 109955d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell Mir2Lir::InstallLiteralPools(); 110055d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell} 110155d0eac918321e0525f6e6491f36a80977e0d416Mark Mendell 110270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolovbool X86Mir2Lir::GenInlinedArrayCopyCharArray(CallInfo* info) { 110370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_src = info->args[0]; 110470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_srcPos = info->args[1]; 110570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_dst = info->args[2]; 110670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_dstPos = info->args[3]; 110770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov RegLocation rl_length = info->args[4]; 110870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (rl_srcPos.is_const && (mir_graph_->ConstantValue(rl_srcPos) < 0)) { 110970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov return false; 111070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 111170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (rl_dstPos.is_const && (mir_graph_->ConstantValue(rl_dstPos) < 0)) { 111270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov return false; 111370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 111470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov ClobberCallerSave(); 11155a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LockCallTemps(); // Using fixed registers. 11165a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov RegStorage tmp_reg = cu_->target64 ? rs_r11 : rs_rBX; 11175a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_src, rs_rAX); 11185a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_dst, rs_rCX); 11195a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* src_dst_same = OpCmpBranch(kCondEq, rs_rAX, rs_rCX, nullptr); 11205a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* src_null_branch = OpCmpImmBranch(kCondEq, rs_rAX, 0, nullptr); 11215a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* dst_null_branch = OpCmpImmBranch(kCondEq, rs_rCX, 0, nullptr); 11225a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_length, rs_rDX); 11235a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // If the length of the copy is > 128 characters (256 bytes) or negative then go slow path. 11245a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* len_too_big = OpCmpImmBranch(kCondHi, rs_rDX, 128, nullptr); 11255a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_src, rs_rAX); 11265a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadWordDisp(rs_rAX, mirror::Array::LengthOffset().Int32Value(), rs_rAX); 112770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* src_bad_len = nullptr; 1128f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate LIR* src_bad_off = nullptr; 112970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* srcPos_negative = nullptr; 113070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (!rl_srcPos.is_const) { 11315a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_srcPos, tmp_reg); 11325a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov srcPos_negative = OpCmpImmBranch(kCondLt, tmp_reg, 0, nullptr); 1133f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // src_pos < src_len 1134f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_off = OpCmpBranch(kCondLt, rs_rAX, tmp_reg, nullptr); 1135f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // src_len - src_pos < copy_len 1136f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate OpRegRegReg(kOpSub, tmp_reg, rs_rAX, tmp_reg); 1137f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_len = OpCmpBranch(kCondLt, tmp_reg, rs_rDX, nullptr); 113870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } else { 11395a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov int32_t pos_val = mir_graph_->ConstantValue(rl_srcPos.orig_sreg); 114070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (pos_val == 0) { 11415a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov src_bad_len = OpCmpBranch(kCondLt, rs_rAX, rs_rDX, nullptr); 114270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } else { 1143f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // src_pos < src_len 1144f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_off = OpCmpImmBranch(kCondLt, rs_rAX, pos_val, nullptr); 1145f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // src_len - src_pos < copy_len 1146f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate OpRegRegImm(kOpSub, tmp_reg, rs_rAX, pos_val); 1147f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_len = OpCmpBranch(kCondLt, tmp_reg, rs_rDX, nullptr); 114870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 114970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 115070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* dstPos_negative = nullptr; 115170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* dst_bad_len = nullptr; 1152f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate LIR* dst_bad_off = nullptr; 115370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LoadValueDirectFixed(rl_dst, rs_rAX); 115470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LoadWordDisp(rs_rAX, mirror::Array::LengthOffset().Int32Value(), rs_rAX); 115570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (!rl_dstPos.is_const) { 11565a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_dstPos, tmp_reg); 11575a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov dstPos_negative = OpCmpImmBranch(kCondLt, tmp_reg, 0, nullptr); 1158f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // dst_pos < dst_len 1159f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_off = OpCmpBranch(kCondLt, rs_rAX, tmp_reg, nullptr); 1160f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // dst_len - dst_pos < copy_len 1161f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate OpRegRegReg(kOpSub, tmp_reg, rs_rAX, tmp_reg); 1162f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_len = OpCmpBranch(kCondLt, tmp_reg, rs_rDX, nullptr); 116370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } else { 11645a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov int32_t pos_val = mir_graph_->ConstantValue(rl_dstPos.orig_sreg); 116570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (pos_val == 0) { 11665a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov dst_bad_len = OpCmpBranch(kCondLt, rs_rAX, rs_rDX, nullptr); 116770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } else { 1168f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // dst_pos < dst_len 1169f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_off = OpCmpImmBranch(kCondLt, rs_rAX, pos_val, nullptr); 1170f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate // dst_len - dst_pos < copy_len 1171f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate OpRegRegImm(kOpSub, tmp_reg, rs_rAX, pos_val); 1172f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_len = OpCmpBranch(kCondLt, tmp_reg, rs_rDX, nullptr); 117370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 117470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov } 11755a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // Everything is checked now. 11765a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_src, rs_rAX); 11775a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_dst, tmp_reg); 11785a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_srcPos, rs_rCX); 117970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov NewLIR5(kX86Lea32RA, rs_rAX.GetReg(), rs_rAX.GetReg(), 11805a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov rs_rCX.GetReg(), 1, mirror::Array::DataOffset(2).Int32Value()); 11815a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // RAX now holds the address of the first src element to be copied. 118270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 11835a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_dstPos, rs_rCX); 11845a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov NewLIR5(kX86Lea32RA, tmp_reg.GetReg(), tmp_reg.GetReg(), 11855a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov rs_rCX.GetReg(), 1, mirror::Array::DataOffset(2).Int32Value() ); 11865a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // RBX now holds the address of the first dst element to be copied. 118770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 11885a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // Check if the number of elements to be copied is odd or even. If odd 118970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov // then copy the first element (so that the remaining number of elements 119070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov // is even). 11915a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LoadValueDirectFixed(rl_length, rs_rCX); 119270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov OpRegImm(kOpAnd, rs_rCX, 1); 119370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* jmp_to_begin_loop = OpCmpImmBranch(kCondEq, rs_rCX, 0, nullptr); 119470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov OpRegImm(kOpSub, rs_rDX, 1); 119570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LoadBaseIndexedDisp(rs_rAX, rs_rDX, 1, 0, rs_rCX, kSignedHalf); 11965a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov StoreBaseIndexedDisp(tmp_reg, rs_rDX, 1, 0, rs_rCX, kSignedHalf); 119770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 11985a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov // Since the remaining number of elements is even, we will copy by 119970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov // two elements at a time. 12005a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* beginLoop = NewLIR0(kPseudoTargetLabel); 12015a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov LIR* jmp_to_ret = OpCmpImmBranch(kCondEq, rs_rDX, 0, nullptr); 120270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov OpRegImm(kOpSub, rs_rDX, 2); 120370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LoadBaseIndexedDisp(rs_rAX, rs_rDX, 1, 0, rs_rCX, kSingle); 12045a5e85693b1d5952d88377be5826068b67b0dcecDaniilSokolov StoreBaseIndexedDisp(tmp_reg, rs_rDX, 1, 0, rs_rCX, kSingle); 120570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov OpUnconditionalBranch(beginLoop); 120670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR *check_failed = NewLIR0(kPseudoTargetLabel); 120770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR* launchpad_branch = OpUnconditionalBranch(nullptr); 120870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov LIR *return_point = NewLIR0(kPseudoTargetLabel); 120970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov jmp_to_ret->target = return_point; 121070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov jmp_to_begin_loop->target = beginLoop; 121170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov src_dst_same->target = check_failed; 121270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov len_too_big->target = check_failed; 121370c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov src_null_branch->target = check_failed; 121470c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (srcPos_negative != nullptr) 121570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov srcPos_negative ->target = check_failed; 1216f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate if (src_bad_off != nullptr) 1217f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate src_bad_off->target = check_failed; 121870c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (src_bad_len != nullptr) 121970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov src_bad_len->target = check_failed; 122070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov dst_null_branch->target = check_failed; 122170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (dstPos_negative != nullptr) 122270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov dstPos_negative->target = check_failed; 1223f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate if (dst_bad_off != nullptr) 1224f9f0ed401f7fe4138a71b36719423b908a3b7bfbavignate dst_bad_off->target = check_failed; 122570c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov if (dst_bad_len != nullptr) 122670c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov dst_bad_len->target = check_failed; 122770c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov AddIntrinsicSlowPath(info, launchpad_branch, return_point); 12289863daf4fdc1a08339edac794452dbc719aef4f1Serguei Katkov ClobberCallerSave(); // We must clobber everything because slow path will return here 122970c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov return true; 123070c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov} 123170c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 123270c4f06f9965cdb9319a2c85f65acda20086d765DaniilSokolov 12334028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell/* 12344028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell * Fast string.index_of(I) & (II). Inline check for simple case of char <= 0xffff, 12354028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell * otherwise bails to standard library code. 12364028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell */ 12374028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendellbool X86Mir2Lir::GenInlinedIndexOf(CallInfo* info, bool zero_based) { 12384028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell RegLocation rl_obj = info->args[0]; 12394028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell RegLocation rl_char = info->args[1]; 1240a44d4f508fa1642294e79d3ebecd790afe75ea60buzbee RegLocation rl_start; // Note: only present in III flavor or IndexOf. 12418bd698fb785b58302be684efcbb24a0b8c6535d7nikolay serdjuk // RBX is promotable in 64-bit mode. 1242c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk RegStorage rs_tmp = cu_->target64 ? rs_r11 : rs_rBX; 1243c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk int start_value = -1; 12444028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 12454028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell uint32_t char_value = 12464028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell rl_char.is_const ? mir_graph_->ConstantValue(rl_char.orig_sreg) : 0; 12474028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 12484028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (char_value > 0xFFFF) { 12494028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // We have to punt to the real String.indexOf. 12504028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell return false; 12514028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 12524028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 12534028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Okay, we are commited to inlining this. 1254c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // EAX: 16 bit character being searched. 1255c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // ECX: count: number of words to be searched. 1256c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // EDI: String being searched. 1257c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // EDX: temporary during execution. 1258c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // EBX or R11: temporary during execution (depending on mode). 1259c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // REP SCASW: search instruction. 1260c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 12618bd698fb785b58302be684efcbb24a0b8c6535d7nikolay serdjuk FlushAllRegs(); 1262c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1263a0cd2d701f29e0bc6275f1b13c0edfd4ec391879buzbee RegLocation rl_return = GetReturn(kCoreReg); 12644028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell RegLocation rl_dest = InlineTarget(info); 12654028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 12664028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Is the string non-NULL? 12672700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LoadValueDirectFixed(rl_obj, rs_rDX); 12682700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee GenNullCheck(rs_rDX, info->opt_flags); 12693bc8615332b7848dec8c2297a40f7e4d176c0efbVladimir Marko info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've null checked. 12704028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 1271c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk LIR *slowpath_branch = nullptr, *length_compare = nullptr; 1272c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1273c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // We need the value in EAX. 12744028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (rl_char.is_const) { 12752700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LoadConstantNoClobber(rs_rAX, char_value); 12764028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } else { 1277c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Does the character fit in 16 bits? Compare it at runtime. 12782700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LoadValueDirectFixed(rl_char, rs_rAX); 12793a74d15ccc9a902874473ac9632e568b19b91b1cMingyao Yang slowpath_branch = OpCmpImmBranch(kCondGt, rs_rAX, 0xFFFF, nullptr); 12804028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 12814028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 12824028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // From here down, we know that we are looking for a char that fits in 16 bits. 1283e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell // Location of reference to data array within the String object. 1284e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell int value_offset = mirror::String::ValueOffset().Int32Value(); 1285e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell // Location of count within the String object. 1286e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell int count_offset = mirror::String::CountOffset().Int32Value(); 1287e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell // Starting offset within data array. 1288e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell int offset_offset = mirror::String::OffsetOffset().Int32Value(); 1289e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell // Start of char data with array_. 1290e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell int data_offset = mirror::Array::DataOffset(sizeof(uint16_t)).Int32Value(); 12914028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 129269dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison // Compute the number of words to search in to rCX. 129369dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison Load32Disp(rs_rDX, count_offset, rs_rCX); 129469dfe51b684dd9d510dbcb63295fe180f998efdeDave Allison 1295dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // Possible signal here due to null pointer dereference. 1296dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // Note that the signal handler will expect the top word of 1297dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // the stack to be the ArtMethod*. If the PUSH edi instruction 1298dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // below is ahead of the load above then this will not be true 1299dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison // and the signal handler will not work. 1300dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison MarkPossibleNullPointerException(0); 1301c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1302dfd3b47813c14c5f1607cbe7b10a28b1b2f29cbcDave Allison if (!cu_->target64) { 13038bd698fb785b58302be684efcbb24a0b8c6535d7nikolay serdjuk // EDI is promotable in 32-bit mode. 1304c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk NewLIR1(kX86Push32R, rs_rDI.GetReg()); 1305c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk } 13064028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13074028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (zero_based) { 1308c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Start index is not present. 13094028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // We have to handle an empty string. Use special instruction JECXZ. 13104028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell length_compare = NewLIR0(kX86Jecxz8); 1311c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1312c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Copy the number of words to search in a temporary register. 1313c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // We will use the register at the end to calculate result. 1314c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpMov, rs_tmp, rs_rCX); 13154028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } else { 1316c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Start index is present. 1317a44d4f508fa1642294e79d3ebecd790afe75ea60buzbee rl_start = info->args[2]; 1318c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 13194028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // We have to offset by the start index. 13204028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (rl_start.is_const) { 13214028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell start_value = mir_graph_->ConstantValue(rl_start.orig_sreg); 13224028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell start_value = std::max(start_value, 0); 13234028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13244028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Is the start > count? 13252700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee length_compare = OpCmpImmBranch(kCondLe, rs_rCX, start_value, nullptr); 1326c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegImm(kOpMov, rs_rDI, start_value); 1327c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1328c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Copy the number of words to search in a temporary register. 1329c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // We will use the register at the end to calculate result. 1330c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpMov, rs_tmp, rs_rCX); 13314028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13324028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell if (start_value != 0) { 1333c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Decrease the number of words to search by the start index. 13342700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee OpRegImm(kOpSub, rs_rCX, start_value); 13354028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 13364028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } else { 1337c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Handle "start index < 0" case. 1338c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk if (!cu_->target64 && rl_start.location != kLocPhysReg) { 1339a1758d83e298c9ee31848bcae07c2a35f6efd618Alexei Zavjalov // Load the start index from stack, remembering that we pushed EDI. 1340c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk int displacement = SRegOffset(rl_start.s_reg_low) + sizeof(uint32_t); 134174de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 1342b28c1c06236751aa5c9e64dcb68b3c940341e496Ian Rogers Load32Disp(rs_rX86_SP_32, displacement, rs_rDI); 134374de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko // Dalvik register annotation in LoadBaseIndexedDisp() used wrong offset. Fix it. 134474de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko DCHECK(!DECODE_ALIAS_INFO_WIDE(last_lir_insn_->flags.alias_info)); 134574de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko int reg_id = DECODE_ALIAS_INFO_REG(last_lir_insn_->flags.alias_info) - 1; 134674de63bb1cc275b411cae28a96f9b3a78b939bc2Vladimir Marko AnnotateDalvikRegAccess(last_lir_insn_, reg_id, true, false); 1347c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk } else { 1348c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk LoadValueDirectFixed(rl_start, rs_rDI); 13494028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 1350c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpXor, rs_tmp, rs_tmp); 1351c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpCmp, rs_rDI, rs_tmp); 1352c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpCondRegReg(kOpCmov, kCondLt, rs_rDI, rs_tmp); 1353c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1354c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // The length of the string should be greater than the start index. 1355c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk length_compare = OpCmpBranch(kCondLe, rs_rCX, rs_rDI, nullptr); 1356c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1357c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Copy the number of words to search in a temporary register. 1358c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // We will use the register at the end to calculate result. 1359c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpMov, rs_tmp, rs_rCX); 1360c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1361c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Decrease the number of words to search by the start index. 1362c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpSub, rs_rCX, rs_rDI); 13634028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 13644028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 13654028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 1366c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // Load the address of the string into EDI. 1367c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk // In case of start index we have to add the address to existing value in EDI. 1368e19c91fdb88ff6fd4e88bc5984772dcfb1e86f80Mark Mendell // The string starts at VALUE(String) + 2 * OFFSET(String) + DATA_OFFSET. 1369c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk if (zero_based || (!zero_based && rl_start.is_const && start_value == 0)) { 1370c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk Load32Disp(rs_rDX, offset_offset, rs_rDI); 13714028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } else { 1372c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegMem(kOpAdd, rs_rDI, rs_rDX, offset_offset); 13734028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 1374c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegImm(kOpLsl, rs_rDI, 1); 1375c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegMem(kOpAdd, rs_rDI, rs_rDX, value_offset); 1376c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegImm(kOpAdd, rs_rDI, data_offset); 13774028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13784028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // EDI now contains the start of the string to be searched. 13794028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // We are all prepared to do the search for the character. 13804028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell NewLIR0(kX86RepneScasw); 13814028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13824028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Did we find a match? 13834028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell LIR* failed_branch = OpCondBranch(kCondNe, nullptr); 13844028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13854028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // yes, we matched. Compute the index of the result. 1386c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk OpRegReg(kOpSub, rs_tmp, rs_rCX); 1387c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk NewLIR3(kX86Lea32RM, rl_return.reg.GetReg(), rs_tmp.GetReg(), -1); 1388c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 13894028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell LIR *all_done = NewLIR1(kX86Jmp8, 0); 13904028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13914028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Failed to match; return -1. 13924028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell LIR *not_found = NewLIR0(kPseudoTargetLabel); 13934028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell length_compare->target = not_found; 13944028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell failed_branch->target = not_found; 13952700f7e1edbcd2518f4978e4cd0e05a4149f91b6buzbee LoadConstantNoClobber(rl_return.reg, -1); 13964028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 13974028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // And join up at the end. 13984028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell all_done->target = NewLIR0(kPseudoTargetLabel); 1399c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk 1400c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk if (!cu_->target64) 1401c3561ae381960cbd52a83b7591504f158ec06920nikolay serdjuk NewLIR1(kX86Pop32R, rs_rDI.GetReg()); 14024028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 14034028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell // Out of line code returns here. 14043a74d15ccc9a902874473ac9632e568b19b91b1cMingyao Yang if (slowpath_branch != nullptr) { 14054028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell LIR *return_point = NewLIR0(kPseudoTargetLabel); 14063a74d15ccc9a902874473ac9632e568b19b91b1cMingyao Yang AddIntrinsicSlowPath(info, slowpath_branch, return_point); 14079863daf4fdc1a08339edac794452dbc719aef4f1Serguei Katkov ClobberCallerSave(); // We must clobber everything because slow path will return here 14084028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell } 14094028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 14104028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell StoreValue(rl_dest, rl_return); 14114028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell return true; 14124028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell} 14134028a6c83a339036864999fdfd2855b012a9f1a7Mark Mendell 141435e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shenstatic bool ARTRegIDToDWARFRegID(bool is_x86_64, int art_reg_id, int* dwarf_reg_id) { 141535e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen if (is_x86_64) { 141635e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen switch (art_reg_id) { 1417bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe case 3 : *dwarf_reg_id = 3; return true; // %rbx 141835e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen // This is the only discrepancy between ART & DWARF register numbering. 1419bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe case 5 : *dwarf_reg_id = 6; return true; // %rbp 1420bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe case 12: *dwarf_reg_id = 12; return true; // %r12 1421bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe case 13: *dwarf_reg_id = 13; return true; // %r13 1422bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe case 14: *dwarf_reg_id = 14; return true; // %r14 1423bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe case 15: *dwarf_reg_id = 15; return true; // %r15 1424bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe default: return false; // Should not get here 142535e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen } 142635e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen } else { 142735e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen switch (art_reg_id) { 1428bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe case 5: *dwarf_reg_id = 5; return true; // %ebp 1429bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe case 6: *dwarf_reg_id = 6; return true; // %esi 1430bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe case 7: *dwarf_reg_id = 7; return true; // %edi 1431bda2722ba62e5be9f9fd6a6eb0db8259bb383629Andreas Gampe default: return false; // Should not get here 143235e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen } 1433ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell } 1434ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell} 1435ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 1436547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shenstd::vector<uint8_t>* X86Mir2Lir::ReturnFrameDescriptionEntry() { 1437547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen std::vector<uint8_t>* cfi_info = new std::vector<uint8_t>; 1438ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 1439ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // Generate the FDE for the method. 1440ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell DCHECK_NE(data_offset_, 0U); 1441ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 1442e3ea83811d47152c00abea24a9b420651a33b496Yevgeny Rouban WriteFDEHeader(cfi_info, cu_->target64); 1443e3ea83811d47152c00abea24a9b420651a33b496Yevgeny Rouban WriteFDEAddressRange(cfi_info, data_offset_, cu_->target64); 144435e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen 1445ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // The instructions in the FDE. 1446ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell if (stack_decrement_ != nullptr) { 1447ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // Advance LOC to just past the stack decrement. 1448ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell uint32_t pc = NEXT_LIR(stack_decrement_)->offset; 1449547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen DW_CFA_advance_loc(cfi_info, pc); 1450ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 1451ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // Now update the offset to the call frame: DW_CFA_def_cfa_offset frame_size. 1452547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen DW_CFA_def_cfa_offset(cfi_info, frame_size_); 1453ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 145435e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen // Handle register spills 145535e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen const uint32_t kSpillInstLen = (cu_->target64) ? 5 : 4; 145635e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen const int kDataAlignmentFactor = (cu_->target64) ? -8 : -4; 145735e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen uint32_t mask = core_spill_mask_ & ~(1 << rs_rRET.GetRegNum()); 145835e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen int offset = -(GetInstructionSetPointerSize(cu_->instruction_set) * num_core_spills_); 145935e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen for (int reg = 0; mask; mask >>= 1, reg++) { 146035e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen if (mask & 0x1) { 146135e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen pc += kSpillInstLen; 146235e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen 146335e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen // Advance LOC to pass this instruction 1464547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen DW_CFA_advance_loc(cfi_info, kSpillInstLen); 146535e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen 146635e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen int dwarf_reg_id; 146735e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen if (ARTRegIDToDWARFRegID(cu_->target64, reg, &dwarf_reg_id)) { 1468547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen // DW_CFA_offset_extended_sf reg offset 1469547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen DW_CFA_offset_extended_sf(cfi_info, dwarf_reg_id, offset / kDataAlignmentFactor); 147035e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen } 147135e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen 147235e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen offset += GetInstructionSetPointerSize(cu_->instruction_set); 147335e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen } 147435e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen } 147535e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen 1476ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // We continue with that stack until the epilogue. 1477ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell if (stack_increment_ != nullptr) { 1478ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell uint32_t new_pc = NEXT_LIR(stack_increment_)->offset; 1479547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen DW_CFA_advance_loc(cfi_info, new_pc - pc); 1480ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 1481ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // We probably have code snippets after the epilogue, so save the 1482ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // current state: DW_CFA_remember_state. 1483547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen DW_CFA_remember_state(cfi_info); 1484ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 148535e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen // We have now popped the stack: DW_CFA_def_cfa_offset 4/8. 148635e1e6ad4b50f1adbe9f93fe467766f042491896Tong Shen // There is only the return PC on the stack now. 1487547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen DW_CFA_def_cfa_offset(cfi_info, GetInstructionSetPointerSize(cu_->instruction_set)); 1488ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 1489ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // Everything after that is the same as before the epilogue. 1490ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // Stack bump was followed by RET instruction. 1491ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell LIR *post_ret_insn = NEXT_LIR(NEXT_LIR(stack_increment_)); 1492ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell if (post_ret_insn != nullptr) { 1493ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell pc = new_pc; 1494ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell new_pc = post_ret_insn->offset; 1495547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen DW_CFA_advance_loc(cfi_info, new_pc - pc); 1496ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell // Restore the state: DW_CFA_restore_state. 1497547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen DW_CFA_restore_state(cfi_info); 1498ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell } 1499ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell } 1500ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell } 1501ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 1502547cdfd21ee21e4ab9ca8692d6ef47c62ee7ea52Tong Shen PadCFI(cfi_info); 1503e3ea83811d47152c00abea24a9b420651a33b496Yevgeny Rouban WriteCFILength(cfi_info, cu_->target64); 1504ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 1505ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell return cfi_info; 1506ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell} 1507ae9fd93c39a341e2dffe15c61cc7d9e841fa92c4Mark Mendell 1508d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendellvoid X86Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { 1509d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) { 151060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpReserveVectorRegisters: 151160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji ReserveVectorRegisters(mir); 151260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 151360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpReturnVectorRegisters: 1514b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A ReturnVectorRegisters(mir); 151560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 1516d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell case kMirOpConstVector: 15176a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenConst128(mir); 1518d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell break; 1519fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpMoveVector: 15206a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenMoveVector(mir); 1521fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1522fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedMultiply: 15236a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenMultiplyVector(mir); 1524fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1525fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedAddition: 15266a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenAddVector(mir); 1527fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1528fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedSubtract: 15296a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenSubtractVector(mir); 1530fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1531fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedShiftLeft: 15326a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenShiftLeftVector(mir); 1533fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1534fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedSignedShiftRight: 15356a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenSignedShiftRightVector(mir); 1536fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1537fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedUnsignedShiftRight: 15386a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenUnsignedShiftRightVector(mir); 1539fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1540fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedAnd: 15416a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenAndVector(mir); 1542fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1543fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedOr: 15446a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenOrVector(mir); 1545fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1546fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedXor: 15476a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenXorVector(mir); 1548fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1549fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedAddReduce: 15506a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenAddReduceVector(mir); 1551fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1552fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedReduce: 15536a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenReduceVector(mir); 1554fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1555fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kMirOpPackedSet: 15566a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenSetVector(mir); 1557fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1558b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler case kMirOpMemBarrier: 1559b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler GenMemBarrier(static_cast<MemBarrierKind>(mir->dalvikInsn.vA)); 1560b5bce7cc9f1130ab4932ba8e6917c362bf871f24Jean Christophe Beyler break; 1561b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case kMirOpPackedArrayGet: 1562b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A GenPackedArrayGet(bb, mir); 1563b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 1564b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case kMirOpPackedArrayPut: 1565b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A GenPackedArrayPut(bb, mir); 1566b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 1567d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell default: 1568d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell break; 1569d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1570d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell} 1571d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 157260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjivoid X86Mir2Lir::ReserveVectorRegisters(MIR* mir) { 1573b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A for (uint32_t i = mir->dalvikInsn.vA; i <= mir->dalvikInsn.vB; i++) { 157460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage xp_reg = RegStorage::Solo128(i); 157560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegisterInfo *xp_reg_info = GetRegInfo(xp_reg); 157660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji Clobber(xp_reg); 157760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 157860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji for (RegisterInfo *info = xp_reg_info->GetAliasChain(); 157960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji info != nullptr; 158060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji info = info->GetAliasChain()) { 1581e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko ArenaVector<RegisterInfo*>* regs = 1582e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko info->GetReg().IsSingle() ? ®_pool_->sp_regs_ : ®_pool_->dp_regs_; 1583e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko auto it = std::find(regs->begin(), regs->end(), info); 1584e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko DCHECK(it != regs->end()); 1585e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko regs->erase(it); 158660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 158760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 158860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 158960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 1590b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan Avoid X86Mir2Lir::ReturnVectorRegisters(MIR* mir) { 1591b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A for (uint32_t i = mir->dalvikInsn.vA; i <= mir->dalvikInsn.vB; i++) { 159260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage xp_reg = RegStorage::Solo128(i); 159360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegisterInfo *xp_reg_info = GetRegInfo(xp_reg); 159460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 159560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji for (RegisterInfo *info = xp_reg_info->GetAliasChain(); 159660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji info != nullptr; 159760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji info = info->GetAliasChain()) { 159860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji if (info->GetReg().IsSingle()) { 1599e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reg_pool_->sp_regs_.push_back(info); 160060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } else { 1601e39c54ea575ec710d5e84277fcdcc049f8acb3c9Vladimir Marko reg_pool_->dp_regs_.push_back(info); 160260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 160360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 160460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 160560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 160660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 16076a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenConst128(MIR* mir) { 160860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA); 1609b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest); 1610b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1611d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell uint32_t *args = mir->dalvikInsn.arg; 1612fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int reg = rs_dest.GetReg(); 1613d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell // Check for all 0 case. 1614d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell if (args[0] == 0 && args[1] == 0 && args[2] == 0 && args[3] == 0) { 1615d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell NewLIR2(kX86XorpsRR, reg, reg); 1616d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell return; 1617d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 161860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 161960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Append the mov const vector to reg opcode. 1620b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A AppendOpcodeWithConst(kX86MovdqaRM, reg, mir); 162160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 162260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 162360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjivoid X86Mir2Lir::AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir) { 1624b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // To deal with correct memory ordering, reverse order of constants. 1625b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int32_t constants[4]; 1626b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[3] = mir->dalvikInsn.arg[0]; 1627b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[2] = mir->dalvikInsn.arg[1]; 1628b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[1] = mir->dalvikInsn.arg[2]; 1629b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[0] = mir->dalvikInsn.arg[3]; 1630b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1631b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Search if there is already a constant in pool with this value. 1632b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LIR *data_target = ScanVectorLiteral(constants); 1633d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell if (data_target == nullptr) { 1634b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A data_target = AddVectorLiteral(constants); 1635d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 1636d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 1637d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell // Load the proper value from the literal area. 1638d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell // We don't know the proper offset for the value, so pick one that will force 163927dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell // 4 byte offset. We will fix this up in the assembler later to have the 164027dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell // right value. 164127dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell LIR* load; 16428dea81ca9c0201ceaa88086b927a5838a06a3e69Vladimir Marko ScopedMemRefType mem_ref_type(this, ResourceMask::kLiteral); 164327dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell if (cu_->target64) { 164427dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell load = NewLIR3(opcode, reg, kRIPReg, 256 /* bogus */); 164527dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell } else { 164627dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell // Address the start of the method. 164727dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell RegLocation rl_method = mir_graph_->GetRegLocation(base_of_code_->s_reg_low); 164827dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell if (rl_method.wide) { 164927dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell rl_method = LoadValueWide(rl_method, kCoreReg); 165027dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell } else { 165127dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell rl_method = LoadValue(rl_method, kCoreReg); 165227dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell } 165327dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell 165427dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell load = NewLIR3(opcode, reg, rl_method.reg.GetReg(), 256 /* bogus */); 165527dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell 165627dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell // The literal pool needs position independent logic. 165727dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell store_method_addr_used_ = true; 165827dee8bcd7b4a53840b60818da8d2c819ef199bdMark Mendell } 1659d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell load->flags.fixup = kFixupLoad; 1660d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell load->target = data_target; 1661d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell} 1662d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 16636a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenMoveVector(MIR* mir) { 1664fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // We only support 128 bit registers. 166560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 166660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA); 1667b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest); 166860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src = RegStorage::Solo128(mir->dalvikInsn.vB); 1669b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_dest.GetReg(), rs_src.GetReg()); 1670fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1671fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 1672b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan Avoid X86Mir2Lir::GenMultiplyVectorSignedByte(RegStorage rs_dest_src1, RegStorage rs_src2) { 167360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji /* 167460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * Emulate the behavior of a kSignedByte by separating out the 16 values in the two XMM 167560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * and multiplying 8 at a time before recombining back into one XMM register. 167660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * 167760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * let xmm1, xmm2 be real srcs (keep low bits of 16bit lanes) 167860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm3 is tmp (operate on high bits of 16bit lanes) 167960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * 168060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm3 = xmm1 168160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm1 = xmm1 .* xmm2 168260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm1 = xmm1 & 0x00ff00ff00ff00ff00ff00ff00ff00ff // xmm1 now has low bits 168360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm3 = xmm3 .>> 8 168460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm2 = xmm2 & 0xff00ff00ff00ff00ff00ff00ff00ff00 168560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm2 = xmm2 .* xmm3 // xmm2 now has high bits 168660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji * xmm1 = xmm1 | xmm2 // combine results 168760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji */ 168860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 168960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Copy xmm1. 1690b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_src1_high_tmp = Get128BitRegister(AllocTempDouble()); 1691b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_dest_high_tmp = Get128BitRegister(AllocTempDouble()); 1692b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_src1_high_tmp.GetReg(), rs_src2.GetReg()); 1693b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_dest_high_tmp.GetReg(), rs_dest_src1.GetReg()); 169460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 169560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Multiply low bits. 1696b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // x7 *= x3 169760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji NewLIR2(kX86PmullwRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 169860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 169960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // xmm1 now has low bits. 170060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji AndMaskVectorRegister(rs_dest_src1, 0x00FF00FF, 0x00FF00FF, 0x00FF00FF, 0x00FF00FF); 170160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 170260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Prepare high bits for multiplication. 1703b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlwRI, rs_src1_high_tmp.GetReg(), 0x8); 1704b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A AndMaskVectorRegister(rs_dest_high_tmp, 0xFF00FF00, 0xFF00FF00, 0xFF00FF00, 0xFF00FF00); 170560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 170660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Multiply high bits and xmm2 now has high bits. 1707b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PmullwRR, rs_src1_high_tmp.GetReg(), rs_dest_high_tmp.GetReg()); 170860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 170960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Combine back into dest XMM register. 1710b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PorRR, rs_dest_src1.GetReg(), rs_src1_high_tmp.GetReg()); 1711b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A} 1712b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1713b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan Avoid X86Mir2Lir::GenMultiplyVectorLong(RegStorage rs_dest_src1, RegStorage rs_src2) { 1714b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A /* 1715b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * We need to emulate the packed long multiply. 1716b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * For kMirOpPackedMultiply xmm1, xmm0: 1717b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - xmm1 is src/dest 1718b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - xmm0 is src 1719b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Get xmm2 and xmm3 as temp 1720b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Idea is to multiply the lower 32 of each operand with the higher 32 of the other. 1721b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Then add the two results. 1722b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Move it to the upper 32 of the destination 1723b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * - Then multiply the lower 32-bits of the operands and add the result to the destination. 1724b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1725b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * (op dest src ) 1726b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * movdqa %xmm2, %xmm1 1727b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * movdqa %xmm3, %xmm0 1728b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psrlq %xmm3, $0x20 1729b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm3, %xmm2 1730b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psrlq %xmm1, $0x20 1731b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm1, %xmm0 1732b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * paddq %xmm1, %xmm3 1733b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psllq %xmm1, $0x20 1734b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm2, %xmm0 1735b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * paddq %xmm1, %xmm2 1736b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1737b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * When both the operands are the same, then we need to calculate the lower-32 * higher-32 1738b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * calculation only once. Thus we don't need the xmm3 temp above. That sequence becomes: 1739b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1740b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * (op dest src ) 1741b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * movdqa %xmm2, %xmm1 1742b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psrlq %xmm1, $0x20 1743b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm1, %xmm0 1744b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * paddq %xmm1, %xmm1 1745b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * psllq %xmm1, $0x20 1746b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * pmuludq %xmm2, %xmm0 1747b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * paddq %xmm1, %xmm2 1748b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1749b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A */ 1750b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1751b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A bool both_operands_same = (rs_dest_src1.GetReg() == rs_src2.GetReg()); 1752b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1753b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_tmp_vector_1; 1754b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_tmp_vector_2; 1755b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rs_tmp_vector_1 = Get128BitRegister(AllocTempDouble()); 1756b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_tmp_vector_1.GetReg(), rs_dest_src1.GetReg()); 1757b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1758b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (both_operands_same == false) { 1759b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rs_tmp_vector_2 = Get128BitRegister(AllocTempDouble()); 1760b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_tmp_vector_2.GetReg(), rs_src2.GetReg()); 1761b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlqRI, rs_tmp_vector_2.GetReg(), 0x20); 1762b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PmuludqRR, rs_tmp_vector_2.GetReg(), rs_tmp_vector_1.GetReg()); 1763b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 1764b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1765b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlqRI, rs_dest_src1.GetReg(), 0x20); 1766b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PmuludqRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1767b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1768b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (both_operands_same == false) { 1769b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddqRR, rs_dest_src1.GetReg(), rs_tmp_vector_2.GetReg()); 1770b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 1771b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddqRR, rs_dest_src1.GetReg(), rs_dest_src1.GetReg()); 1772b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 1773b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 1774b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsllqRI, rs_dest_src1.GetReg(), 0x20); 1775b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PmuludqRR, rs_tmp_vector_1.GetReg(), rs_src2.GetReg()); 1776b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddqRR, rs_dest_src1.GetReg(), rs_tmp_vector_1.GetReg()); 177760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 177860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 17796a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenMultiplyVector(MIR* mir) { 178060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 178160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 178260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1783b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 178460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 1785fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1786fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1787fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1788fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PmulldRR; 1789fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1790fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1791fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PmullwRR; 1792fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1793fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSingle: 1794fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86MulpsRR; 1795fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1796fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kDouble: 1797fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86MulpdRR; 1798fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 179960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 180060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // HW doesn't support 16x16 byte multiplication so emulate it. 1801b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A GenMultiplyVectorSignedByte(rs_dest_src1, rs_src2); 1802b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return; 1803b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k64: 1804b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A GenMultiplyVectorLong(rs_dest_src1, rs_src2); 180560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return; 1806fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1807fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector multiply " << opsize; 1808fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1809fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1810fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1811fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1812fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 18136a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenAddVector(MIR* mir) { 181460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 181560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 181660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1817b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 181860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 1819fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1820fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1821fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1822fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PadddRR; 1823fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1824b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k64: 1825b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A opcode = kX86PaddqRR; 1826b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 1827fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1828fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 1829fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PaddwRR; 1830fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1831fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedByte: 1832fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedByte: 1833fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PaddbRR; 1834fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1835fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSingle: 1836fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86AddpsRR; 1837fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1838fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kDouble: 1839fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86AddpdRR; 1840fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1841fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1842fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector addition " << opsize; 1843fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1844fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1845fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1846fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1847fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 18486a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenSubtractVector(MIR* mir) { 184960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 185060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 185160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1852b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 185360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 1854fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1855fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1856fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1857fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsubdRR; 1858fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1859b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k64: 1860b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A opcode = kX86PsubqRR; 1861b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 1862fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1863fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 1864fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsubwRR; 1865fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1866fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedByte: 1867fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedByte: 1868fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsubbRR; 1869fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1870fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSingle: 1871fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86SubpsRR; 1872fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1873fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kDouble: 1874fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86SubpdRR; 1875fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1876fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1877fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector subtraction " << opsize; 1878fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1879fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1880fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), rs_src2.GetReg()); 1881fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1882fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 18836a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenShiftByteVector(MIR* mir) { 1884b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Destination does not need clobbered because it has already been as part 1885b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // of the general packed shift handler (caller of this method). 188660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 188760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 188860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji int opcode = 0; 188960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) { 189060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpPackedShiftLeft: 189160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji opcode = kX86PsllwRI; 189260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 189360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpPackedSignedShiftRight: 189460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kMirOpPackedUnsignedShiftRight: 1895b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Add support for emulated byte shifts. 189660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji default: 189760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji LOG(FATAL) << "Unsupported shift operation on byte vector " << opcode; 189860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 189960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 190060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 1901b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Clear xmm register and return if shift more than byte length. 1902b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int imm = mir->dalvikInsn.vB; 1903b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (imm >= 8) { 1904b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PxorRR, rs_dest_src1.GetReg(), rs_dest_src1.GetReg()); 1905b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return; 1906b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 190760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 190860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Shift lower values. 190960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji NewLIR2(opcode, rs_dest_src1.GetReg(), imm); 191060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 1911b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A /* 1912b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * The above shift will shift the whole word, but that means 1913b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * both the bytes will shift as well. To emulate a byte level 1914b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * shift, we can just throw away the lower (8 - N) bits of the 1915b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * upper byte, and we are done. 1916b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A */ 1917b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A uint8_t byte_mask = 0xFF << imm; 1918b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A uint32_t int_mask = byte_mask; 1919b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int_mask = int_mask << 8 | byte_mask; 1920b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int_mask = int_mask << 8 | byte_mask; 1921b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int_mask = int_mask << 8 | byte_mask; 192260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 1923b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // And the destination with the mask 1924b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A AndMaskVectorRegister(rs_dest_src1, int_mask, int_mask, int_mask, int_mask); 192560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 192660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 19276a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenShiftLeftVector(MIR* mir) { 192860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 192960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 193060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1931b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 193260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji int imm = mir->dalvikInsn.vB; 1933fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1934fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1935fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1936fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PslldRI; 1937fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1938fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k64: 1939fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsllqRI; 1940fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1941fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1942fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 1943fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsllwRI; 1944fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 194560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 194660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kUnsignedByte: 19476a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenShiftByteVector(mir); 194860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return; 1949fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1950fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector shift left " << opsize; 1951fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1952fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1953fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), imm); 1954fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1955fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 19566a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenSignedShiftRightVector(MIR* mir) { 195760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 195860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 195960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1960b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 196160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji int imm = mir->dalvikInsn.vB; 1962fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1963fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1964fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1965fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsradRI; 1966fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1967fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1968fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 1969fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsrawRI; 1970fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 197160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 197260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kUnsignedByte: 19736a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenShiftByteVector(mir); 197460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return; 1975b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k64: 1976b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Implement emulated shift algorithm. 1977fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 1978fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector signed shift right " << opsize; 19796a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNREACHABLE(); 1980fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 1981fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), imm); 1982fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 1983fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 19846a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenUnsignedShiftRightVector(MIR* mir) { 198560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 198660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 198760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 1988b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 198960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji int imm = mir->dalvikInsn.vB; 1990fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell int opcode = 0; 1991fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 1992fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 1993fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsrldRI; 1994fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1995fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k64: 1996fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsrlqRI; 1997fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 1998fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 1999fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 2000fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell opcode = kX86PsrlwRI; 2001fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 200260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 200360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kUnsignedByte: 20046a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers GenShiftByteVector(mir); 200560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji return; 2006fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 2007fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector unsigned shift right " << opsize; 2008fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 2009fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 2010fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(opcode, rs_dest_src1.GetReg(), imm); 2011fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2012fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 20136a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenAndVector(MIR* mir) { 2014fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // We only support 128 bit registers. 201560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 201660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 2017b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 201860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 2019fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(kX86PandRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 2020fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2021fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 20226a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenOrVector(MIR* mir) { 2023fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // We only support 128 bit registers. 202460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 202560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 2026b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 202760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 2028fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(kX86PorRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 2029fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2030fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 20316a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenXorVector(MIR* mir) { 2032fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // We only support 128 bit registers. 203360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 203460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest_src1 = RegStorage::Solo128(mir->dalvikInsn.vA); 2035b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest_src1); 203660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_src2 = RegStorage::Solo128(mir->dalvikInsn.vB); 2037fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell NewLIR2(kX86PxorRR, rs_dest_src1.GetReg(), rs_src2.GetReg()); 2038fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2039fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 204060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjivoid X86Mir2Lir::AndMaskVectorRegister(RegStorage rs_src1, uint32_t m1, uint32_t m2, uint32_t m3, uint32_t m4) { 204160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji MaskVectorRegister(kX86PandRM, rs_src1, m1, m2, m3, m4); 204260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 204360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 204460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerjivoid X86Mir2Lir::MaskVectorRegister(X86OpCode opcode, RegStorage rs_src1, uint32_t m0, uint32_t m1, uint32_t m2, uint32_t m3) { 204560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Create temporary MIR as container for 128-bit binary mask. 204660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji MIR const_mir; 204760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji MIR* const_mirp = &const_mir; 204860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpConstVector); 204960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.arg[0] = m0; 205060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.arg[1] = m1; 205160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.arg[2] = m2; 205260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji const_mirp->dalvikInsn.arg[3] = m3; 205360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 205460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji // Mask vector with const from literal pool. 205560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji AppendOpcodeWithConst(opcode, rs_src1.GetReg(), const_mirp); 205660bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji} 205760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 20586a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenAddReduceVector(MIR* mir) { 205960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 2060b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage vector_src = RegStorage::Solo128(mir->dalvikInsn.vB); 2061b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A bool is_wide = opsize == k64 || opsize == kDouble; 2062b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2063b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Get the location of the virtual register. Since this bytecode is overloaded 2064b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // for different types (and sizes), we need different logic for each path. 2065b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // The design of bytecode uses same VR for source and destination. 2066b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegLocation rl_src, rl_dest, rl_result; 2067b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (is_wide) { 2068b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = mir_graph_->GetSrcWide(mir, 0); 2069b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_dest = mir_graph_->GetDestWide(mir); 2070b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2071b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = mir_graph_->GetSrc(mir, 0); 2072b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_dest = mir_graph_->GetDest(mir); 2073b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 207460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2075b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // We need a temp for byte and short values 2076b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage temp; 207760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2078b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // There is a different path depending on type and size. 2079b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize == kSingle) { 2080b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle float case. 2081b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Add support for fast math (not value safe) and do horizontal add in that case. 208260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2083b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = LoadValue(rl_src, kFPReg); 2084b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLoc(rl_dest, kFPReg, true); 208560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2086b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Since we are doing an add-reduce, we move the reg holding the VR 2087b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // into the result so we include it in result. 2088b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A OpRegCopy(rl_result.reg, rl_src.reg); 2089b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86AddssRR, rl_result.reg.GetReg(), vector_src.GetReg()); 209060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2091b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Since FP must keep order of operation for value safety, we shift to low 2092b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // 32-bits and add to result. 2093b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A for (int i = 0; i < 3; i++) { 2094b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(kX86ShufpsRRI, vector_src.GetReg(), vector_src.GetReg(), 0x39); 2095b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86AddssRR, rl_result.reg.GetReg(), vector_src.GetReg()); 2096b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 209760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2098b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A StoreValue(rl_dest, rl_result); 2099b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == kDouble) { 2100b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle double case. 2101b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = LoadValueWide(rl_src, kFPReg); 2102b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLocWide(rl_dest, kFPReg, true); 2103b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LOG(FATAL) << "Unsupported vector add reduce for double."; 2104b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == k64) { 2105b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A /* 2106b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * Handle long case: 2107b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1) Reduce the vector register to lower half (with addition). 2108b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-1) Get an xmm temp and fill it with vector register. 2109b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-2) Shift the xmm temp by 8-bytes. 2110b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-3) Add the xmm temp to vector register that is being reduced. 2111b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2) Allocate temp GP / GP pair. 2112b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2-1) In 64-bit case, use movq to move result to a 64-bit GP. 2113b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2-2) In 32-bit case, use movd twice to move to 32-bit GP pair. 2114b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 3) Finish the add reduction by doing what add-long/2addr does, 2115b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * but instead of having a VR as one of the sources, we have our temp GP. 2116b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A */ 2117b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_tmp_vector = Get128BitRegister(AllocTempDouble()); 2118b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdqaRR, rs_tmp_vector.GetReg(), vector_src.GetReg()); 2119b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrldqRI, rs_tmp_vector.GetReg(), 8); 2120b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddqRR, vector_src.GetReg(), rs_tmp_vector.GetReg()); 2121b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A FreeTemp(rs_tmp_vector); 2122b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2123b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // We would like to be able to reuse the add-long implementation, so set up a fake 2124b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // register location to pass it. 2125b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegLocation temp_loc = mir_graph_->GetBadLoc(); 2126b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp_loc.core = 1; 2127b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp_loc.wide = 1; 2128b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp_loc.location = kLocPhysReg; 2129b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp_loc.reg = AllocTempWide(); 2130b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2131b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (cu_->target64) { 2132b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A DCHECK(!temp_loc.reg.IsPair()); 2133b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovqrxRR, temp_loc.reg.GetReg(), vector_src.GetReg()); 2134b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2135b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, temp_loc.reg.GetLowReg(), vector_src.GetReg()); 2136b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlqRI, vector_src.GetReg(), 0x20); 2137b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, temp_loc.reg.GetHighReg(), vector_src.GetReg()); 2138b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 213960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 21405c5676b26a08454b3f0133783778991bbe5dd681Razvan A Lupusoru GenArithOpLong(Instruction::ADD_LONG_2ADDR, rl_dest, temp_loc, temp_loc, mir->optimization_flags); 2141b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == kSignedByte || opsize == kUnsignedByte) { 2142b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage rs_tmp = Get128BitRegister(AllocTempDouble()); 2143b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PxorRR, rs_tmp.GetReg(), rs_tmp.GetReg()); 2144b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsadbwRR, vector_src.GetReg(), rs_tmp.GetReg()); 2145b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(kX86PshufdRRI, rs_tmp.GetReg(), vector_src.GetReg(), 0x4e); 2146b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PaddbRR, vector_src.GetReg(), rs_tmp.GetReg()); 2147b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Move to a GPR 2148b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp = AllocTemp(); 2149b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, temp.GetReg(), vector_src.GetReg()); 2150b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2151b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle and the int and short cases together 2152b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2153b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Initialize as if we were handling int case. Below we update 2154b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // the opcode if handling byte or short. 2155b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int vec_bytes = (mir->dalvikInsn.vC & 0xFFFF) / 8; 2156b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int vec_unit_size; 2157b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int horizontal_add_opcode; 2158b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int extract_opcode; 2159b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2160b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize == kSignedHalf || opsize == kUnsignedHalf) { 2161b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A extract_opcode = kX86PextrwRRI; 2162b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A horizontal_add_opcode = kX86PhaddwRR; 2163b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A vec_unit_size = 2; 2164b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == k32) { 2165b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A vec_unit_size = 4; 2166b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A horizontal_add_opcode = kX86PhadddRR; 2167b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A extract_opcode = kX86PextrdRRI; 2168b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2169b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LOG(FATAL) << "Unsupported vector add reduce " << opsize; 2170b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A return; 217160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 217260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2173b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int elems = vec_bytes / vec_unit_size; 217460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2175b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A while (elems > 1) { 2176b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(horizontal_add_opcode, vector_src.GetReg(), vector_src.GetReg()); 2177b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A elems >>= 1; 2178b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 217960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2180b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle this as arithmetic unary case. 2181b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 218260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2183b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Extract to a GP register because this is integral typed. 2184b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A temp = AllocTemp(); 2185b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(extract_opcode, temp.GetReg(), vector_src.GetReg(), 0); 2186b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2187b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2188b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize != k64 && opsize != kSingle && opsize != kDouble) { 2189b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // The logic below looks very similar to the handling of ADD_INT_2ADDR 2190b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // except the rhs is not a VR but a physical register allocated above. 2191b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // No load of source VR is done because it assumes that rl_result will 2192b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // share physical register / memory location. 21936a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers rl_result = UpdateLocTyped(rl_dest); 2194b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (rl_result.location == kLocPhysReg) { 2195b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Ensure res is in a core reg. 2196b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLoc(rl_dest, kCoreReg, true); 2197b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A OpRegReg(kOpAdd, rl_result.reg, temp); 2198b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A StoreFinalValue(rl_dest, rl_result); 2199b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2200b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Do the addition directly to memory. 2201b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A OpMemReg(kOpAdd, rl_result, temp.GetReg()); 2202b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2203b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2204fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2205fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 22066a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenReduceVector(MIR* mir) { 220760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 220860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegLocation rl_dest = mir_graph_->GetDest(mir); 2209b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage vector_src = RegStorage::Solo128(mir->dalvikInsn.vB); 221060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegLocation rl_result; 221160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji bool is_wide = false; 221260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2213b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // There is a different path depending on type and size. 2214b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize == kSingle) { 2215b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle float case. 2216b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Add support for fast math (not value safe) and do horizontal add in that case. 2217fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 2218b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLoc(rl_dest, kFPReg, true); 2219b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PxorRR, rl_result.reg.GetReg(), rl_result.reg.GetReg()); 2220b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86AddssRR, rl_result.reg.GetReg(), vector_src.GetReg()); 2221b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2222b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Since FP must keep order of operation for value safety, we shift to low 2223b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // 32-bits and add to result. 2224b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A for (int i = 0; i < 3; i++) { 2225b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(kX86ShufpsRRI, vector_src.GetReg(), vector_src.GetReg(), 0x39); 2226b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86AddssRR, rl_result.reg.GetReg(), vector_src.GetReg()); 2227b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2228b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2229b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A StoreValue(rl_dest, rl_result); 2230b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == kDouble) { 2231b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // TODO Handle double case. 2232b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LOG(FATAL) << "Unsupported add reduce for double."; 2233b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else if (opsize == k64) { 2234b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A /* 2235b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * Handle long case: 2236b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1) Reduce the vector register to lower half (with addition). 2237b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-1) Get an xmm temp and fill it with vector register. 2238b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-2) Shift the xmm temp by 8-bytes. 2239b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 1-3) Add the xmm temp to vector register that is being reduced. 2240b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2) Evaluate destination to a GP / GP pair. 2241b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2-1) In 64-bit case, use movq to move result to a 64-bit GP. 2242b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 2-2) In 32-bit case, use movd twice to move to 32-bit GP pair. 2243b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A * 3) Store the result to the final destination. 2244b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A */ 224553cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji NewLIR2(kX86PsrldqRI, vector_src.GetReg(), 8); 2246b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_result = EvalLocWide(rl_dest, kCoreReg, true); 2247b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (cu_->target64) { 2248b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A DCHECK(!rl_result.reg.IsPair()); 2249b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovqrxRR, rl_result.reg.GetReg(), vector_src.GetReg()); 225060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } else { 2251b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, rl_result.reg.GetLowReg(), vector_src.GetReg()); 2252b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PsrlqRI, vector_src.GetReg(), 0x20); 2253b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86MovdrxRR, rl_result.reg.GetHighReg(), vector_src.GetReg()); 225460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 2255b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2256b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A StoreValueWide(rl_dest, rl_result); 225760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } else { 225853cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji int extract_index = mir->dalvikInsn.arg[0]; 225953cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji int extr_opcode = 0; 22606a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers rl_result = UpdateLocTyped(rl_dest); 226153cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji 2262b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Handle the rest of integral types now. 2263b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A switch (opsize) { 2264b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case k32: 226553cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji extr_opcode = (rl_result.location == kLocPhysReg) ? kX86PextrdRRI : kX86PextrdMRI; 2266b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 2267b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case kSignedHalf: 2268b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A case kUnsignedHalf: 226953cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji extr_opcode = (rl_result.location == kLocPhysReg) ? kX86PextrwRRI : kX86PextrwMRI; 227053cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji break; 227153cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji case kSignedByte: 227253cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji extr_opcode = (rl_result.location == kLocPhysReg) ? kX86PextrbRRI : kX86PextrbMRI; 2273b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 2274b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A default: 2275b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A LOG(FATAL) << "Unsupported vector reduce " << opsize; 22766a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNREACHABLE(); 2277b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2278b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2279b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (rl_result.location == kLocPhysReg) { 2280b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(extr_opcode, rl_result.reg.GetReg(), vector_src.GetReg(), extract_index); 228153cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji StoreFinalValue(rl_dest, rl_result); 2282b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2283b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int displacement = SRegOffset(rl_result.s_reg_low); 2284b72c723bfb21e05cb9b0a7999db805df93fcaee8Razvan A Lupusoru LIR *l = NewLIR4(extr_opcode, rs_rX86_SP_32.GetReg(), displacement, vector_src.GetReg(), 2285b72c723bfb21e05cb9b0a7999db805df93fcaee8Razvan A Lupusoru extract_index); 2286b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A AnnotateDalvikRegAccess(l, displacement >> 2, true /* is_load */, is_wide /* is_64bit */); 2287b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A AnnotateDalvikRegAccess(l, displacement >> 2, false /* is_load */, is_wide /* is_64bit */); 2288b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 228960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 2290fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2291fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 22920a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendellvoid X86Mir2Lir::LoadVectorRegister(RegStorage rs_dest, RegStorage rs_src, 22930a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell OpSize opsize, int op_mov) { 22940a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell if (!cu_->target64 && opsize == k64) { 22950a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell // Logic assumes that longs are loaded in GP register pairs. 22960a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell NewLIR2(kX86MovdxrRR, rs_dest.GetReg(), rs_src.GetLowReg()); 22970a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell RegStorage r_tmp = AllocTempDouble(); 22980a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell NewLIR2(kX86MovdxrRR, r_tmp.GetReg(), rs_src.GetHighReg()); 22990a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell NewLIR2(kX86PunpckldqRR, rs_dest.GetReg(), r_tmp.GetReg()); 23000a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell FreeTemp(r_tmp); 23010a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell } else { 23020a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell NewLIR2(op_mov, rs_dest.GetReg(), rs_src.GetReg()); 23030a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell } 23040a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell} 23050a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell 23066a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenSetVector(MIR* mir) { 230760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji DCHECK_EQ(mir->dalvikInsn.vC & 0xFFFF, 128U); 230860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji OpSize opsize = static_cast<OpSize>(mir->dalvikInsn.vC >> 16); 230960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegStorage rs_dest = RegStorage::Solo128(mir->dalvikInsn.vA); 2310b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A Clobber(rs_dest); 2311b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A int op_shuffle = 0, op_shuffle_high = 0, op_mov = kX86MovdxrRR; 231260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji RegisterClass reg_type = kCoreReg; 2313b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A bool is_wide = false; 231460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2315fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell switch (opsize) { 2316fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case k32: 2317b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PshufdRRI; 2318fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 231960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSingle: 2320b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PshufdRRI; 2321b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_mov = kX86MovdqaRR; 232260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji reg_type = kFPReg; 232360bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 232460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case k64: 2325b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PunpcklqdqRR; 232653cec00aa6789382621a53b33b13f45bd27148caUdayan Banerji op_mov = kX86MovqxrRR; 2327b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A is_wide = true; 232860bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji break; 232960bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kSignedByte: 233060bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji case kUnsignedByte: 2331b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // We will have the source loaded up in a 2332b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // double-word before we use this shuffle 2333b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PshufdRRI; 2334b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A break; 2335fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kSignedHalf: 2336fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell case kUnsignedHalf: 2337fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Handles low quadword. 2338b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle = kX86PshuflwRRI; 2339fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Handles upper quadword. 2340b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A op_shuffle_high = kX86PshufdRRI; 2341fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 2342fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell default: 2343fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell LOG(FATAL) << "Unsupported vector set " << opsize; 2344fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell break; 2345fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 2346fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 2347b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Load the value from the VR into a physical register. 2348b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegLocation rl_src; 2349b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (!is_wide) { 2350b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = mir_graph_->GetSrc(mir, 0); 235160bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji rl_src = LoadValue(rl_src, reg_type); 235260bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } else { 2353b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A rl_src = mir_graph_->GetSrcWide(mir, 0); 235460bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji rl_src = LoadValueWide(rl_src, reg_type); 235560bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji } 2356b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A RegStorage reg_to_shuffle = rl_src.reg; 235760bfe7b3e8f00f0a8ef3f5d8716adfdf86b71f43Udayan Banerji 2358b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Load the value into the XMM register. 23590a1174efd81fc25110ad106a84063c62af9ce7e5Mark Mendell LoadVectorRegister(rs_dest, reg_to_shuffle, opsize, op_mov); 2360fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 2361b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (opsize == kSignedByte || opsize == kUnsignedByte) { 2362b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // In the byte case, first duplicate it to be a word 2363b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A // Then duplicate it to be a double-word 2364b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PunpcklbwRR, rs_dest.GetReg(), rs_dest.GetReg()); 2365b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(kX86PunpcklwdRR, rs_dest.GetReg(), rs_dest.GetReg()); 2366b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2367fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 2368fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // Now shuffle the value across the destination. 2369b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (op_shuffle == kX86PunpcklqdqRR) { 2370b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR2(op_shuffle, rs_dest.GetReg(), rs_dest.GetReg()); 2371b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } else { 2372b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(op_shuffle, rs_dest.GetReg(), rs_dest.GetReg(), 0); 2373b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A } 2374fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 2375fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell // And then repeat as needed. 2376b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (op_shuffle_high != 0) { 2377b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A NewLIR3(op_shuffle_high, rs_dest.GetReg(), rs_dest.GetReg(), 0); 2378fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell } 2379fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell} 2380fe94578b63380f464c3abd5c156b7b31d068db6cMark Mendell 23816a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenPackedArrayGet(BasicBlock* bb, MIR* mir) { 23826a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNUSED(bb, mir); 2383b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A UNIMPLEMENTED(FATAL) << "Extended opcode kMirOpPackedArrayGet not supported."; 2384b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A} 2385b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 23866a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogersvoid X86Mir2Lir::GenPackedArrayPut(BasicBlock* bb, MIR* mir) { 23876a3c1fcb4ba42ad4d5d142c17a3712a6ddd3866fIan Rogers UNUSED(bb, mir); 2388b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A UNIMPLEMENTED(FATAL) << "Extended opcode kMirOpPackedArrayPut not supported."; 2389b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A} 2390b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A 2391b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan ALIR* X86Mir2Lir::ScanVectorLiteral(int32_t* constants) { 2392d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell for (LIR *p = const_vectors_; p != nullptr; p = p->next) { 2393b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A if (constants[0] == p->operands[0] && constants[1] == p->operands[1] && 2394b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A constants[2] == p->operands[2] && constants[3] == p->operands[3]) { 2395d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell return p; 2396d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 2397d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 2398d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell return nullptr; 2399d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell} 2400d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 2401b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan ALIR* X86Mir2Lir::AddVectorLiteral(int32_t* constants) { 2402d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell LIR* new_value = static_cast<LIR*>(arena_->Alloc(sizeof(LIR), kArenaAllocData)); 2403b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A new_value->operands[0] = constants[0]; 2404b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A new_value->operands[1] = constants[1]; 2405b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A new_value->operands[2] = constants[2]; 2406b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A new_value->operands[3] = constants[3]; 2407d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell new_value->next = const_vectors_; 2408d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell if (const_vectors_ == nullptr) { 2409b3a84e2f308b3ed7d17b8e96fc7adfcac36ebe77Lupusoru, Razvan A estimated_native_code_size_ += 12; // Maximum needed to align to 16 byte boundary. 2410d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell } 2411d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell estimated_native_code_size_ += 16; // Space for one vector. 2412d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell const_vectors_ = new_value; 2413d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell return new_value; 2414d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell} 2415d65c51a556e6649db4e18bd083c8fec37607a442Mark Mendell 241658994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko// ------------ ABI support: mapping of args to physical registers ------------- 2417717a3e447c6f7a922cf9c3efe522747a187a045dSerguei KatkovRegStorage X86Mir2Lir::InToRegStorageX86_64Mapper::GetNextReg(ShortyArg arg) { 2418a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu const SpecialTargetRegister coreArgMappingToPhysicalReg[] = {kArg1, kArg2, kArg3, kArg4, kArg5}; 2419717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov const size_t coreArgMappingToPhysicalRegSize = arraysize(coreArgMappingToPhysicalReg); 2420a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu const SpecialTargetRegister fpArgMappingToPhysicalReg[] = {kFArg0, kFArg1, kFArg2, kFArg3, 2421ccc60264229ac96d798528d2cb7dbbdd0deca993Andreas Gampe kFArg4, kFArg5, kFArg6, kFArg7}; 2422717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov const size_t fpArgMappingToPhysicalRegSize = arraysize(fpArgMappingToPhysicalReg); 242358994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2424717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (arg.IsFP()) { 242558994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko if (cur_fp_reg_ < fpArgMappingToPhysicalRegSize) { 2426717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return m2l_->TargetReg(fpArgMappingToPhysicalReg[cur_fp_reg_++], 2427717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov arg.IsWide() ? kWide : kNotWide); 242858994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 242958994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } else { 243058994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko if (cur_core_reg_ < coreArgMappingToPhysicalRegSize) { 2431717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return m2l_->TargetReg(coreArgMappingToPhysicalReg[cur_core_reg_++], 2432717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov arg.IsRef() ? kRef : (arg.IsWide() ? kWide : kNotWide)); 243358994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 243458994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 2435a77ee5103532abb197f492c14a9e6fb437054e2aChao-ying Fu return RegStorage::InvalidReg(); 243658994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko} 243758994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2438717a3e447c6f7a922cf9c3efe522747a187a045dSerguei KatkovRegStorage X86Mir2Lir::InToRegStorageX86Mapper::GetNextReg(ShortyArg arg) { 2439717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov const SpecialTargetRegister coreArgMappingToPhysicalReg[] = {kArg1, kArg2, kArg3}; 2440717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov const size_t coreArgMappingToPhysicalRegSize = arraysize(coreArgMappingToPhysicalReg); 244158994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2442717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov RegStorage result = RegStorage::InvalidReg(); 2443717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (cur_core_reg_ < coreArgMappingToPhysicalRegSize) { 2444717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov result = m2l_->TargetReg(coreArgMappingToPhysicalReg[cur_core_reg_++], 2445717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov arg.IsRef() ? kRef : kNotWide); 2446717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (arg.IsWide() && cur_core_reg_ < coreArgMappingToPhysicalRegSize) { 2447717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov result = RegStorage::MakeRegPair( 2448717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov result, m2l_->TargetReg(coreArgMappingToPhysicalReg[cur_core_reg_++], kNotWide)); 24494d5d794382cd6d3a25392d17543d5987e432d314Dmitry Petrochenko } 245058994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko } 2451717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return result; 245258994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko} 245358994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2454717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov// ---------End of ABI support: mapping of args to physical registers ------------- 245558994cdb00b323339bd83828eddc53976048006fDmitry Petrochenko 2456984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampebool X86Mir2Lir::GenInlinedCharAt(CallInfo* info) { 2457984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // Location of reference to data array 2458984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe int value_offset = mirror::String::ValueOffset().Int32Value(); 2459984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // Location of count 2460984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe int count_offset = mirror::String::CountOffset().Int32Value(); 2461984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // Starting offset within data array 2462984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe int offset_offset = mirror::String::OffsetOffset().Int32Value(); 2463984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // Start of char data with array_ 2464984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe int data_offset = mirror::Array::DataOffset(sizeof(uint16_t)).Int32Value(); 2465984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe 2466984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegLocation rl_obj = info->args[0]; 2467984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegLocation rl_idx = info->args[1]; 2468984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe rl_obj = LoadValue(rl_obj, kRefReg); 2469984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // X86 wants to avoid putting a constant index into a register. 2470984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe if (!rl_idx.is_const) { 2471984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe rl_idx = LoadValue(rl_idx, kCoreReg); 2472984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } 2473984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegStorage reg_max; 2474984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe GenNullCheck(rl_obj.reg, info->opt_flags); 2475984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe bool range_check = (!(info->opt_flags & MIR_IGNORE_RANGE_CHECK)); 2476984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe LIR* range_check_branch = nullptr; 2477984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegStorage reg_off; 2478984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegStorage reg_ptr; 2479984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe if (range_check) { 2480984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // On x86, we can compare to memory directly 2481984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe // Set up a launch pad to allow retry in case of bounds violation */ 2482984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe if (rl_idx.is_const) { 2483984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe LIR* comparison; 2484984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe range_check_branch = OpCmpMemImmBranch( 2485984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe kCondUlt, RegStorage::InvalidReg(), rl_obj.reg, count_offset, 2486984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe mir_graph_->ConstantValue(rl_idx.orig_sreg), nullptr, &comparison); 2487984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe MarkPossibleNullPointerExceptionAfter(0, comparison); 2488984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } else { 2489984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe OpRegMem(kOpCmp, rl_idx.reg, rl_obj.reg, count_offset); 2490984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe MarkPossibleNullPointerException(0); 2491984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe range_check_branch = OpCondBranch(kCondUge, nullptr); 2492984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } 2493984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } 2494984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe reg_off = AllocTemp(); 2495984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe reg_ptr = AllocTempRef(); 2496984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe Load32Disp(rl_obj.reg, offset_offset, reg_off); 2497984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe LoadRefDisp(rl_obj.reg, value_offset, reg_ptr, kNotVolatile); 2498984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe if (rl_idx.is_const) { 2499984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe OpRegImm(kOpAdd, reg_off, mir_graph_->ConstantValue(rl_idx.orig_sreg)); 2500984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } else { 2501984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe OpRegReg(kOpAdd, reg_off, rl_idx.reg); 2502984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } 2503984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe FreeTemp(rl_obj.reg); 2504984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe if (rl_idx.location == kLocPhysReg) { 2505984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe FreeTemp(rl_idx.reg); 2506984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } 2507984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegLocation rl_dest = InlineTarget(info); 2508984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true); 2509984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe LoadBaseIndexedDisp(reg_ptr, reg_off, 1, data_offset, rl_result.reg, kUnsignedHalf); 2510984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe FreeTemp(reg_off); 2511984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe FreeTemp(reg_ptr); 2512984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe StoreValue(rl_dest, rl_result); 2513984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe if (range_check) { 2514984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe DCHECK(range_check_branch != nullptr); 2515984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe info->opt_flags |= MIR_IGNORE_NULL_CHECK; // Record that we've already null checked. 2516984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe AddIntrinsicSlowPath(info, range_check_branch); 2517984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe } 2518984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe return true; 2519984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe} 2520984305917bf57b3f8d92965e4715a0370cc5bcfbAndreas Gampe 25216bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalovbool X86Mir2Lir::GenInlinedCurrentThread(CallInfo* info) { 25226bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov RegLocation rl_dest = InlineTarget(info); 25236bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 25246bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov // Early exit if the result is unused. 25256bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov if (rl_dest.orig_sreg < 0) { 25266bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov return true; 25276bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov } 25286bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 25296bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov RegLocation rl_result = EvalLoc(rl_dest, kRefReg, true); 25306bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 25316bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov if (cu_->target64) { 25326bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov OpRegThreadMem(kOpMov, rl_result.reg, Thread::PeerOffset<8>()); 25336bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov } else { 25346bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov OpRegThreadMem(kOpMov, rl_result.reg, Thread::PeerOffset<4>()); 25356bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov } 25366bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 25376bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov StoreValue(rl_dest, rl_result); 25386bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov return true; 25396bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov} 25406bbf0967d217ab2b7bdbb78bfd076b8fb07a44e8Alexei Zavjalov 25416dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev/** 25426dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev * Lock temp registers for explicit usage. Registers will be freed in destructor. 25436dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev */ 25446dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim KazantsevX86Mir2Lir::ExplicitTempRegisterLock::ExplicitTempRegisterLock(X86Mir2Lir* mir_to_lir, 25456dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev int n_regs, ...) : 25466dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev temp_regs_(n_regs), 25476dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_(mir_to_lir) { 25486dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev va_list regs; 25496dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev va_start(regs, n_regs); 25506dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev for (int i = 0; i < n_regs; i++) { 25516dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev RegStorage reg = *(va_arg(regs, RegStorage*)); 25526dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev RegisterInfo* info = mir_to_lir_->GetRegInfo(reg); 25536dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 25546dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev // Make sure we don't have promoted register here. 25556dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev DCHECK(info->IsTemp()); 25566dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 25576dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev temp_regs_.push_back(reg); 25586dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->FlushReg(reg); 25596dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 25606dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev if (reg.IsPair()) { 25616dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev RegStorage partner = info->Partner(); 25626dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev temp_regs_.push_back(partner); 25636dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->FlushReg(partner); 25646dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev } 25656dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 25666dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->Clobber(reg); 25676dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->LockTemp(reg); 25686dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev } 25696dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 25706dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev va_end(regs); 25716dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev} 25726dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 25736dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev/* 25746dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev * Free all locked registers. 25756dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev */ 25766dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim KazantsevX86Mir2Lir::ExplicitTempRegisterLock::~ExplicitTempRegisterLock() { 25776dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev // Free all locked temps. 25786dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev for (auto it : temp_regs_) { 25796dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev mir_to_lir_->FreeTemp(it); 25806dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev } 25816dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev} 25826dccdc2511c9f22d3cc2ea83386ce9db2688fa19Maxim Kazantsev 2583717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkovint X86Mir2Lir::GenDalvikArgsBulkCopy(CallInfo* info, int first, int count) { 2584717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (count < 4) { 2585717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // It does not make sense to use this utility if we have no chance to use 2586717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // 128-bit move. 2587717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return count; 2588717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2589717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov GenDalvikArgsFlushPromoted(info, first); 2590717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2591717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // The rest can be copied together 2592717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov int current_src_offset = SRegOffset(info->args[first].s_reg_low); 2593717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov int current_dest_offset = StackVisitor::GetOutVROffset(first, cu_->instruction_set); 2594717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2595717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Only davik regs are accessed in this loop; no next_call_insn() calls. 2596717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg); 2597717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov while (count > 0) { 2598717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // This is based on the knowledge that the stack itself is 16-byte aligned. 2599717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bool src_is_16b_aligned = (current_src_offset & 0xF) == 0; 2600717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bool dest_is_16b_aligned = (current_dest_offset & 0xF) == 0; 2601717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov size_t bytes_to_move; 2602717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2603717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov /* 2604717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * The amount to move defaults to 32-bit. If there are 4 registers left to move, then do a 2605717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * a 128-bit move because we won't get the chance to try to aligned. If there are more than 2606717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * 4 registers left to move, consider doing a 128-bit only if either src or dest are aligned. 2607717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * We do this because we could potentially do a smaller move to align. 2608717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov */ 2609717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (count == 4 || (count > 4 && (src_is_16b_aligned || dest_is_16b_aligned))) { 2610717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Moving 128-bits via xmm register. 2611717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bytes_to_move = sizeof(uint32_t) * 4; 2612717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2613717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Allocate a free xmm temp. Since we are working through the calling sequence, 2614717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // we expect to have an xmm temporary available. AllocTempDouble will abort if 2615717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // there are no free registers. 2616717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov RegStorage temp = AllocTempDouble(); 2617717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2618717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov LIR* ld1 = nullptr; 2619717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov LIR* ld2 = nullptr; 2620717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov LIR* st1 = nullptr; 2621717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov LIR* st2 = nullptr; 2622717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2623717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov /* 2624717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * The logic is similar for both loads and stores. If we have 16-byte alignment, 2625717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * do an aligned move. If we have 8-byte alignment, then do the move in two 2626717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * parts. This approach prevents possible cache line splits. Finally, fall back 2627717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * to doing an unaligned move. In most cases we likely won't split the cache 2628717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov * line but we cannot prove it and thus take a conservative approach. 2629717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov */ 2630717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bool src_is_8b_aligned = (current_src_offset & 0x7) == 0; 2631717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bool dest_is_8b_aligned = (current_dest_offset & 0x7) == 0; 2632717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2633717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (src_is_16b_aligned) { 2634717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld1 = OpMovRegMem(temp, TargetPtrReg(kSp), current_src_offset, kMovA128FP); 2635717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else if (src_is_8b_aligned) { 2636717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld1 = OpMovRegMem(temp, TargetPtrReg(kSp), current_src_offset, kMovLo128FP); 2637717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld2 = OpMovRegMem(temp, TargetPtrReg(kSp), current_src_offset + (bytes_to_move >> 1), 2638717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov kMovHi128FP); 2639717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2640717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld1 = OpMovRegMem(temp, TargetPtrReg(kSp), current_src_offset, kMovU128FP); 2641717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2642717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2643717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (dest_is_16b_aligned) { 2644717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st1 = OpMovMemReg(TargetPtrReg(kSp), current_dest_offset, temp, kMovA128FP); 2645717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else if (dest_is_8b_aligned) { 2646717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st1 = OpMovMemReg(TargetPtrReg(kSp), current_dest_offset, temp, kMovLo128FP); 2647717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st2 = OpMovMemReg(TargetPtrReg(kSp), current_dest_offset + (bytes_to_move >> 1), 2648717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov temp, kMovHi128FP); 2649717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2650717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st1 = OpMovMemReg(TargetPtrReg(kSp), current_dest_offset, temp, kMovU128FP); 2651717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2652717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2653717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // TODO If we could keep track of aliasing information for memory accesses that are wider 2654717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // than 64-bit, we wouldn't need to set up a barrier. 2655717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (ld1 != nullptr) { 2656717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (ld2 != nullptr) { 2657717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // For 64-bit load we can actually set up the aliasing information. 2658717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov AnnotateDalvikRegAccess(ld1, current_src_offset >> 2, true, true); 2659717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov AnnotateDalvikRegAccess(ld2, (current_src_offset + (bytes_to_move >> 1)) >> 2, true, 2660717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov true); 2661717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2662717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Set barrier for 128-bit load. 2663717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov ld1->u.m.def_mask = &kEncodeAll; 2664717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2665717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2666717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (st1 != nullptr) { 2667717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov if (st2 != nullptr) { 2668717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // For 64-bit store we can actually set up the aliasing information. 2669717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov AnnotateDalvikRegAccess(st1, current_dest_offset >> 2, false, true); 2670717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov AnnotateDalvikRegAccess(st2, (current_dest_offset + (bytes_to_move >> 1)) >> 2, false, 2671717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov true); 2672717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2673717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Set barrier for 128-bit store. 2674717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov st1->u.m.def_mask = &kEncodeAll; 2675717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2676717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2677717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2678717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Free the temporary used for the data movement. 2679717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov FreeTemp(temp); 2680717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } else { 2681717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Moving 32-bits via general purpose register. 2682717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov bytes_to_move = sizeof(uint32_t); 2683717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2684717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Instead of allocating a new temp, simply reuse one of the registers being used 2685717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // for argument passing. 2686717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov RegStorage temp = TargetReg(kArg3, kNotWide); 2687717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2688717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov // Now load the argument VR and store to the outs. 2689717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov Load32Disp(TargetPtrReg(kSp), current_src_offset, temp); 2690717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov Store32Disp(TargetPtrReg(kSp), current_dest_offset, temp); 2691717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2692717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 2693717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov current_src_offset += bytes_to_move; 2694717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov current_dest_offset += bytes_to_move; 2695717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov count -= (bytes_to_move >> 2); 2696717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov } 2697717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov DCHECK_EQ(count, 0); 2698717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov return count; 2699717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov} 2700717a3e447c6f7a922cf9c3efe522747a187a045dSerguei Katkov 27017934ac288acfb2552bb0b06ec1f61e5820d924a4Brian Carlstrom} // namespace art 2702