1/**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19#ifndef __NOUVEAU_DRM_H__ 20#define __NOUVEAU_DRM_H__ 21#define DRM_NOUVEAU_EVENT_NVIF 0x80000000 22#define NOUVEAU_ABI16_CLIENT 0xffffffff 23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24#define NOUVEAU_ABI16_DEVICE 0xdddddddd 25#define NOUVEAU_ABI16_CHAN(n) (0xcccc0000 | (n)) 26#define NOUVEAU_GEM_DOMAIN_CPU (1 << 0) 27#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1) 28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29#define NOUVEAU_GEM_DOMAIN_GART (1 << 2) 30#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3) 31#define NOUVEAU_GEM_TILE_COMP 0x00030000 32#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00 33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34#define NOUVEAU_GEM_TILE_16BPP 0x00000001 35#define NOUVEAU_GEM_TILE_32BPP 0x00000002 36#define NOUVEAU_GEM_TILE_ZETA 0x00000004 37#define NOUVEAU_GEM_TILE_NONCONTIG 0x00000008 38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39struct drm_nouveau_gem_info { 40 uint32_t handle; 41 uint32_t domain; 42 uint64_t size; 43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 uint64_t offset; 45 uint64_t map_handle; 46 uint32_t tile_mode; 47 uint32_t tile_flags; 48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49}; 50struct drm_nouveau_gem_new { 51 struct drm_nouveau_gem_info info; 52 uint32_t channel_hint; 53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 uint32_t align; 55}; 56#define NOUVEAU_GEM_MAX_BUFFERS 1024 57struct drm_nouveau_gem_pushbuf_bo_presumed { 58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 uint32_t valid; 60 uint32_t domain; 61 uint64_t offset; 62}; 63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64struct drm_nouveau_gem_pushbuf_bo { 65 uint64_t user_priv; 66 uint32_t handle; 67 uint32_t read_domains; 68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 uint32_t write_domains; 70 uint32_t valid_domains; 71 struct drm_nouveau_gem_pushbuf_bo_presumed presumed; 72}; 73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74#define NOUVEAU_GEM_RELOC_LOW (1 << 0) 75#define NOUVEAU_GEM_RELOC_HIGH (1 << 1) 76#define NOUVEAU_GEM_RELOC_OR (1 << 2) 77#define NOUVEAU_GEM_MAX_RELOCS 1024 78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79struct drm_nouveau_gem_pushbuf_reloc { 80 uint32_t reloc_bo_index; 81 uint32_t reloc_bo_offset; 82 uint32_t bo_index; 83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 uint32_t flags; 85 uint32_t data; 86 uint32_t vor; 87 uint32_t tor; 88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89}; 90#define NOUVEAU_GEM_MAX_PUSH 512 91struct drm_nouveau_gem_pushbuf_push { 92 uint32_t bo_index; 93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 uint32_t pad; 95 uint64_t offset; 96 uint64_t length; 97}; 98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99struct drm_nouveau_gem_pushbuf { 100 uint32_t channel; 101 uint32_t nr_buffers; 102 uint64_t buffers; 103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 uint32_t nr_relocs; 105 uint32_t nr_push; 106 uint64_t relocs; 107 uint64_t push; 108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 uint32_t suffix0; 110 uint32_t suffix1; 111 uint64_t vram_available; 112 uint64_t gart_available; 113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114}; 115#define NOUVEAU_GEM_CPU_PREP_NOWAIT 0x00000001 116#define NOUVEAU_GEM_CPU_PREP_WRITE 0x00000004 117struct drm_nouveau_gem_cpu_prep { 118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 uint32_t handle; 120 uint32_t flags; 121}; 122struct drm_nouveau_gem_cpu_fini { 123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 uint32_t handle; 125}; 126#define DRM_NOUVEAU_GETPARAM 0x00 127#define DRM_NOUVEAU_SETPARAM 0x01 128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129#define DRM_NOUVEAU_CHANNEL_ALLOC 0x02 130#define DRM_NOUVEAU_CHANNEL_FREE 0x03 131#define DRM_NOUVEAU_GROBJ_ALLOC 0x04 132#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x05 133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134#define DRM_NOUVEAU_GPUOBJ_FREE 0x06 135#define DRM_NOUVEAU_NVIF 0x07 136#define DRM_NOUVEAU_GEM_NEW 0x40 137#define DRM_NOUVEAU_GEM_PUSHBUF 0x41 138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139#define DRM_NOUVEAU_GEM_CPU_PREP 0x42 140#define DRM_NOUVEAU_GEM_CPU_FINI 0x43 141#define DRM_NOUVEAU_GEM_INFO 0x44 142#define DRM_IOCTL_NOUVEAU_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_gem_new) 143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144#define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_PUSHBUF, struct drm_nouveau_gem_pushbuf) 145#define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_PREP, struct drm_nouveau_gem_cpu_prep) 146#define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_FINI, struct drm_nouveau_gem_cpu_fini) 147#define DRM_IOCTL_NOUVEAU_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_INFO, struct drm_nouveau_gem_info) 148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149#endif 150