Cross Reference: /external/llvm/lib/Target/ARM/A15SDOptimizer.cpp

Lines Matching refs:MI
64     bool runOnInstruction(MachineInstr *MI);
104     bool hasPartialWrite(MachineInstr *MI);
105     SmallVector<unsigned, 8> getReadDPRs(MachineInstr *MI);
112     MachineInstr *elideCopies(MachineInstr *MI);
113     void elideCopiesAndPHIs(MachineInstr *MI,
119     unsigned optimizeAllLanesPattern(MachineInstr *MI, unsigned Reg);
120     unsigned optimizeSDPattern(MachineInstr *MI);
126     void eraseInstrWithNoUses(MachineInstr *MI);
163   MachineInstr *MI = MRI->getVRegDef(SReg);
164   if (!MI) return ARM::ssub_0;
165   MachineOperand *MO = MI->findRegisterDefOperand(SReg);
170   if (MI->isCopy() && usesRegClass(MI->getOperand(1),
172     SReg = MI->getOperand(1).getReg();
182 // MI is known to be dead. Figure out what instructions
184 void A15SDOptimizer::eraseInstrWithNoUses(MachineInstr *MI) {
186   DeadInstr.insert(MI);
188   DEBUG(dbgs() << "Deleting base instruction " << *MI << "\n");
189   Front.push_back(MI);
192     MI = Front.back();
195     // MI is already known to be dead. We need to see
197     for (unsigned int i = 0; i < MI->getNumOperands(); ++i) {
198       MachineOperand &MO = MI->getOperand(i);
204       MachineOperand *Op = MI->findRegisterDefOperand(Reg);
252 unsigned A15SDOptimizer::optimizeSDPattern(MachineInstr *MI) {
253   if (MI->isCopy()) {
254     return optimizeAllLanesPattern(MI, MI->getOperand(1).getReg());
257   if (MI->isInsertSubreg()) {
258     unsigned DPRReg = MI->getOperand(1).getReg();
259     unsigned SPRReg = MI->getOperand(2).getReg();
262       MachineInstr *DPRMI = MRI->getVRegDef(MI->getOperand(1).getReg());
263       MachineInstr *SPRMI = MRI->getVRegDef(MI->getOperand(2).getReg());
282               MRI->getRegClass(MI->getOperand(1).getReg());
286               eraseInstrWithNoUses(MI);
291           return optimizeAllLanesPattern(MI, MI->getOperand(2).getReg());
295     return optimizeAllLanesPattern(MI, MI->getOperand(0).getReg());
298   if (MI->isRegSequence() && usesRegClass(MI->getOperand(1),
305     for (unsigned I = 1; I < MI->getNumExplicitOperands(); ++I) {
306       if (!MI->getOperand(I).isReg())
309       unsigned OpReg = MI->getOperand(I).getReg();
320         NonImplicitReg = MI->getOperand(I).getReg();
324       return optimizeAllLanesPattern(MI, NonImplicitReg);
326       return optimizeAllLanesPattern(MI, MI->getOperand(0).getReg());
334 bool A15SDOptimizer::hasPartialWrite(MachineInstr *MI) {
337   if (MI->isCopy() && usesRegClass(MI->getOperand(1), &ARM::SPRRegClass))
340   if (MI->isInsertSubreg() && usesRegClass(MI->getOperand(2),
344   if (MI->isRegSequence() && usesRegClass(MI->getOperand(1), &ARM::SPRRegClass))
351 // operand for MI.
352 MachineInstr *A15SDOptimizer::elideCopies(MachineInstr *MI) {
353   if (!MI->isFullCopy())
354     return MI;
355   if (!TRI->isVirtualRegister(MI->getOperand(1).getReg()))
357   MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg());
364 // that can produce MI.
365 void A15SDOptimizer::elideCopiesAndPHIs(MachineInstr *MI,
371    Front.push_back(MI);
373      MI = Front.back();
377      if (Reached.find(MI) != Reached.end())
379      Reached.insert(MI);
380      if (MI->isPHI()) {
381        for (unsigned I = 1, E = MI->getNumOperands(); I != E; I += 2) {
382          unsigned Reg = MI->getOperand(I).getReg();
391      } else if (MI->isFullCopy()) {
392        if (!TRI->isVirtualRegister(MI->getOperand(1).getReg()))
394        MachineInstr *NewMI = MRI->getVRegDef(MI->getOperand(1).getReg());
399        DEBUG(dbgs() << "Found partial copy" << *MI <<"\n");
400        Outs.push_back(MI);
407 SmallVector<unsigned, 8> A15SDOptimizer::getReadDPRs(MachineInstr *MI) {
408   if (MI->isCopyLike() || MI->isInsertSubreg() || MI->isRegSequence() ||
409       MI->isKill())
413   for (unsigned i = 0; i < MI->getNumOperands(); ++i) {
414     MachineOperand &MO = MI->getOperand(i);
533 A15SDOptimizer::optimizeAllLanesPattern(MachineInstr *MI, unsigned Reg) {
534   MachineBasicBlock::iterator InsertPt(MI);
535   DebugLoc DL = MI->getDebugLoc();
536   MachineBasicBlock &MBB = *MI->getParent();
577     bool UsesQPR = usesRegClass(MI->getOperand(0), &ARM::QPRRegClass) ||
578                    usesRegClass(MI->getOperand(0), &ARM::DPairRegClass);
583     eraseInstrWithNoUses(MI);
588 bool A15SDOptimizer::runOnInstruction(MachineInstr *MI) {
619   SmallVector<unsigned, 8> Defs = getReadDPRs(MI);
639       MachineInstr *MI = *II;
643       if (Replacements.find(MI) != Replacements.end())
647       if (!hasPartialWrite(MI))
650       // Collect all the uses of this MI's DPR def for updating later.
652       unsigned DPRDefReg = MI->getOperand(0).getReg();
658       unsigned NewReg = optimizeSDPattern(MI);
677       Replacements[MI] = NewReg;
702     for (MachineBasicBlock::iterator MI = MFI->begin(), ME = MFI->end();
703       MI != ME;) {
704       Modified |= runOnInstruction(MI++);