Lines Matching refs:State

30                           CCState &State, bool CanFail) {
34 if (unsigned Reg = State.AllocateReg(RegList))
35 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
42 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
43 State.AllocateStack(8, 4),
49 if (unsigned Reg = State.AllocateReg(RegList))
50 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
52 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
53 State.AllocateStack(4, 4),
61 CCState &State) {
62 if (!f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, true))
65 !f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, false))
73 CCState &State, bool CanFail) {
79 unsigned Reg = State.AllocateReg(HiRegList, ShadowRegList);
83 Reg = State.AllocateReg(GPRArgRegs);
91 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
92 State.AllocateStack(8, 8),
102 unsigned T = State.AllocateReg(LoRegList[i]);
106 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
107 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i],
115 CCState &State) {
116 if (!f64AssignAAPCS(ValNo, ValVT, LocVT, LocInfo, State, true))
119 !f64AssignAAPCS(ValNo, ValVT, LocVT, LocInfo, State, false))
125 CCValAssign::LocInfo &LocInfo, CCState &State) {
129 unsigned Reg = State.AllocateReg(HiRegList, LoRegList);
138 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
139 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, LoRegList[i],
147 CCState &State) {
148 if (!f64RetAssign(ValNo, ValVT, LocVT, LocInfo, State))
150 if (LocVT == MVT::v2f64 && !f64RetAssign(ValNo, ValVT, LocVT, LocInfo, State))
158 CCState &State) {
160 State);
183 CCState &State) {
184 SmallVectorImpl<CCValAssign> &PendingMembers = State.getPendingLocs();
208 unsigned RegIdx = State.getFirstUnallocated(RegList);
214 State.AllocateReg(RegList[RegIdx++]);
232 unsigned RegResult = State.AllocateRegBlock(RegList, PendingMembers.size());
237 State.addLoc(*It);
246 if (LocVT == MVT::i32 && State.getNextStackOffset() == 0) {
249 unsigned RegIdx = State.getFirstUnallocated(RegList);
252 It.convertToMem(State.AllocateStack(Size, Size));
254 It.convertToReg(State.AllocateReg(RegList[RegIdx++]));
256 State.addLoc(It);
265 State.AllocateReg(Reg);
268 It.convertToMem(State.AllocateStack(Size, Align));
269 State.addLoc(It);