Lines Matching refs:V0
135 unsigned V0, V1, GlobalBaseReg = MipsFI->getGlobalBaseReg();
140 V0 = RegInfo.createVirtualRegister(RC);
151 BuildMI(MBB, I, DL, TII.get(Mips::LUi64), V0)
153 BuildMI(MBB, I, DL, TII.get(Mips::DADDu), V1).addReg(V0)
165 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
167 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0)
180 BuildMI(MBB, I, DL, TII.get(Mips::LUi), V0)
182 BuildMI(MBB, I, DL, TII.get(Mips::ADDu), V1).addReg(V0).addReg(Mips::T9);
204 // Register $2 (Mips::V0) is added to the list of live-in registers to ensure
207 MF.getRegInfo().addLiveIn(Mips::V0);
208 MBB.addLiveIn(Mips::V0);
210 .addReg(Mips::V0).addReg(Mips::T9);