Lines Matching defs:KnownZero

69   APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0);
72 Value *V = SimplifyDemandedUseBits(&Inst, DemandedMask, KnownZero, KnownOne,
84 APInt &KnownZero, APInt &KnownOne,
87 SimplifyDemandedUseBits(U.get(), DemandedMask, KnownZero, KnownOne, Depth,
102 /// to be one in the expression. KnownZero contains all the bits that are known
105 /// the expression. KnownOne and KnownZero always follow the invariant that
106 /// KnownOne & KnownZero == 0. That is, a bit can't be both 1 and 0. Note that
107 /// the bits in KnownOne and KnownZero may only be accurate for those bits set
108 /// in DemandedMask. Note also that the bitwidth of V, DemandedMask, KnownZero
117 APInt &KnownZero, APInt &KnownOne,
126 KnownZero.getBitWidth() == BitWidth &&
128 "Value *V, DemandedMask, KnownZero and KnownOne "
133 KnownZero = ~KnownOne & DemandedMask;
139 KnownZero = DemandedMask;
143 KnownZero.clearAllBits();
159 computeKnownBits(V, KnownZero, KnownOne, Depth, CxtI);
237 // Compute the KnownZero/KnownOne bits to simplify things downstream.
238 computeKnownBits(I, KnownZero, KnownOne, Depth, CxtI);
251 computeKnownBits(I, KnownZero, KnownOne, Depth, CxtI);
289 KnownZero = RHSKnownZero | LHSKnownZero;
330 KnownZero = RHSKnownZero & LHSKnownZero;
416 KnownZero= (RHSKnownZero & LHSKnownZero) | (RHSKnownOne & LHSKnownOne);
437 KnownZero = RHSKnownZero & LHSKnownZero;
442 KnownZero = KnownZero.zext(truncBf);
444 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMask, KnownZero,
448 KnownZero = KnownZero.trunc(BitWidth);
450 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
470 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMask, KnownZero,
473 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
480 KnownZero = KnownZero.trunc(SrcBitWidth);
482 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMask, KnownZero,
486 KnownZero = KnownZero.zext(BitWidth);
488 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
490 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth);
507 KnownZero = KnownZero.trunc(SrcBitWidth);
509 if (SimplifyDemandedBits(I->getOperandUse(0), InputDemandedBits, KnownZero,
513 KnownZero = KnownZero.zext(BitWidth);
515 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
522 if (KnownZero[SrcBitWidth-1] || (NewBits & ~DemandedMask) == NewBits) {
592 KnownZero = LHSKnownZero & ~RHSVal & ~CarryBits;
626 computeKnownBits(V, KnownZero, KnownOne, Depth, CxtI);
632 if ((I0 + 1).isPowerOf2() && (I0 | KnownZero).isAllOnesValue()) {
645 KnownZero, KnownOne);
661 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn, KnownZero,
664 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
665 KnownZero <<= ShiftAmt;
669 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
685 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn, KnownZero,
688 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
689 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
694 KnownZero |= HighBits; // high bits known zero.
730 if (SimplifyDemandedBits(I->getOperandUse(0), DemandedMaskIn, KnownZero,
733 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
736 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
746 if (BitWidth <= ShiftAmt || KnownZero[BitWidth-ShiftAmt-1] ||
776 KnownZero = LHSKnownZero & LowBits;
782 KnownZero |= ~LowBits;
789 assert(!(KnownZero & KnownOne) && "Bits known to be one AND zero?");
795 if (DemandedMask.isNegative() && KnownZero.isNonNegative()) {
801 KnownZero.setBit(KnownZero.getBitWidth() - 1);
816 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & DemandedMask;
856 KnownZero = APInt::getHighBitsSet(64, 32);
860 computeKnownBits(V, KnownZero, KnownOne, Depth, CxtI);
866 if ((DemandedMask & (KnownZero|KnownOne)) == DemandedMask)
889 Instruction *Shl, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne) {
906 KnownZero = APInt::getBitsSet(KnownZero.getBitWidth(), 0, ShlAmt-1);
907 KnownZero &= DemandedMask;