Lines Matching refs:shader

72 calc_addr(struct ureg_program *shader, struct ureg_dst addr[2],
88 ureg_MOV(shader, ureg_writemask(addr[0], wm_start), ureg_scalar(start, sw_start));
89 ureg_MOV(shader, ureg_writemask(addr[0], wm_tc), ureg_scalar(tc, sw_tc));
91 ureg_ADD(shader, ureg_writemask(addr[1], wm_start), ureg_scalar(start, sw_start), ureg_imm1f(shader, 1.0f / size));
92 ureg_MOV(shader, ureg_writemask(addr[1], wm_tc), ureg_scalar(tc, sw_tc));
96 increment_addr(struct ureg_program *shader, struct ureg_dst daddr[2],
108 ureg_MOV(shader, ureg_writemask(daddr[0], wm_start), saddr[0]);
109 ureg_ADD(shader, ureg_writemask(daddr[0], wm_tc), saddr[0], ureg_imm1f(shader, pos / size));
110 ureg_MOV(shader, ureg_writemask(daddr[1], wm_start), saddr[1]);
111 ureg_ADD(shader, ureg_writemask(daddr[1], wm_tc), saddr[1], ureg_imm1f(shader, pos / size));
115 fetch_four(struct ureg_program *shader, struct ureg_dst m[2], struct ureg_src addr[2],
118 ureg_TEX(shader, m[0], resource3d ? TGSI_TEXTURE_3D : TGSI_TEXTURE_2D, addr[0], sampler);
119 ureg_TEX(shader, m[1], resource3d ? TGSI_TEXTURE_3D : TGSI_TEXTURE_2D, addr[1], sampler);
123 matrix_mul(struct ureg_program *shader, struct ureg_dst dst, struct ureg_dst l[2], struct ureg_dst r[2])
127 tmp = ureg_DECL_temporary(shader);
133 ureg_DP4(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_src(l[0]), ureg_src(r[0]));
134 ureg_DP4(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(l[1]), ureg_src(r[1]));
135 ureg_ADD(shader, dst,
139 ureg_release_temporary(shader, tmp);
145 struct ureg_program *shader;
151 shader = ureg_create(TGSI_PROCESSOR_VERTEX);
152 if (!shader)
155 vpos = ureg_DECL_vs_input(shader, VS_I_VPOS);
157 t_tex = ureg_DECL_temporary(shader);
159 o_vpos = ureg_DECL_output(shader, TGSI_SEMANTIC_POSITION, VS_O_VPOS);
161 o_addr[0] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR0);
162 o_addr[1] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR1);
174 scale = ureg_imm2f(shader,
178 ureg_MAD(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_XY), vpos, scale, scale);
179 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
181 ureg_MUL(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_XY), vpos, scale);
182 calc_addr(shader, o_addr, ureg_src(t_tex), ureg_src(t_tex), false, false, idct->buffer_width / 4);
184 ureg_release_temporary(shader, t_tex);
186 ureg_END(shader);
188 return ureg_create_shader_and_destroy(shader, idct->pipe);
194 struct ureg_program *shader;
203 shader = ureg_create(TGSI_PROCESSOR_FRAGMENT);
204 if (!shader)
207 addr[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR0, TGSI_INTERPOLATE_LINEAR);
208 addr[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR1, TGSI_INTERPOLATE_LINEAR);
210 fragment = ureg_DECL_output(shader, TGSI_SEMANTIC_COLOR, 0);
213 m[i][0] = ureg_DECL_temporary(shader);
214 m[i][1] = ureg_DECL_temporary(shader);
218 increment_addr(shader, m[i], addr, false, false, i, idct->buffer_height);
225 fetch_four(shader, m[i], s_addr, ureg_DECL_sampler(shader, 0), false);
229 ureg_ADD(shader, m[0][0], ureg_src(m[0][0]), ureg_src(m[i][0]));
230 ureg_ADD(shader, m[0][1], ureg_src(m[0][1]), ureg_src(m[i][1]));
233 ureg_ADD(shader, m[0][0], ureg_src(m[0][0]), ureg_src(m[0][1]));
234 ureg_DP4(shader, m[0][0], ureg_abs(ureg_src(m[0][0])), ureg_imm1f(shader, 1 << 14));
236 ureg_MUL(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_abs(ureg_src(m[7][1])), ureg_imm1f(shader, 1 << 14));
237 ureg_FRC(shader, m[0][0], ureg_src(m[0][0]));
238 ureg_SGT(shader, m[0][0], ureg_imm1f(shader, 0.5f), ureg_abs(ureg_src(m[0][0])));
240 ureg_CMP(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_negate(ureg_src(m[0][0])),
241 ureg_imm1f(shader, 1.0f / (1 << 15)), ureg_imm1f(shader, -1.0f / (1 << 15)));
242 ureg_MUL(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_src(m[0][0]),
245 ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_XYZ), ureg_src(m[7][1]));
246 ureg_ADD(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_src(m[0][0]), ureg_src(m[7][1]));
249 ureg_release_temporary(shader, m[i][0]);
250 ureg_release_temporary(shader, m[i][1]);
253 ureg_END(shader);
255 return ureg_create_shader_and_destroy(shader, idct->pipe);
261 struct ureg_program *shader;
267 shader = ureg_create(TGSI_PROCESSOR_VERTEX);
268 if (!shader)
271 vrect = ureg_DECL_vs_input(shader, VS_I_RECT);
272 vpos = ureg_DECL_vs_input(shader, VS_I_VPOS);
274 t_tex = ureg_DECL_temporary(shader);
275 t_start = ureg_DECL_temporary(shader);
277 o_vpos = ureg_DECL_output(shader, TGSI_SEMANTIC_POSITION, VS_O_VPOS);
279 o_l_addr[0] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR0);
280 o_l_addr[1] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR1);
282 o_r_addr[0] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_R_ADDR0);
283 o_r_addr[1] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_R_ADDR1);
297 scale = ureg_imm2f(shader,
301 ureg_ADD(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_XY), vpos, vrect);
302 ureg_MUL(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_XY), ureg_src(t_tex), scale);
304 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_XY), ureg_src(t_tex));
305 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
307 ureg_MUL(shader, ureg_writemask(t_start, TGSI_WRITEMASK_XY), vpos, scale);
309 calc_addr(shader, o_l_addr, ureg_src(t_tex), ureg_src(t_start), false, false, idct->buffer_width / 4);
310 calc_addr(shader, o_r_addr, vrect, ureg_imm1f(shader, 0.0f), true, true, VL_BLOCK_WIDTH / 4);
312 ureg_release_temporary(shader, t_tex);
313 ureg_release_temporary(shader, t_start);
315 ureg_END(shader);
317 return ureg_create_shader_and_destroy(shader, idct->pipe);
323 struct ureg_program *shader;
332 shader = ureg_create(TGSI_PROCESSOR_FRAGMENT);
333 if (!shader)
338 l_addr[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR0, TGSI_INTERPOLATE_LINEAR);
339 l_addr[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR1, TGSI_INTERPOLATE_LINEAR);
341 r_addr[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_R_ADDR0, TGSI_INTERPOLATE_LINEAR);
342 r_addr[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_R_ADDR1, TGSI_INTERPOLATE_LINEAR);
345 fragment[i] = ureg_DECL_output(shader, TGSI_SEMANTIC_COLOR, i);
348 l[i][0] = ureg_DECL_temporary(shader);
349 l[i][1] = ureg_DECL_temporary(shader);
352 r[0] = ureg_DECL_temporary(shader);
353 r[1] = ureg_DECL_temporary(shader);
356 increment_addr(shader, l[i], l_addr, false, false, i - 2, idct->buffer_height);
363 fetch_four(shader, l[i], s_addr, ureg_DECL_sampler(shader, 0), false);
369 increment_addr(shader, r, r_addr, true, true, i - (signed)idct->nr_of_render_targets / 2, VL_BLOCK_HEIGHT);
373 fetch_four(shader, r, s_addr, ureg_DECL_sampler(shader, 1), false);
376 matrix_mul(shader, ureg_writemask(fragment[i], TGSI_WRITEMASK_X << j), l[j], r);
381 ureg_release_temporary(shader, l[i][0]);
382 ureg_release_temporary(shader, l[i][1]);
384 ureg_release_temporary(shader, r[0]);
385 ureg_release_temporary(shader, r[1]);
387 ureg_END(shader);
391 return ureg_create_shader_and_destroy(shader, idct->pipe);
395 vl_idct_stage2_vert_shader(struct vl_idct *idct, struct ureg_program *shader,
403 vrect = ureg_DECL_vs_input(shader, VS_I_RECT);
404 vpos = ureg_DECL_vs_input(shader, VS_I_VPOS);
406 t_start = ureg_DECL_temporary(shader);
410 o_l_addr[0] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, first_output + VS_O_L_ADDR0);
411 o_l_addr[1] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, first_output + VS_O_L_ADDR1);
413 o_r_addr[0] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, first_output + VS_O_R_ADDR0);
414 o_r_addr[1] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, first_output + VS_O_R_ADDR1);
416 scale = ureg_imm2f(shader,
420 ureg_MUL(shader, ureg_writemask(tex, TGSI_WRITEMASK_Z),
422 ureg_imm1f(shader, VL_BLOCK_WIDTH / idct->nr_of_render_targets));
423 ureg_MUL(shader, ureg_writemask(t_start, TGSI_WRITEMASK_XY), vpos, scale);
425 calc_addr(shader, o_l_addr, vrect, ureg_imm1f(shader, 0.0f), false, false, VL_BLOCK_WIDTH / 4);
426 calc_addr(shader, o_r_addr, ureg_src(tex), ureg_src(t_start), true, false, idct->buffer_height / 4);
428 ureg_MOV(shader, ureg_writemask(o_r_addr[0], TGSI_WRITEMASK_Z), ureg_src(tex));
429 ureg_MOV(shader, ureg_writemask(o_r_addr[1], TGSI_WRITEMASK_Z), ureg_src(tex));
433 vl_idct_stage2_frag_shader(struct vl_idct *idct, struct ureg_program *shader,
442 l_addr[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, first_input + VS_O_L_ADDR0, TGSI_INTERPOLATE_LINEAR);
443 l_addr[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, first_input + VS_O_L_ADDR1, TGSI_INTERPOLATE_LINEAR);
445 r_addr[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, first_input + VS_O_R_ADDR0, TGSI_INTERPOLATE_LINEAR);
446 r_addr[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, first_input + VS_O_R_ADDR1, TGSI_INTERPOLATE_LINEAR);
448 l[0] = ureg_DECL_temporary(shader);
449 l[1] = ureg_DECL_temporary(shader);
450 r[0] = ureg_DECL_temporary(shader);
451 r[1] = ureg_DECL_temporary(shader);
453 fetch_four(shader, l, l_addr, ureg_DECL_sampler(shader, 1), false);
454 fetch_four(shader, r, r_addr, ureg_DECL_sampler(shader, 0), true);
456 matrix_mul(shader, fragment, l, r);
458 ureg_release_temporary(shader, l[0]);
459 ureg_release_temporary(shader, l[1]);
460 ureg_release_temporary(shader, r[0]);
461 ureg_release_temporary(shader, r[1]);