Cross Reference: /external/v8/src/mips64/assembler-mips64.cc

Lines Matching refs:ft
878                                  FPURegister ft,
882   DCHECK(fd.is_valid() && fs.is_valid() && ft.is_valid());
883   Instr instr = opcode | fmt | (ft.code() << kFtShift) | (fs.code() << kFsShift)
891                                  FPURegister ft,
895   DCHECK(fd.is_valid() && fr.is_valid() && fs.is_valid() && ft.is_valid());
896   Instr instr = opcode | (fr.code() << kFrShift) | (ft.code() << kFtShift)
952                                   FPURegister ft,
954   DCHECK(rs.is_valid() && ft.is_valid() && (is_int16(j) || is_uint16(j)));
955   Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift)
2117     FPURegister ft, FPURegister fs, uint8_t sel) {
2122   Instr instr = COP1 | fmt << kRsShift | ft.code() << kFtShift |
2137     FPURegister ft, FPURegister fs) {
2142   Instr instr = COP1 | fmt << kRsShift | ft.code() << kFtShift |
2157     FPURegister ft, FPURegister fs) {
2162   Instr instr = COP1 | fmt << kRsShift | ft.code() << kFtShift |
2277 void Assembler::add_d(FPURegister fd, FPURegister fs, FPURegister ft) {
2278   GenInstrRegister(COP1, D, ft, fs, fd, ADD_D);
2282 void Assembler::sub_d(FPURegister fd, FPURegister fs, FPURegister ft) {
2283   GenInstrRegister(COP1, D, ft, fs, fd, SUB_D);
2287 void Assembler::mul_d(FPURegister fd, FPURegister fs, FPURegister ft) {
2288   GenInstrRegister(COP1, D, ft, fs, fd, MUL_D);
2293     FPURegister ft) {
2294   GenInstrRegister(COP1X, fr, ft, fs, fd, MADD_D);
2298 void Assembler::div_d(FPURegister fd, FPURegister fs, FPURegister ft) {
2299   GenInstrRegister(COP1, D, ft, fs, fd, DIV_D);
2429 void Assembler::min(SecondaryField fmt, FPURegister fd, FPURegister ft,
2433   GenInstrRegister(COP1, fmt, ft, fs, fd, MIN);
2437 void Assembler::mina(SecondaryField fmt, FPURegister fd, FPURegister ft,
2441   GenInstrRegister(COP1, fmt, ft, fs, fd, MINA);
2445 void Assembler::max(SecondaryField fmt, FPURegister fd, FPURegister ft,
2449   GenInstrRegister(COP1, fmt, ft, fs, fd, MAX);
2453 void Assembler::maxa(SecondaryField fmt, FPURegister fd, FPURegister ft,
2457   GenInstrRegister(COP1, fmt, ft, fs, fd, MAXA);
2495     FPURegister fd, FPURegister fs, FPURegister ft) {
2498   Instr instr = COP1 | fmt | ft.code() << kFtShift |
2504 void Assembler::bc1eqz(int16_t offset, FPURegister ft) {
2506   Instr instr = COP1 | BC1EQZ | ft.code() << kFtShift | (offset & kImm16Mask);
2511 void Assembler::bc1nez(int16_t offset, FPURegister ft) {
2513   Instr instr = COP1 | BC1NEZ | ft.code() << kFtShift | (offset & kImm16Mask);
2520     FPURegister fs, FPURegister ft, uint16_t cc) {
2524   Instr instr = COP1 | fmt | ft.code() << kFtShift | fs.code() << kFsShift