| /external/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.h | 41 /// FramePtr - X86 physical register used as frame ptr.
43 unsigned FramePtr; member in class:llvm::final
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| H A D | X86ISelLowering.cpp | 18924 unsigned FramePtr = RegInfo->getFrameRegister(*MF); local
18928 FramePtr, true, X86FI->getRestoreBasePointerOffset()) local
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| /external/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.cpp | 101 unsigned FramePtr)
107 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false);
127 .addReg(FramePtr);
145 .addReg(FramePtr);
169 unsigned FramePtr = SP::I6; local
172 FramePtr = SP::O6;
185 .addReg(FramePtr).addImm(0).addReg(SrcEvenReg);
186 replaceFI(MF, II, *StMI, dl, 0, Offset, FramePtr);
197 .addReg(FramePtr).addImm(0);
198 replaceFI(MF, II, *StMI, dl, 1, Offset, FramePtr);
96 replaceFI(MachineFunction &MF, MachineBasicBlock::iterator II, MachineInstr &MI, DebugLoc dl, unsigned FIOperandNum, int Offset, unsigned FramePtr) argument
[all...] |
| /external/llvm/lib/Target/ARM/ |
| H A D | Thumb1FrameLowering.cpp | 103 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
159 if (Reg == FramePtr)
239 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
245 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
252 nullptr, MRI->getDwarfRegNum(FramePtr, true)));
340 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
369 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
377 .addReg(FramePtr));
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| H A D | ARMAsmPrinter.cpp | 1052 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
1157 if (DstReg == FramePtr && FramePtr != ARM::SP)
1160 ATS.emitSetFP(FramePtr, ARM::SP, -Offset);
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| H A D | ARMExpandPseudoInsts.cpp | 869 unsigned FramePtr = RI.getFrameRegister(MF); local
875 FramePtr, -NumBytes, ARMCC::AL, 0, *TII);
878 FramePtr, -NumBytes, *TII, RI);
881 FramePtr, -NumBytes, ARMCC::AL, 0,
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| H A D | ARMFrameLowering.cpp | 300 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
359 if (Reg == FramePtr)
513 dl, TII, FramePtr, ARM::SP,
518 nullptr, MRI->getDwarfRegNum(FramePtr, true),
526 nullptr, MRI->getDwarfRegNum(FramePtr, true)));
748 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
784 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes,
796 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
806 .addReg(FramePtr).addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
810 .addReg(FramePtr));
1528 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
[all...] |
| H A D | ARMFastISel.cpp | 2493 unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); local
2494 unsigned SrcReg = FramePtr;
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| /external/llvm/lib/CodeGen/ |
| H A D | SjLjEHPrepare.cpp | 413 Value *FramePtr = Builder.CreateConstGEP2_32(doubleUnderJBufTy, JBufPtr, 0, 0, local
417 Builder.CreateStore(Val, FramePtr, /*isVolatile=*/true);
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 206 unsigned FramePtr) const {
239 if (HasFP && (FramePtr == Reg || Reg == AArch64::LR)) {
400 unsigned FramePtr = RegInfo->getFrameRegister(MF); local
469 unsigned Reg = RegInfo->getDwarfRegNum(FramePtr, true);
500 emitCalleeSavedFrameMoves(MBB, MBBI, FramePtr);
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| H A D | AArch64FastISel.cpp | 3335 unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); local
3338 TII.get(TargetOpcode::COPY), SrcReg).addReg(FramePtr);
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| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreFrameLowering.cpp | 35 static const unsigned FramePtr = XCore::R10; variable
152 FramePtr));
306 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0);
309 MRI->getDwarfRegNum(FramePtr, true));
378 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr);
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