Searched defs:info (Results 26 - 50 of 60) sorted by relevance

123

/art/compiler/dex/quick/x86/
H A Dcall_x86.cc344 int X86Mir2Lir::X86NextSDCallInsn(CompilationUnit* cu, CallInfo* info, argument
350 if (info->string_init_offset != 0) {
354 cg->NewLIR2(kX86Mov32RT, arg0_ref.GetReg(), info->string_init_offset);
H A Dfp_x86.cc605 bool X86Mir2Lir::GenInlinedSqrt(CallInfo* info) { argument
606 RegLocation rl_dest = InlineTargetWide(info); // double place for result
611 RegLocation rl_src = info->args[0];
619 bool X86Mir2Lir::GenInlinedAbsFloat(CallInfo* info) { argument
621 RegLocation rl_src = info->args[0];
624 RegLocation rl_dest = InlineTarget(info);
666 bool X86Mir2Lir::GenInlinedAbsDouble(CallInfo* info) { argument
667 RegLocation rl_src = info->args[0];
668 RegLocation rl_dest = InlineTargetWide(info);
731 bool X86Mir2Lir::GenInlinedMinMaxFP(CallInfo* info, boo argument
[all...]
/art/compiler/optimizing/
H A Dssa_liveness_analysis.cc31 static bool IsLoop(HLoopInformation* info) { argument
32 return info != nullptr;
H A Dnodes.cc202 HLoopInformation* info = successor->GetLoopInformation(); local
203 if (info->IsBackEdge(*block)) {
204 info->RemoveBackEdge(block);
205 info->AddBackEdge(new_block);
211 HLoopInformation* info = header->GetLoopInformation(); local
216 size_t number_of_incomings = header->GetPredecessors().Size() - info->NumberOfBackEdges();
224 if (!info->IsBackEdge(*predecessor)) {
233 if (info->IsBackEdge(*header->GetPredecessors().Get(0))) {
237 if (!info->IsBackEdge(*predecessor)) {
255 info
285 HLoopInformation* info = block->GetLoopInformation(); local
1317 HLoopInformation* info = at->GetLoopInformation(); local
1453 HLoopInformation* info = pre_header->GetLoopInformation(); local
[all...]
/art/compiler/dex/quick/arm/
H A Dcall_arm.cc623 int ArmMir2Lir::ArmNextSDCallInsn(CompilationUnit* cu, CallInfo* info, argument
629 if (info->string_init_offset != 0) {
633 cg->LoadRefDisp(rs_rARM_SELF, info->string_init_offset, arg0_ref, kNotVolatile);
H A Dtarget_arm.cc606 for (RegisterInfo* info : reg_pool_->sp_regs_) {
607 int sp_reg_num = info->GetReg().GetRegNum();
614 info->SetMaster(dp_reg_info);
616 DCHECK_EQ(info->StorageMask(), RegisterInfo::kLowSingleStorageMask);
619 info->SetStorageMask(RegisterInfo::kHighSingleStorageMask);
866 for (RegisterInfo* info : reg_pool_->dp_regs_) {
867 if (!info->IsTemp() && !info->InUse()) {
868 res = info->GetReg();
869 info
876 RegisterInfo* info = GetRegInfo(res); local
979 GenDalvikArgsBulkCopy(CallInfo* info, int first, int count) argument
[all...]
H A Dint_arm.cc765 bool ArmMir2Lir::GenInlinedMinMax(CallInfo* info, bool is_min, bool is_long) { argument
770 RegLocation rl_src1 = info->args[0];
771 RegLocation rl_src2 = info->args[1];
774 RegLocation rl_dest = InlineTarget(info);
785 bool ArmMir2Lir::GenInlinedPeek(CallInfo* info, OpSize size) { argument
786 RegLocation rl_src_address = info->args[0]; // long address
787 rl_src_address = NarrowRegLoc(rl_src_address); // ignore high half in info->args[1]
788 RegLocation rl_dest = InlineTarget(info);
810 bool ArmMir2Lir::GenInlinedPoke(CallInfo* info, OpSize size) { argument
811 RegLocation rl_src_address = info
830 GenInlinedCas(CallInfo* info, bool is_long, bool is_object) argument
994 GenInlinedArrayCopyCharArray(CallInfo* info) argument
[all...]
/art/compiler/dex/quick/arm64/
H A Dcall_arm64.cc457 int Arm64Mir2Lir::Arm64NextSDCallInsn(CompilationUnit* cu, CallInfo* info, argument
463 if (info->string_init_offset != 0) {
467 cg->LoadWordDisp(rs_xSELF, info->string_init_offset, arg0_ref);
H A Dutility_arm64.cc818 int info = 0; local
851 info = EncodeExtend(is_wide ? kA64Uxtx : kA64Uxtw, 0);
928 res = NewLIR4(alt_opcode | wide, r_dest.GetReg(), r_src1.GetReg(), r_scratch.GetReg(), info);
H A Dint_arm64.cc663 bool Arm64Mir2Lir::GenInlinedAbsInt(CallInfo* info) { argument
664 RegLocation rl_src = info->args[0];
666 RegLocation rl_dest = InlineTarget(info);
678 bool Arm64Mir2Lir::GenInlinedAbsLong(CallInfo* info) { argument
679 RegLocation rl_src = info->args[0];
681 RegLocation rl_dest = InlineTargetWide(info);
693 bool Arm64Mir2Lir::GenInlinedMinMax(CallInfo* info, bool is_min, bool is_long) { argument
695 RegLocation rl_src1 = info->args[0];
696 RegLocation rl_src2 = (is_long) ? info->args[2] : info
708 GenInlinedPeek(CallInfo* info, OpSize size) argument
724 GenInlinedPoke(CallInfo* info, OpSize size) argument
740 GenInlinedCas(CallInfo* info, bool is_long, bool is_object) argument
826 GenInlinedArrayCopyCharArray(CallInfo* info) argument
1783 GenInlinedReverseBits(CallInfo* info, OpSize size) argument
[all...]
/art/compiler/dex/quick/
H A Ddex_file_method_inliner.cc527 bool DexFileMethodInliner::GenIntrinsic(Mir2Lir* backend, CallInfo* info) { argument
531 auto it = inline_methods_.find(info->method_ref.dex_method_index);
537 if (kIntrinsicIsStatic[intrinsic.opcode] != (info->type == kStatic)) {
543 return backend->GenInlinedDoubleCvt(info);
545 return backend->GenInlinedFloatCvt(info);
547 return backend->GenInlinedReverseBytes(info, static_cast<OpSize>(intrinsic.d.data));
549 return backend->GenInlinedReverseBits(info, static_cast<OpSize>(intrinsic.d.data));
551 return backend->GenInlinedAbsInt(info);
553 return backend->GenInlinedAbsLong(info);
555 return backend->GenInlinedAbsFloat(info);
[all...]
H A Dcodegen_util.cc789 // in that the case we defer to the verifier to avoid using the compiler's conflicting info.)
1341 RegisterInfo* info = GetRegInfo(loc.reg); local
1342 RegisterInfo* info_new = info->FindMatchingView(RegisterInfo::k32SoloStorageMask);
1344 if (info->IsLive() && (info->SReg() == loc.s_reg_low)) {
1345 info->MarkDead();
H A Dgen_common.cc526 void Mir2Lir::GenFilledNewArray(CallInfo* info) { argument
527 size_t elems = info->num_arg_words;
528 int type_idx = info->index;
555 DCHECK(info->is_range); // Non-range insn can't encode more than 5 elems.
565 RegLocation loc = UpdateLoc(info->args[i]);
602 RegLocation rl_first = info->args[0];
634 if (info->args[i].ref) {
635 rl_arg = LoadValue(info->args[i], kRefReg);
640 rl_arg = LoadValue(info->args[i], kCoreReg);
650 if (elems != 0 && info
[all...]
H A Dgen_invoke.cc48 void Mir2Lir::AddIntrinsicSlowPath(CallInfo* info, LIR* branch, LIR* resume) { argument
71 AddSlowPath(new (arena_) IntrinsicSlowPathPath(this, info, branch, resume));
456 // We have already updated the arg location with promoted info
489 static void CommonCallCodeLoadThisIntoArg1(const CallInfo* info, Mir2Lir* cg) { argument
490 RegLocation rl_arg = info->args[0];
494 static void CommonCallCodeLoadClassIntoArg0(const CallInfo* info, Mir2Lir* cg) { argument
495 cg->GenNullCheck(cg->TargetReg(kArg1, kRef), info->opt_flags);
500 cg->MarkPossibleNullPointerException(info->opt_flags);
523 static int NextVCallInsn(CompilationUnit* cu, CallInfo* info, argument
535 CommonCallCodeLoadThisIntoArg1(info, c
569 NextInterfaceCallInsn(CompilationUnit* cu, CallInfo* info, int state, const MethodReference& target_method, uint32_t method_idx, uintptr_t, uintptr_t, InvokeType) argument
610 NextInvokeInsnSP(CompilationUnit* cu, CallInfo* info, QuickEntrypointEnum trampoline, int state, const MethodReference& target_method, uint32_t method_idx) argument
639 NextStaticCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, const MethodReference& target_method, uint32_t, uintptr_t, uintptr_t, InvokeType) argument
647 NextDirectCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, const MethodReference& target_method, uint32_t, uintptr_t, uintptr_t, InvokeType) argument
654 NextSuperCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, const MethodReference& target_method, uint32_t, uintptr_t, uintptr_t, InvokeType) argument
661 NextVCallInsnSP(CompilationUnit* cu, CallInfo* info, int state, const MethodReference& target_method, uint32_t, uintptr_t, uintptr_t, InvokeType) argument
668 NextInterfaceCallInsnWithAccessCheck(CompilationUnit* cu, CallInfo* info, int state, const MethodReference& target_method, uint32_t, uintptr_t, uintptr_t, InvokeType) argument
694 GenDalvikArgsFlushPromoted(CallInfo* info, int start) argument
737 GenDalvikArgsBulkCopy(CallInfo* info, int first, int count) argument
753 GenDalvikArgs(CallInfo* info, int call_state, LIR** pcrLabel, NextCallInsn next_call_insn, const MethodReference& target_method, uint32_t vtable_idx, uintptr_t direct_code, uintptr_t direct_method, InvokeType type, bool skip_this) argument
898 InlineTarget(CallInfo* info) argument
910 InlineTargetWide(CallInfo* info) argument
922 GenInlinedReferenceGetReferent(CallInfo* info) argument
989 GenInlinedCharAt(CallInfo* info) argument
1028 GenInlinedStringGetCharsNoCheck(CallInfo* info) argument
1082 GenInlinedStringIsEmptyOrLength(CallInfo* info, bool is_empty) argument
1114 GenInlinedStringFactoryNewStringFromBytes(CallInfo* info) argument
1134 GenInlinedStringFactoryNewStringFromChars(CallInfo* info) argument
1150 GenInlinedStringFactoryNewStringFromString(CallInfo* info) argument
1166 GenInlinedReverseBytes(CallInfo* info, OpSize size) argument
1206 GenInlinedAbsInt(CallInfo* info) argument
1224 GenInlinedAbsLong(CallInfo* info) argument
1269 GenInlinedReverseBits(CallInfo* info, OpSize size) argument
1275 GenInlinedMinMaxFP(CallInfo* info, bool is_min, bool is_double) argument
1281 GenInlinedCeil(CallInfo* info) argument
1286 GenInlinedFloor(CallInfo* info) argument
1291 GenInlinedRint(CallInfo* info) argument
1296 GenInlinedRound(CallInfo* info, bool is_double) argument
1301 GenInlinedFloatCvt(CallInfo* info) argument
1316 GenInlinedDoubleCvt(CallInfo* info) argument
1331 GenInlinedArrayCopyCharArray(CallInfo* info) argument
1341 GenInlinedIndexOf(CallInfo* info, bool zero_based) argument
1387 GenInlinedStringCompareTo(CallInfo* info) argument
1420 GenInlinedCurrentThread(CallInfo* info) argument
1441 GenInlinedUnsafeGet(CallInfo* info, bool is_long, bool is_object, bool is_volatile) argument
1486 GenInlinedUnsafePut(CallInfo* info, bool is_long, bool is_object, bool is_volatile, bool is_ordered) argument
1537 GenInvoke(CallInfo* info) argument
1549 GenInvokeNoInline(CallInfo* info) argument
[all...]
H A Dralloc_util.cc36 for (RegisterInfo* info : tempreg_info_) {
37 info->MarkFree();
84 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg)); local
85 m2l_->reginfo_map_[reg.GetReg()] = info;
86 core_regs_.push_back(info);
90 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg)); local
91 m2l_->reginfo_map_[reg.GetReg()] = info;
92 core64_regs_.push_back(info);
96 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg)); local
97 m2l_->reginfo_map_[reg.GetReg()] = info;
102 RegisterInfo* info = new (arena) RegisterInfo(reg, m2l_->GetRegMaskCommon(reg)); local
179 RegisterInfo* info = GetRegInfo(reg); local
198 ClobberAliases(RegisterInfo* info, uint32_t clobber_mask) argument
344 RegisterInfo* info = regs[next]; local
371 RegisterInfo* info = regs[next]; local
516 RegisterInfo* info = GetRegInfo(reg); local
646 RegisterInfo* info = nullptr; local
749 RegisterInfo* info = GetRegInfo(reg); local
761 RegisterInfo* info = GetRegInfo(reg); local
770 FlushSpecificReg(RegisterInfo* info) argument
830 RegisterInfo* info = GetRegInfo(reg); local
850 RegisterInfo* info = GetRegInfo(reg); local
857 RegisterInfo* info = GetRegInfo(reg); local
880 RegisterInfo* info = GetRegInfo(reg); local
888 RegisterInfo* info = GetRegInfo(reg); local
895 RegisterInfo* info = GetRegInfo(loc.reg.GetLow()); local
900 RegisterInfo* info = GetRegInfo(loc.reg); local
912 RegisterInfo* info = GetRegInfo(loc.reg.GetLow()); local
917 RegisterInfo* info = GetRegInfo(loc.reg); local
1000 RegisterInfo* info = GetRegInfo(reg); local
1034 RegisterInfo* info = GetRegInfo(reg); local
1201 const MirMethodLoweringInfo& info = mir_graph_->GetMethodLoweringInfo(mir); local
[all...]
/art/compiler/dex/quick/mips/
H A Dcall_mips.cc418 static int NextSDCallInsn(CompilationUnit* cu, CallInfo* info, int state, argument
422 if (info->string_init_offset != 0) {
426 cg->LoadWordDisp(cg->TargetPtrReg(kSelf), info->string_init_offset, arg0_ref);
H A Dint_mips.cc344 bool MipsMir2Lir::GenInlinedCas(CallInfo* info, bool is_long, bool is_object) { argument
345 UNUSED(info, is_long, is_object);
349 bool MipsMir2Lir::GenInlinedAbsFloat(CallInfo* info) { argument
350 UNUSED(info);
355 bool MipsMir2Lir::GenInlinedAbsDouble(CallInfo* info) { argument
356 UNUSED(info);
361 bool MipsMir2Lir::GenInlinedSqrt(CallInfo* info) { argument
362 UNUSED(info);
366 bool MipsMir2Lir::GenInlinedPeek(CallInfo* info, OpSize size) { argument
371 RegLocation rl_src_address = info
389 GenInlinedPoke(CallInfo* info, OpSize size) argument
[all...]
/art/runtime/gc/space/
H A Dlarge_object_space.cc250 // allocation info pointer.
255 // Return the number of pages that the allocation info covers.
282 // Finds and returns the next non free allocation info after ourself.
289 // Returns the previous free allocation info by using the prev_free_ member to figure out
291 // previous allocation info is free.
296 // Returns the address of the object associated with this allocation info.
326 size_t FreeListSpace::GetSlotIndexForAllocationInfo(const AllocationInfo* info) const {
327 DCHECK_GE(info, allocation_info_);
328 DCHECK_LT(info, reinterpret_cast<AllocationInfo*>(allocation_info_map_->End()));
329 return info
396 RemoveFreePrev(AllocationInfo* info) argument
409 AllocationInfo* info = GetAllocationInfoForAddress(reinterpret_cast<uintptr_t>(obj)); local
465 AllocationInfo* info = GetAllocationInfoForAddress(reinterpret_cast<uintptr_t>(obj)); local
485 AllocationInfo* info = *it; local
559 const AllocationInfo* info = GetAllocationInfoForAddress(reinterpret_cast<uintptr_t>(obj)); local
[all...]
/art/compiler/dex/
H A Dgvn_dead_code_elimination.cc1374 const MirIFieldLoweringInfo& info = mir_graph_->GetIFieldLoweringInfo(mir); local
1376 !info.IsResolved() || !info.FastGet()) {
1379 } else if (info.IsVolatile()) {
1393 const MirIFieldLoweringInfo& info = mir_graph_->GetIFieldLoweringInfo(mir); local
1395 !info.IsResolved() || !info.FastPut()) {
1408 const MirSFieldLoweringInfo& info = mir_graph_->GetSFieldLoweringInfo(mir); local
1410 !info.IsResolved() || !info
1427 const MirSFieldLoweringInfo& info = mir_graph_->GetSFieldLoweringInfo(mir); local
[all...]
H A Dtype_inference.cc606 const MirFieldInfo& info = mir_graph->GetIFieldLoweringInfo(i); local
607 const DexFile* current_dex_file = info.IsResolved() ? info.DeclaringDexFile() : dex_file;
608 uint32_t field_idx = info.IsResolved() ? info.DeclaringFieldIndex() : info.FieldIndex();
610 DCHECK_EQ(info.MemAccessType() == kDexMemAccessWide, ifields[i].Wide());
611 DCHECK_EQ(info.MemAccessType() == kDexMemAccessObject, ifields[i].Ref());
657 const MirMethodInfo& info = mir_graph->GetMethodLoweringInfo(i); local
658 uint32_t method_idx = info
[all...]
/art/compiler/
H A Delf_builder.h59 const Section* link, Elf_Word info, Elf_Word align, Elf_Word entsize)
63 header_.sh_info = info;
163 const Section* link, Elf_Word info, Elf_Word align, Elf_Word entsize,
165 : Section(name, type, flags, link, info, align, entsize),
222 const Section* link, Elf_Word info, Elf_Word align,
224 : Section(name, type, flags, link, info, align, entsize),
58 Section(const std::string& name, Elf_Word type, Elf_Word flags, const Section* link, Elf_Word info, Elf_Word align, Elf_Word entsize) argument
162 RawSection(const std::string& name, Elf_Word type, Elf_Word flags, const Section* link, Elf_Word info, Elf_Word align, Elf_Word entsize, PatchFn patch = nullptr, const Section* patch_base_section = nullptr) argument
221 OatSection(const std::string& name, Elf_Word type, Elf_Word flags, const Section* link, Elf_Word info, Elf_Word align, Elf_Word entsize, Elf_Word size, CodeOutput* code_output) argument
/art/runtime/
H A Dprofiler.cc747 // Bad summary info. It should be count/nullcount/bootcount
759 std::vector<std::string> info; local
760 Split(line, '/', &info);
761 if (info.size() != 3 && info.size() != 4) {
765 std::string methodname = info[0];
766 uint32_t total_count = strtoul(info[1].c_str(), nullptr, 10);
767 uint32_t size = strtoul(info[2].c_str(), nullptr, 10);
769 if (type == kProfilerBoundedStack && info.size() == 4) {
771 std::string context_counts_str = info[
839 std::vector<std::string> info; local
[all...]
H A Dstack_map.h690 uint32_t GetDexPc(const CodeInfo& info) const;
692 void SetDexPc(const CodeInfo& info, uint32_t dex_pc);
694 uint32_t GetNativePcOffset(const CodeInfo& info) const;
696 void SetNativePcOffset(const CodeInfo& info, uint32_t native_pc_offset);
698 uint32_t GetDexRegisterMapOffset(const CodeInfo& info) const;
700 void SetDexRegisterMapOffset(const CodeInfo& info, uint32_t offset);
702 uint32_t GetInlineDescriptorOffset(const CodeInfo& info) const;
704 void SetInlineDescriptorOffset(const CodeInfo& info, uint32_t offset);
706 uint32_t GetRegisterMask(const CodeInfo& info) const;
708 void SetRegisterMask(const CodeInfo& info, uint32_
712 SetStackMask(const CodeInfo& info, const BitVector& sp_map) argument
[all...]
/art/runtime/gc/collector/
H A Dmark_sweep.cc391 LOG(INTERNAL_FATAL) << "Field info: "
527 void VisitRoot(mirror::Object* root, const RootInfo& info) OVERRIDE
529 CHECK(collector_->IsMarked(root)) << info.ToString();
537 const RootInfo& info ATTRIBUTE_UNUSED) {
544 const RootInfo& info ATTRIBUTE_UNUSED) {
552 void VisitRoot(mirror::Object* root, const RootInfo& info) OVERRIDE
559 LOG(INTERNAL_FATAL) << "Found invalid root: " << root << " " << info; local
1050 void VisitRoots(mirror::Object*** roots, size_t count, const RootInfo& info ATTRIBUTE_UNUSED)
1059 const RootInfo& info ATTRIBUTE_UNUSED)
/art/runtime/hprof/
H A Dhprof.cc1186 void Hprof::VisitRoot(mirror::Object* obj, const RootInfo& info) { argument
1204 CHECK_LT(info.GetType(), sizeof(xlate) / sizeof(HprofHeapTag));
1208 MarkRootObject(obj, 0, xlate[info.GetType()], info.GetThreadId());

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