Searched defs:is64bit (Results 1 - 15 of 15) sorted by relevance

/art/disassembler/
H A Ddisassembler_mips.h29 explicit DisassemblerMips(DisassemblerOptions* options, bool is64bit) : Disassembler(options), argument
30 is64bit_(is64bit),
/art/compiler/dwarf/
H A Ddwarf_test.cc35 const bool is64bit = false; local
125 WriteDebugFrameCIE(is64bit, DW_EH_PE_absptr, Reg(is64bit ? 16 : 8),
129 WriteDebugFrameFDE(is64bit, 0, 0x01000000, 0x01000000, opcodes.data(),
133 CheckObjdumpOutput(is64bit, "-W");
137 constexpr bool is64bit = true; local
139 WriteDebugFrameCIE(is64bit, DW_EH_PE_absptr, Reg(16),
144 WriteDebugFrameFDE(is64bit, 0, 0x0100000000000000, 0x0200000000000000,
149 CheckObjdumpOutput(is64bit, "-W");
155 constexpr bool is64bit local
188 const bool is64bit = false; local
246 const bool is64bit = false; local
283 constexpr bool is64bit = false; local
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H A Ddwarf_test.h120 std::vector<std::string> Objdump(bool is64bit, const char* args) { argument
121 if (is64bit) {
129 void CheckObjdumpOutput(bool is64bit, const char* args) { argument
130 std::vector<std::string> actual_lines = Objdump(is64bit, args);
H A Dheaders.h40 void WriteDebugFrameCIE(bool is64bit, argument
56 if (is64bit) {
72 writer.Pad(is64bit ? 8 : 4);
78 void WriteDebugFrameFDE(bool is64bit, size_t cie_offset, argument
96 if (is64bit) {
105 writer.Pad(is64bit ? 8 : 4);
/art/compiler/
H A Dcfi_test.h49 constexpr bool is64bit = false; local
51 dwarf::WriteDebugFrameCIE(is64bit, dwarf::DW_EH_PE_absptr, dwarf::Reg(8),
54 dwarf::WriteDebugFrameFDE(is64bit, 0, 0, actual_asm.size(), &actual_cfi,
H A Delf_writer_quick.cc162 const bool is64bit = Is64BitInstructionSet(isa); local
166 is64bit ? Patch<Elf_Addr, uint64_t, kPointerRelativeAddress> :
174 is64bit ? Patch<Elf_Addr, uint64_t, kAbsoluteAddress> :
H A Delf_writer_debug.cc39 bool is64bit = Is64BitInstructionSet(isa); local
62 WriteDebugFrameCIE(is64bit, addr_type, return_reg,
86 WriteDebugFrameCIE(is64bit, addr_type, return_reg,
103 WriteDebugFrameCIE(is64bit, addr_type, return_reg,
130 WriteDebugFrameCIE(is64bit, addr_type, return_reg,
157 WriteDebugFrameCIE(is64bit, addr_type, return_reg,
247 const bool is64bit = Is64BitInstructionSet(isa); local
285 DebugInfoEntryWriter<> info(is64bit, debug_abbrev);
330 DebugLineOpCodeWriter<> opcodes(is64bit, code_factor_bits_);
/art/compiler/dex/quick/mips/
H A Dutility_mips.cc306 bool is64bit = cu_->target64 && (r_dest.Is64Bit() || r_src1.Is64Bit() || r_src2.Is64Bit()); local
309 opcode = is64bit ? kMips64Daddu : kMipsAddu;
312 opcode = is64bit ? kMips64Dsubu : kMipsSubu;
327 opcode = is64bit ? kMips64Dsllv : kMipsSllv;
330 opcode = is64bit ? kMips64Dsrlv : kMipsSrlv;
333 opcode = is64bit ? kMips64Dsrav : kMipsSrav;
350 bool is64bit = cu_->target64 && (r_dest.Is64Bit() || r_src1.Is64Bit()); local
355 opcode = is64bit ? kMips64Daddiu : kMipsAddiu;
358 opcode = is64bit ? kMips64Daddu : kMipsAddu;
364 opcode = is64bit
574 bool is64bit = cu_->target64 && r_dest.Is64Bit(); local
705 bool is64bit = false; local
882 bool is64bit = false; local
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/art/compiler/dex/quick/x86/
H A Dutility_x86.cc649 bool is64bit = ((size == k64) || (size == kDouble)); local
718 true /* is_load */, is64bit);
721 true /* is_load */, is64bit);
798 bool is64bit = (size == k64) || (size == kDouble); local
883 false /* is_load */, is64bit);
886 false /* is_load */, is64bit);
/art/compiler/optimizing/
H A Dintrinsics_arm.cc156 static void MoveFPToInt(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) { argument
159 if (is64bit) {
168 static void MoveIntToFP(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) { argument
171 if (is64bit) {
224 static void MathAbsFP(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) { argument
228 if (is64bit) {
263 bool is64bit,
270 if (is64bit) {
262 GenAbsInteger(LocationSummary* locations, bool is64bit, ArmAssembler* assembler) argument
H A Dintrinsics_arm64.cc165 static void MoveFPToInt(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) { argument
168 __ Fmov(is64bit ? XRegisterFrom(output) : WRegisterFrom(output),
169 is64bit ? DRegisterFrom(input) : SRegisterFrom(input));
172 static void MoveIntToFP(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) { argument
175 __ Fmov(is64bit ? DRegisterFrom(output) : SRegisterFrom(output),
176 is64bit ? XRegisterFrom(input) : WRegisterFrom(input));
295 static void MathAbsFP(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) { argument
299 FPRegister in_reg = is64bit ? DRegisterFrom(in) : SRegisterFrom(in);
300 FPRegister out_reg = is64bit ? DRegisterFrom(out) : SRegisterFrom(out);
330 bool is64bit,
329 GenAbsInteger(LocationSummary* locations, bool is64bit, vixl::MacroAssembler* masm) argument
[all...]
H A Dintrinsics_x86.cc170 static void CreateFPToIntLocations(ArenaAllocator* arena, HInvoke* invoke, bool is64bit) { argument
176 if (is64bit) {
181 static void CreateIntToFPLocations(ArenaAllocator* arena, HInvoke* invoke, bool is64bit) { argument
187 if (is64bit) {
193 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { argument
196 if (is64bit) {
208 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { argument
211 if (is64bit) {
348 static void MathAbsFP(LocationSummary* locations, bool is64bit, X86Assembler* assembler) { argument
353 if (is64bit) {
[all...]
H A Dintrinsics_x86_64.cc177 static void MoveFPToInt(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { argument
180 __ movd(output.AsRegister<CpuRegister>(), input.AsFpuRegister<XmmRegister>(), is64bit);
183 static void MoveIntToFP(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { argument
186 __ movd(output.AsFpuRegister<XmmRegister>(), input.AsRegister<CpuRegister>(), is64bit);
289 bool is64bit,
301 if (is64bit) {
312 // if (is64bit) {
350 static void GenAbsInteger(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler) { argument
355 if (is64bit) {
288 MathAbsFP(LocationSummary* locations, bool is64bit, X86_64Assembler* assembler, CodeGeneratorX86_64* codegen) argument
/art/compiler/dex/quick/
H A Dcodegen_util.cc182 bool is64bit) {
190 lir->flags.alias_info = ENCODE_ALIAS_INFO(reg_id, is64bit);
181 AnnotateDalvikRegAccess(LIR* lir, int reg_id, bool is_load, bool is64bit) argument
/art/compiler/utils/x86_64/
H A Dassembler_x86_64.cc202 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { argument
204 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex());
415 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { argument
418 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex());
424 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { argument
427 EmitOptionalRex(false, is64bit, src.NeedsRex(), false, dst.NeedsRex());
650 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { argument
653 if (is64bit) {
665 void X86_64Assembler::cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit) { argument
668 if (is64bit) {
685 cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit) argument
700 cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit) argument
760 cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit) argument
780 cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit) argument
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