/external/clang/test/CXX/expr/ |
H A D | p9.cpp | 7 long double &ldr = ld0; variable
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/external/llvm/test/MC/AArch64/ |
H A D | arm64-diags.s | 8 ldr x3, (foo + 4) 9 ldr x3, [foo + 4] 10 ; CHECK: ldr x3, foo+4 ; encoding: [0bAAA00011,A,A,0x58] 20 ldr x0, [x0, #804] 21 ldr w0, [x0, #802] 22 ldr x0, [x0, #804]! 23 ldr w0, [w0, #301]! 24 ldr x0, [x0], #804 25 ldr w0, [w0], #301 37 ; CHECK-ERRORS: ldr x 79 ldr w1, [x3, w3, sxtw #4] label 80 ldr x1, [x3, w3, sxtw #4] label 81 ldr b1, [x3, w3, sxtw #4] label 82 ldr h1, [x3, w3, sxtw #4] label 83 ldr s1, [x3, w3, sxtw #4] label 84 ldr d1, [x3, w3, sxtw #4] label 85 ldr q1, [x3, w3, sxtw #1] label [all...] |
/external/vixl/src/vixl/a64/ |
H A D | assembler-a64.cc | 575 Instruction* ldr = GetOffsetAddress<Instruction*>(offset); local 576 VIXL_ASSERT(ldr->IsLoadLiteral()); 578 ptrdiff_t imm19 = ldr->ImmLLiteral(); 583 ldr->SetImmLLiteral(target); 1544 void Assembler::ldr(const CPURegister& rt, const MemOperand& src, function in class:vixl::Assembler 1649 void Assembler::ldr(const CPURegister& rt, RawLiteral* literal) { function in class:vixl::Assembler 1651 ldr(rt, LinkAndGetWordOffsetTo(literal)); 1660 void Assembler::ldr(const CPURegister& rt, int imm19) { function in class:vixl::Assembler
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/external/v8/src/arm/ |
H A D | assembler-arm.cc | 406 // ldr(r, MemOperand(sp, 4, PostIndex), al) instruction (aka pop(r)) 410 // ldr rd, [pc, #offset] 413 // ldr rd, [pp, #offset] 416 // ldr rd, [pp, rn] 449 // A mask for the Rd register for push, pop, ldr, str instructions. 687 // ldr<cond> <Rd>, [pc +/- offset_12]. 694 // ldr<cond> <Rd>, [pp +/- offset_12]. 701 // ldr<cond> <Rd>, [pp, +/- <Rm>]. 1156 ldr(rd, MemOperand(pp, target), cond); 1159 ldr(r 1882 void Assembler::ldr(Register dst, const MemOperand& src, Condition cond) { function in class:v8::internal::Assembler [all...] |
/external/v8/src/arm64/ |
H A D | assembler-arm64.cc | 356 // ldr xzr, #pool_size 369 // ldr xzr, #pool_size 399 // ldr xzr, #<size of the constant pool in 32-bit words> 522 // Instruction to patch must be 'ldr rd, [pc, #offset]' with offset == 0. 538 // Instruction to patch must be 'ldr rd, [pc, #offset]' with offset == 0. 893 // 0: ldr xzr, #<size of pool> 1690 void Assembler::ldr(const CPURegister& rt, const MemOperand& src) { function in class:v8::internal::Assembler 1707 // The pattern 'ldr xzr, #offset' is used to indicate the beginning of a 1714 void Assembler::ldr(const CPURegister& rt, const Immediate& imm) { function in class:v8::internal::Assembler
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/external/v8/src/mips64/ |
H A D | assembler-mips64.cc | 1940 void Assembler::ldr(Register rd, const MemOperand& rs) { function in class:v8::Assembler
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