Searched refs:x0 (Results 176 - 200 of 1378) sorted by relevance

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/external/opencv/otherlibs/highgui/
H A Dgrfmt_jpeg.cpp665 int x0 = src[5], x1 = src[3]; local
668 int x4 = x0 + x1; x0 -= x1;
673 x4 = (x0 + x2)*C1_847;
674 x0 = descale( x4 - x0*C2_613, fixb);
678 x0 -= x3;
679 x1 -= x0;
682 work[7] = x3; work[6] = x0;
687 x0
717 int x0 = work[8*5], x1 = work[8*3]; local
1522 int x0 = src[0], x1 = src[7]; local
1569 int x0 = work[8*0], x1 = work[8*7]; local
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/external/valgrind/none/tests/mips32/
H A DMIPS32int.c55 "li $" #RS ", 0x0\n\t" \
250 TESTINST3a("divu $t0, $t1", 0x0, 0x2, t0, t1);
254 TESTINST4("ext $t0, $t1, 0, 1", 0x0, 0x0, t0, t1, 0, 1);
255 TESTINST4("ext $t0, $t1, 0, 1", 0x0, 0xffffffff, t0, t1, 0, 1);
256 TESTINST4("ext $t0, $t1, 0, 1", 0x0, 0x98765432, t0, t1, 0, 1);
257 TESTINST4("ext $t0, $t1, 0, 1", 0x0, 0xff865421, t0, t1, 0, 1);
258 TESTINST4("ext $t0, $t1, 0, 1", 0xffffffff, 0x0, t0, t1, 0, 1);
262 TESTINST4("ext $t0, $t1, 0, 1", 0x98765432, 0x0, t0, t1, 0, 1);
266 TESTINST4("ext $t0, $t1, 0, 1", 0xff865421, 0x0, t
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/external/clang/test/CodeGen/
H A Ddecl.c112 typedef struct x2 *x0; typedef in typeref:struct:x2
113 typedef long (*x1)(x0 x0a, x5 x6);
117 long x3(x0 x0a, x5 a) {
/external/clang/test/Lexer/
H A Dcxx1y_digit_separators.cpp41 float k = 0x0'.0p0; // '; // expected-error {{expected ';'}}
42 float l = 0x0.'0p0; // expected-error {{digit separator cannot appear at start of digit sequence}}
43 float m = 0x0.0'p0; // expected-error {{digit separator cannot appear at end of digit sequence}}
44 float n = 0x0.0p'0; // expected-error {{digit separator cannot appear at start of digit sequence}}
45 float o = 0x0.0p0'ms; // expected-error {{digit separator cannot appear at end of digit sequence}}
/external/compiler-rt/test/builtins/Unit/
H A Ddivtf3_test.c48 UINT64_C(0x0)))
54 UINT64_C(0x0)))
60 UINT64_C(0x0)))
/external/compiler-rt/test/builtins/Unit/ppc/
H A Dqmul_test.c218 {0x1.00001ffffff00p-784, 0x1.fffff83ff8000p-839, 0x1.00ffc00ffff00p-771, 0x1.fe0007fffff00p-827, 0x0.0000000000000p+0, 0x0.0000000000000p+0},
219 {0x1.00001ffffff00p-784, 0x1.fffff83ff8000p-839, -0x1.00ffc00ffff00p-771, -0x1.fe0007fffff00p-827, -0x0.0000000000000p+0, -0x0.0000000000000p+0},
220 {-0x1.00001ffffff00p-784, -0x1.fffff83ff8000p-839, 0x1.00ffc00ffff00p-771, 0x1.fe0007fffff00p-827, -0x0.0000000000000p+0, -0x0.0000000000000p+0},
221 {-0x1.00001ffffff00p-784, -0x1.fffff83ff8000p-839, -0x1.00ffc00ffff00p-771, -0x1.fe0007fffff00p-827, 0x0.0000000000000p+0, 0x0.0000000000000p+0},
226 {0x1.0000000800000p-800, -0x1.0000000000000p-872, 0x1.000003fffc002p-916, -0x1.0000000000000p-1021, 0x0.0000000000000p+0, 0x0
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/external/kernel-headers/original/uapi/linux/
H A Dfirewire-constants.h29 #define TCODE_WRITE_QUADLET_REQUEST 0x0
58 #define RCODE_COMPLETE 0x0
71 #define SCODE_100 0x0
/external/libunwind/src/mips/
H A Doffsets.h18 # define LINUX_UC_FLAGS_OFF 0x0
28 # define LINUX_UC_FLAGS_OFF 0x0
38 # define LINUX_UC_FLAGS_OFF 0x0
/external/llvm/test/MC/ARM/
H A Delf-thumbfunc-reloc.s26 @CHECK-NEXT: 0x4 R_ARM_THM_CALL g 0x0
33 @CHECK-NEXT: 0x0 R_ARM_ABS32 f 0x0
H A Deh-compact-pr1.s71 @ CHECK: 0x0 R_ARM_PREL31 .TEST1 0x0
72 @ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0
73 @ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0
/external/skia/src/sfnt/
H A DSkOTUtils.cpp18 0x0,0x0, //SkOTTableGlyphData::numberOfContours
19 0x0,0x0, //SkOTTableGlyphData::xMin
20 0x0,0x0, //SkOTTableGlyphData::yMin
21 0x0,0x0, //SkOTTableGlyphData::xMax
22 0x0,0x0, //SkOTTableGlyphDat
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/external/v8/src/compiler/arm64/
H A Dlinkage-arm64.cc18 static Register ReturnValueReg() { return x0; }
23 static Register RuntimeCallArgCountReg() { return x0; }
29 static Register register_parameters[] = {x0, x1, x2, x3, x4, x5, x6, x7};
/external/vixl/examples/
H A Dcheck-bounds.cc35 // value -> x0
39 // First we compare 'value' with the 'low' bound. If x1 <= x0 the N flag will
41 __ Cmp(x0, x1);
43 // Now we will compare 'value' and 'high' (x0 and x2) but only if the 'pl'
46 __ Ccmp(x0, x2, CFlag, pl);
48 // We set x0 to 1 only if the 'ls' condition is satisfied.
51 // will fail and x0 will be set to 0.
52 // Otherwise if the previous comparison occurred, x0 will be set to 1
53 // only if x0 is less than or equal to x2.
54 __ Cset(x0, l
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/external/google-breakpad/src/common/android/
H A Dbreakpad_getcontext.S106 str xzr, [x0, MCONTEXT_GREGS_OFFSET + 0 * REGISTER_SIZE]
108 stp x18, x19, [x0, MCONTEXT_GREGS_OFFSET + 18 * REGISTER_SIZE]
109 stp x20, x21, [x0, MCONTEXT_GREGS_OFFSET + 20 * REGISTER_SIZE]
110 stp x22, x23, [x0, MCONTEXT_GREGS_OFFSET + 22 * REGISTER_SIZE]
111 stp x24, x25, [x0, MCONTEXT_GREGS_OFFSET + 24 * REGISTER_SIZE]
112 stp x26, x27, [x0, MCONTEXT_GREGS_OFFSET + 26 * REGISTER_SIZE]
113 stp x28, x29, [x0, MCONTEXT_GREGS_OFFSET + 28 * REGISTER_SIZE]
114 str x30, [x0, MCONTEXT_GREGS_OFFSET + 30 * REGISTER_SIZE]
119 already arranged to return the appropriate return value in x0
121 str x30, [x0, MCONTEXT_PC_OFFSE
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/external/libavc/encoder/
H A Dirc_rd_model.c126 float x0, y0; local
143 x0 = (float)(pi4_sad_h264[u1_frm_indx]
147 sum_x_y += x0 * y0;
148 sum_x2_y += x0 * x0 * y0;
149 sum_x += x0;
150 sum_x2 += x0 * x0;
151 sum_x3 += x0 * x0 * x
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/external/libmpeg2/common/
H A Div.h64 IV_SUCCESS = 0x0,
107 IV_I_FRAME = 0x0,
132 IV_TOP_FLD = 0x0,
141 IV_PROGRESSIVE = 0x0,
153 IV_CMD_GET_NUM_MEM_REC = 0x0,
/external/sonivox/arm-wt-22k/lib_src/
H A Ddls2.h116 DEFINE_DLSID(DLSID_SupportsDLS2, 0xf14599e5, 0x4689, 0x11d2, 0xaf, 0xa6, 0x0, 0xaa, 0x0, 0x24, 0xd8, 0xb6);
118 DEFINE_DLSID(DLSID_ManufacturersID, 0xb03e1181, 0x8095, 0x11d2, 0xa1, 0xef, 0x0, 0x60, 0x8, 0x33, 0xdb, 0xd8);
119 DEFINE_DLSID(DLSID_ProductID, 0xb03e1182, 0x8095, 0x11d2, 0xa1, 0xef, 0x0, 0x60, 0x8, 0x33, 0xdb, 0xd8);
120 DEFINE_DLSID(DLSID_SamplePlaybackRate, 0x2a91f713, 0xa4bf, 0x11d2, 0xbb, 0xdf, 0x0, 0x60, 0x8, 0x33, 0xdb, 0xd8);
/external/libavc/common/armv8/
H A Dih264_inter_pred_filters_luma_vert_av8.s90 // x0 => *pu1_src
112 sub x0, x0, x2, lsl #1 //pu1_src-2*src_strd
125 ld1 {v0.2s, v1.2s}, [x0], x2 // Vector load from src[0_0]
126 ld1 {v2.2s, v3.2s}, [x0], x2 // Vector load from src[1_0]
127 ld1 {v4.2s, v5.2s}, [x0], x2 // Vector load from src[2_0]
128 ld1 {v6.2s, v7.2s}, [x0], x2 // Vector load from src[3_0]
130 ld1 {v8.2s, v9.2s}, [x0], x2 // Vector load from src[4_0]
132 ld1 {v10.2s, v11.2s}, [x0], x2 // Vector load from src[5_0]
142 ld1 {v0.2s, v1.2s}, [x0], x
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/external/libhevc/decoder/arm64/
H A Dihevcd_itrans_recon_dc_chroma.s55 //x0:pu1_pred
116 mov x7,x0
127 add x0,x0,#16
169 add x0,x0,x2,lsl #3
171 sub x0,x0,x4,lsl #1
184 ld2 {v2.8b, v3.8b},[x0],x2
185 ld2 {v4.8b, v5.8b},[x0],x
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H A Dihevcd_itrans_recon_dc_luma.s55 //x0:pu1_pred
115 mov x7,x0
126 add x0,x0,#8
165 add x0,x0,x2,lsl #3
167 sub x0,x0,x4
180 ld1 {v2.8b},[x0],x2
181 ld1 {v3.8b},[x0],x
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/external/skia/src/utils/
H A DSkCullPoints.cpp18 bool SkCullPoints::sect_test(int x0, int y0, int x1, int y1) const { argument
21 if ((x0 < r.fLeft && x1 < r.fLeft) ||
22 (x0 > r.fRight && x1 > r.fRight) ||
29 if (r.contains(x0, y0) || r.contains(x1, y1)) {
37 vec.set(x1 - x0, y1 - y0);
38 bool isNeg = cross_product_is_neg(vec, x0 - rAsQuad[0].fX, y0 - rAsQuad[0].fY);
40 if (cross_product_is_neg(vec, x0 - rAsQuad[i].fX, y0 - rAsQuad[i].fY) != isNeg) {
82 int x0 = fPrevPt.fX; local
88 if (this->sect_test(x0, y0, x, y)) {
89 line[0].set(x0, y
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/external/llvm/test/MC/AArch64/
H A Darm64-memory.s213 ldr b5, [x0, #1]!
214 ldr h6, [x0, #2]!
215 ldr s7, [x0, #4]!
216 ldr d8, [x0, #8]!
217 ldr q9, [x0, #16]!
221 str b5, [x0, #-1]!
222 str h6, [x0, #-2]!
223 str s7, [x0, #-4]!
224 str d8, [x0, #-8]!
225 str q9, [x0, #
[all...]
/external/libavc/common/
H A Dih264_ihadamard_scaling.c96 WORD32 x0, x1, x2, x3, x4, x5, x6, x7; local
111 x0 = x4 + x7;
116 pi4_tmp_ptr[0] = x0 + x1;
118 pi4_tmp_ptr[2] = x0 - x1;
133 x0 = x4 + x7;
138 pi4_tmp_ptr[0] = x0 + x1;
140 pi4_tmp_ptr[8] = x0 - x1;
/external/valgrind/coregrind/m_dispatch/
H A Ddispatch-arm64-linux.S60 /* x0 holds two_words
66 maintains 16-alignment of sp. Also save x0 since it will
74 stp x0, xzr, [sp, #-16]!
117 /* Restore int regs, including importantly x0 (two_words),
119 ldp x0, xzr, [sp], #16
128 str x1, [x0, #0]
129 str x2, [x0, #8]
176 ldr x0, [x21, #OFFSET_arm64_PC]
186 // x0 = next guest, x1,x2,x3,x4 scratch
188 and x2, x1, x0, LS
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/external/valgrind/none/tests/mips64/
H A Dlogical_instructions.c32 TEST2("andi $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1);
36 TEST2("andi $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1);
45 TEST6("lui $a0, 0x0", 0x0, a0);
72 TEST2("ori $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1);
76 TEST2("ori $a0, $a1, 0x0", reg_val2[i], 0x0, a
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