Searched refs:GetLowReg (Results 1 - 12 of 12) sorted by relevance

/art/compiler/dex/quick/mips/
H A Dint_mips.cc72 NewLIR3(kMipsSltu, t0.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetLowReg());
73 NewLIR3(kMipsSltu, t1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetLowReg());
240 NewLIR2(kMipsMtc1, r_src.GetLowReg(), r_dest.GetLowReg());
244 NewLIR2(kMipsMtc1, r_src.GetLowReg(), r_dest.GetReg());
252 NewLIR2(kMipsMfc1, r_dest.GetLowReg(), r_src.GetLowReg());
256 NewLIR2(kMipsMfc1, r_dest.GetLowReg(), r_sr
[all...]
H A Dutility_mips.cc783 load = res = NewLIR3(opcode, r_dest.GetLowReg(), displacement + LOWORD_OFFSET,
810 load = NewLIR3(opcode, r_dest.GetLowReg(), LOWORD_OFFSET, r_tmp.GetReg());
954 store = res = NewLIR3(opcode, r_src.GetLowReg(), displacement + LOWORD_OFFSET,
976 store = NewLIR3(opcode, r_src.GetLowReg(), LOWORD_OFFSET, r_scratch.GetReg());
/art/compiler/dex/quick/x86/
H A Dint_x86.cc165 NewLIR2(kX86MovdxrRR, r_dest.GetReg(), r_src.GetLowReg());
178 NewLIR2(kX86MovdrxRR, r_dest.GetLowReg(), r_src.GetReg());
191 if (r_src.GetHighReg() == r_dest.GetLowReg() &&
192 r_src.GetLowReg() == r_dest.GetHighReg()) {
199 } else if (r_src.GetHighReg() == r_dest.GetLowReg()) {
918 (rl_src1.reg.GetLowReg() != rl_result.reg.GetHighReg()) &&
919 (rl_src1.reg.GetLowReg() != rl_result.reg.GetLowReg())) {
925 (rl_src1.reg.GetHighReg() != rl_result.reg.GetLowReg()) &&
1331 if (rl_i.reg.GetLowReg()
[all...]
H A Dutility_x86.cc260 int dest = r_dest.IsPair() ? r_dest.GetLowReg() : r_dest.GetReg();
311 int src = r_src.IsPair() ? r_src.GetLowReg() : r_src.GetReg();
570 int32_t low_reg_val = r_dest.IsPair() ? r_dest.GetLowReg() : r_dest.GetReg();
708 load2 = NewLIR3(opcode, r_dest.GetLowReg(), r_base.GetReg(), displacement + LOWORD_OFFSET);
710 load = NewLIR3(opcode, r_dest.GetLowReg(), r_base.GetReg(), displacement + LOWORD_OFFSET);
736 load2 = NewLIR5(opcode, r_dest.GetLowReg(), r_base.GetReg(), r_index.GetReg(), scale,
743 load2 = NewLIR5(opcode, r_dest.GetLowReg(), r_base.GetReg(), r_index.GetReg(), scale,
757 load = NewLIR5(opcode, r_dest.GetLowReg(), r_base.GetReg(), r_index.GetReg(), scale,
877 store = NewLIR3(opcode, r_base.GetReg(), displacement + LOWORD_OFFSET, r_src.GetLowReg());
896 displacement + LOWORD_OFFSET, r_src.GetLowReg());
[all...]
H A Dtarget_x86.cc523 DCHECK_EQ(res.reg.GetLowReg(), rs_rAX.GetReg());
933 << ", low: " << static_cast<int>(loc.reg.GetLowReg())
2061 NewLIR2(kX86MovdrxRR, temp_loc.reg.GetLowReg(), vector_src.GetReg());
2196 NewLIR2(kX86MovdrxRR, rl_result.reg.GetLowReg(), vector_src.GetReg());
2241 NewLIR2(kX86MovdxrRR, rs_dest.GetReg(), rs_src.GetLowReg());
/art/compiler/dex/quick/arm/
H A Dint_arm.cc467 NewLIR3(kThumb2Fmdrr, r_dest.GetReg(), r_src.GetLowReg(), r_src.GetHighReg());
471 NewLIR3(kThumb2Fmrrd, r_dest.GetLowReg(), r_dest.GetHighReg(), r_src.GetReg());
474 if (r_src.GetHighReg() != r_dest.GetLowReg()) {
477 } else if (r_src.GetLowReg() != r_dest.GetHighReg()) {
793 if (rl_address.reg.GetReg() != rl_result.reg.GetLowReg()) {
954 NewLIR4(kThumb2Strexd /* eq */, r_tmp.GetReg(), rl_new_value.reg.GetLowReg(), rl_new_value.reg.GetHighReg(), r_ptr.GetReg());
1160 NewLIR4(kThumb2OrrRRRs, t_reg.GetReg(), reg.GetLowReg(), reg.GetHighReg(), 0);
1230 if (rl_result.reg.GetLowReg() == rl_src.reg.GetHighReg()) {
1309 NewLIR3(kThumb2MulRRR, tmp1.GetReg(), rl_src1.reg.GetLowReg(), rl_src1.reg.GetHighReg());
1310 NewLIR4(kThumb2Umull, res_lo.GetReg(), res_hi.GetReg(), rl_src1.reg.GetLowReg(),
[all...]
H A Dutility_arm.cc737 r_dest.GetLowReg(), r_dest.GetHighReg(), rs_r15pc.GetReg(), 0, 0, data_target);
896 lir = NewLIR4(opcode, r_src_dest.GetLowReg(), r_src_dest.GetHighReg(), r_ptr.GetReg(),
1046 load = NewLIR3(kThumb2Ldrexd, r_dest.GetLowReg(), r_dest.GetHighReg(), r_ptr.GetReg());
1205 NewLIR4(kThumb2Strexd, r_temp.GetReg(), r_src.GetLowReg(), r_src.GetHighReg(), r_ptr.GetReg());
/art/compiler/dex/
H A Dreg_storage.h228 int GetLowReg() const { function in class:art::RegStorage
/art/compiler/dex/quick/
H A Dgen_invoke.cc1186 if (rl_i.reg.GetLowReg() == rl_result.reg.GetLowReg()) {
1193 if (rl_i.reg.GetLowReg() == rl_result.reg.GetLowReg()) {
1237 rl_result.reg.GetLowReg() == rl_src.reg.GetHighReg())) {
1239 if (rl_result.reg.GetLowReg() != rl_src.reg.GetLowReg() &&
1240 rl_result.reg.GetLowReg() != rl_src.reg.GetHighReg() &&
1241 rl_result.reg.GetHighReg() != rl_src.reg.GetLowReg() &&
H A Dmir_to_lir-inl.h263 RegisterInfo* res = reg.IsPair() ? reginfo_map_[reg.GetLowReg()] : reginfo_map_[reg.GetReg()];
H A Dgen_common.cc1463 if ((rl_result.reg.GetLowReg() == rl_src1.reg.GetHighReg()) || (rl_result.reg.GetLowReg() == rl_src2.reg.GetHighReg())) {
1970 if (rl_result.reg.GetLowReg() == rl_src2.reg.GetHighReg()) {
H A Dralloc_util.cc551 int free_low = rl_free.reg.GetLowReg();
553 int keep_low = rl_keep.reg.GetLowReg();

Completed in 8303 milliseconds