/external/llvm/lib/Target/Mips/ |
H A D | MipsFrameLowering.cpp | 142 int64_t Amount = I->getOperand(0).getImm(); local 144 Amount = -Amount; 146 STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I);
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H A D | Mips16InstrInfo.h | 78 /// Adjust SP by Amount bytes. 79 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, 91 static bool validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount); 114 // Adjust SP by Amount bytes where bytes can be up to 32bit number. 115 void adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, 119 // Adjust SP by Amount bytes where bytes can be up to 32bit number. 120 void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount,
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H A D | Mips16InstrInfo.cpp | 257 // Adjust SP by Amount bytes where bytes can be up to 32bit number. 262 void Mips16InstrInfo::adjustStackPtrBig(unsigned SP, int64_t Amount, argument 275 MIB1.addImm(Amount).addImm(-1); 287 unsigned SP, int64_t Amount, MachineBasicBlock &MBB, 292 /// Adjust SP by Amount bytes. 293 void Mips16InstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, argument 296 if (Amount == 0) 299 if (isInt<16>(Amount)) // need to change to addiu sp, ....and isInt<16> 300 BuildAddiuSpImm(MBB, I, Amount); 302 adjustStackPtrBigUnrestricted(SP, Amount, MB 286 adjustStackPtrBigUnrestricted( unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument 457 validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount) argument [all...] |
H A D | MipsSEInstrInfo.h | 69 /// Adjust SP by Amount bytes. 70 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
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H A D | MipsInstrInfo.h | 120 virtual void adjustStackPtr(unsigned SP, int64_t Amount,
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H A D | MipsSEInstrInfo.cpp | 358 /// Adjust SP by Amount bytes. 359 void MipsSEInstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, argument 367 if (Amount == 0) 370 if (isInt<16>(Amount))// addi sp, sp, amount 371 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount); 373 unsigned Reg = loadImmediate(Amount, MBB, I, DL, nullptr);
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/external/llvm/lib/Analysis/ |
H A D | BlockFrequencyInfoImpl.cpp | 101 void Distribution::add(const BlockNode &Node, uint64_t Amount, 103 assert(Amount && "invalid weight of 0"); 104 uint64_t NewTotal = Total + Amount; 115 Weights.push_back(Weight(Type, Node, Amount)); 120 if (!W.Amount) { 126 assert(OtherW.Amount && "Expected non-zero weight"); 127 if (W.Amount > W.Amount + OtherW.Amount) 129 W.Amount [all...] |
H A D | InstructionSimplify.cpp | 1268 /// isUndefShift - Returns true if a shift by \c Amount always yields undef. 1269 static bool isUndefShift(Value *Amount) { argument 1270 Constant *C = dyn_cast<Constant>(Amount);
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430FrameLowering.cpp | 239 uint64_t Amount = Old->getOperand(0).getImm(); local 240 if (Amount != 0) { 244 Amount = (Amount+StackAlign-1)/StackAlign*StackAlign; 250 .addReg(MSP430::SP).addImm(Amount); 255 Amount -= CalleeAmt; 256 if (Amount) 259 .addReg(MSP430::SP).addImm(Amount);
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_emulate_loops.c | 53 float Amount; member in struct:count_inst 167 count_inst->Amount += amount; 174 count_inst->Amount -= amount; 232 count_inst.Amount = 0.0f; 272 if(count_inst.Amount == 0.0f){ 275 DBG("Counter is increased by %f each iteration.\n", count_inst.Amount); 289 count_inst.Amount); 295 count_inst.Amount) + 1;
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/external/icu/icu4j/main/classes/core/src/com/ibm/icu/text/ |
H A D | CompactDecimalFormat.java | 236 Amount amount = toAmount(number, currencyUnit); 260 Amount amount = toAmount(number.doubleValue(), null); 322 private Amount toAmount(double number, Output<Unit> currencyUnit) { 339 return new Amount( 453 private static class Amount { class in class:CompactDecimalFormat 457 public Amount(double qty, Unit unit) { method in class:CompactDecimalFormat.Amount
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/external/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.h | 88 uint64_t Amount) const;
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H A D | X86FrameLowering.cpp | 1987 uint64_t Amount = !reserveCallFrame ? I->getOperand(0).getImm() : 0; 1988 uint64_t InternalAmt = (isDestroy || Amount) ? I->getOperand(1).getImm() : 0; 1995 if (Amount == 0) 2002 Amount = RoundUpToAlignment(Amount, StackAlign); 2008 Amount -= InternalAmt; 2010 if (Amount) { 2012 New = BuildMI(MF, DL, TII.get(getSUBriOpcode(IsLP64, Amount)), StackPtr) 2013 .addReg(StackPtr).addImm(Amount); 2017 unsigned Opc = getADDriOpcode(IsLP64, Amount); [all...] |
/external/llvm/include/llvm/Analysis/ |
H A D | BlockFrequencyInfoImpl.h | 323 uint64_t Amount; member in struct:llvm::BlockFrequencyInfoImplBase::Weight 324 Weight() : Type(Local), Amount(0) {} 325 Weight(DistType Type, BlockNode TargetNode, uint64_t Amount) argument 326 : Type(Type), TargetNode(TargetNode), Amount(Amount) {} 344 void addLocal(const BlockNode &Node, uint64_t Amount) { argument 345 add(Node, Amount, Weight::Local); 347 void addExit(const BlockNode &Node, uint64_t Amount) { argument 348 add(Node, Amount, Weight::Exit); 350 void addBackedge(const BlockNode &Node, uint64_t Amount) { argument [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 486 uint64_t Amount = Old->getOperand(0).getImm(); local 487 if (Amount != 0) { 492 Amount = (Amount+Align-1)/Align*Align; 494 assert(Amount%4 == 0); 495 Amount /= 4; 497 bool isU6 = isImmU6(Amount); 498 if (!isU6 && !isImmU16(Amount)) { 502 << Amount << "\n"; 511 .addImm(Amount); [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | Thumb1FrameLowering.cpp | 64 unsigned Amount = Old->getOperand(0).getImm(); local 65 if (Amount != 0) { 70 Amount = (Amount+Align-1)/Align*Align; 75 emitSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount); 78 emitSPUpdate(MBB, I, TII, dl, *RegInfo, Amount);
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H A D | ARMFrameLowering.cpp | 1772 unsigned Amount = Old->getOperand(0).getImm(); local 1773 if (Amount != 0) { 1778 Amount = (Amount+Align-1)/Align*Align; 1793 emitSPUpdate(isARM, MBB, I, dl, TII, -Amount, MachineInstr::NoFlags, 1799 emitSPUpdate(isARM, MBB, I, dl, TII, Amount, MachineInstr::NoFlags,
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FrameLowering.cpp | 172 int64_t Amount = I->getOperand(0).getImm(); local 173 Amount = RoundUpToAlignment(Amount, Align); 175 Amount = -Amount; 191 assert(Amount > -0xffffff && Amount < 0xffffff && "call frame too large"); 192 emitFrameOffset(MBB, I, DL, AArch64::SP, AArch64::SP, Amount, TII);
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.h | 59 template <int Amount> 62 printPostIncOperand(MI, OpNo, Amount, O);
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/external/llvm/lib/Target/AArch64/AsmParser/ |
H A D | AArch64AsmParser.cpp | 231 unsigned Amount; member in struct:__anon10651::AArch64Operand::ShiftExtendOp 406 return ShiftExtend.Amount; 1668 Op->ShiftExtend.Amount = Val;
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 4963 unsigned &Amount) { 4986 Amount = 0; 5016 Amount = Imm; 7948 unsigned Amount = ARM_AM::getSORegOffset(Inst.getOperand(2).getImm()); local 7949 if (Amount == 32) Amount = 0; 7957 TmpInst.addOperand(MCOperand::CreateImm(Amount)); 4962 parseMemRegOffsetShift(ARM_AM::ShiftOpc &St, unsigned &Amount) argument
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 1453 uint64_t Amount = Shift->getZExtValue(); 1454 if (Amount >= N.getValueType().getSizeInBits()) 1457 ShiftVal = Amount;
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/external/bison/build-aux/ |
H A D | texinfo.tex | 6292 % Amount to narrow the margins by for @lisp.
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