Searched refs:CondReg (Results 1 - 5 of 5) sorted by relevance
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 2323 unsigned CondReg = getRegForValue(TI->getOperand(0)); local 2324 if (!CondReg) 2330 CondReg = fastEmitInst_extractsubreg(MVT::i32, CondReg, CondIsKill, 2335 unsigned ANDReg = emitAnd_ri(MVT::i32, CondReg, CondIsKill, 1); 2373 unsigned CondReg = getRegForValue(BI->getCondition()); local 2374 if (!CondReg) 2393 unsigned CondReg = getRegForValue(BI->getCondition()); local 2394 if (CondReg == 0) 2405 emitICmp_ri(MVT::i32, CondReg, CondRegIsKil 2625 unsigned CondReg = getRegForValue(Cond); local 2677 unsigned CondReg = getRegForValue(Cond); local [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsFastISel.cpp | 827 unsigned CondReg = createResultReg(&Mips::GPR32RegClass); local 828 if (!emitCmp(CondReg, CI)) 831 .addReg(CondReg)
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 1821 // Selects operate on i1, however, CondReg is 8 bits width and may contain 1826 unsigned CondReg = getRegForValue(Cond); local 1827 if (CondReg == 0) 1832 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1); 1993 unsigned CondReg = getRegForValue(Cond); local 1994 if (CondReg == 0) 1998 .addReg(CondReg, getKillRegState(CondIsKill)).addImm(1);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 1634 unsigned CondReg = getRegForValue(I->getOperand(0)); local 1635 if (CondReg == 0) return false; 1661 CondReg = constrainOperandRegClass(TII.get(CmpOpc), CondReg, 0); 1664 .addReg(CondReg)
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 746 unsigned CondReg = createResultReg(&PPC::CRRCRegClass); local 749 CondReg)) 753 .addImm(PPCPred).addReg(CondReg).addMBB(TBB);
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