Searched refs:RegIdx (Results 1 - 12 of 12) sorted by relevance
/external/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 520 struct RegIdxOp RegIdx; member in union:__anon10759::MipsOperand::__anon10760 534 Op->RegIdx.Index = Index; 535 Op->RegIdx.RegInfo = RegInfo; 536 Op->RegIdx.Kind = RegKind; 546 assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!"); 547 AsmParser.warnIfAssemblerTemporary(RegIdx.Index, StartLoc); 549 return RegIdx.RegInfo->getRegClass(ClassID).getRegister(RegIdx.Index); 555 assert(isRegIdx() && (RegIdx.Kind & RegKind_GPR) && "Invalid access!"); 557 return RegIdx [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.h | 208 unsigned RegIdx = State.getFirstUnallocated(RegList); local 213 while (RegIdx % RegAlign != 0 && RegIdx < RegList.size()) 214 State.AllocateReg(RegList[RegIdx++]); 249 unsigned RegIdx = State.getFirstUnallocated(RegList); local 251 if (RegIdx >= RegList.size()) 254 It.convertToReg(State.AllocateReg(RegList[RegIdx++]));
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H A D | ARMISelLowering.cpp | 2974 unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs); local 2975 if (RegIdx != array_lengthof(GPRArgRegs)) 2976 ArgRegBegin = std::min(ArgRegBegin, (unsigned)GPRArgRegs[RegIdx]);
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/external/llvm/lib/CodeGen/ |
H A D | SplitKit.h | 277 /// intervals. Given a pair (RegIdx, ParentVNI->id), Values contains: 279 /// 1. No entry - the value is not mapped to Edit.get(RegIdx). 281 /// Edit.get(RegIdx). Each value is represented by a minimal live range at 283 /// of RegIdx in RegAssign. 295 /// getLRCalc - Return the LRCalc to use for RegIdx. In spill mode, the 298 LiveRangeCalc &getLRCalc(unsigned RegIdx) { argument 299 return LRCalc[SpillMode != SM_Partition && RegIdx != 0]; 302 /// defValue - define a value in RegIdx from ParentVNI at Idx. 307 VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx); 309 /// forceRecompute - Force the live range of ParentVNI in RegIdx t [all...] |
H A D | SplitKit.cpp | 359 VNInfo *SplitEditor::defValue(unsigned RegIdx, argument 365 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); 372 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id), 375 // This was the first time (RegIdx, ParentVNI) was mapped. 395 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) { argument 397 ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI->id)]; 410 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); 416 VNInfo *SplitEditor::defFromParent(unsigned RegIdx, argument 423 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); 426 // so always begin RegIdx 649 unsigned RegIdx = AssignI.value(); local 826 unsigned RegIdx; local 842 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx); local 928 unsigned RegIdx = RegAssign.lookup(PHIVNI->def); local 969 unsigned RegIdx = RegAssign.lookup(Idx); local 1031 unsigned RegIdx = RegAssign.lookup(ParentVNI->def); local [all...] |
H A D | LiveVariables.cpp | 85 LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) { argument 86 assert(TargetRegisterInfo::isVirtualRegister(RegIdx) && 88 VirtRegInfo.grow(RegIdx); 89 return VirtRegInfo[RegIdx];
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/external/llvm/include/llvm/CodeGen/ |
H A D | LiveVariables.h | 274 VarInfo &getVarInfo(unsigned RegIdx);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSEISelDAGToDAG.h | 33 unsigned getMSACtrlReg(const SDValue RegIdx) const;
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H A D | MipsSEISelDAGToDAG.cpp | 71 unsigned MipsSEDAGToDAGISel::getMSACtrlReg(const SDValue RegIdx) const { 72 switch (cast<ConstantSDNode>(RegIdx)->getZExtValue()) { 796 SDValue RegIdx = Node->getOperand(2); local 798 getMSACtrlReg(RegIdx), MVT::i32); 828 SDValue RegIdx = Node->getOperand(2); local 831 getMSACtrlReg(RegIdx), Value);
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/external/llvm/lib/Target/R600/InstPrinter/ |
H A D | AMDGPUInstPrinter.cpp | 213 unsigned RegIdx = MRI.getEncodingValue(reg) & ((1 << 8) - 1); local 215 O << Type << RegIdx; local 219 O << Type << '[' << RegIdx << ':' << (RegIdx + NumRegs - 1) << ']';
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 2272 unsigned RegIdx = X86::sub_16bit; local 2273 ResultReg = fastEmitInst_extractsubreg(MVT::i16, ResultReg, true, RegIdx);
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 5594 unsigned RegIdx = 3; local 5599 RegIdx = 4; 5601 if (static_cast<ARMOperand &>(*Operands[RegIdx]).isReg() && 5603 static_cast<ARMOperand &>(*Operands[RegIdx]).getReg()) || 5605 static_cast<ARMOperand &>(*Operands[RegIdx]).getReg())))
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