Searched refs:RegisterClasses (Results 1 - 2 of 2) sorted by relevance

/external/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp105 const auto &RegisterClasses = Bank.getRegClasses(); local
106 if (!RegisterClasses.empty()) {
109 assert(RegisterClasses.size() <= 0xffff &&
116 for (const auto &RC : RegisterClasses)
949 const auto &RegisterClasses = RegBank.getRegClasses(); local
957 for (const auto &RC : RegisterClasses) {
997 for (const auto &RC : RegisterClasses) {
1042 << RegisterClasses.size() << ", " << TargetName << "RegUnitRoots, "
1099 const auto &RegisterClasses = RegBank.getRegClasses(); local
1101 if (!RegisterClasses
1135 const auto &RegisterClasses = RegBank.getRegClasses(); local
[all...]
H A DAsmMatcherEmitter.cpp628 RegisterClassesTy RegisterClasses; member in class:__anon11338::AsmMatcherInfo
1186 RegisterClasses[it->first] = RegisterSetClasses[it->second];
1190 ClassInfo *CI = RegisterClasses[Rec];
1404 Op.Class = RegisterClasses[RegRecord];
2050 for (const auto &RC : Info.RegisterClasses)

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