/external/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.h | 26 inline static unsigned getCRFromCRBit(unsigned SrcReg) { argument 28 if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || 29 SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) 31 else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || 32 SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) 34 else if (SrcReg [all...] |
/external/mesa3d/src/mesa/program/ |
H A D | prog_opt_constant_fold.c | 39 if (inst->SrcReg[i].File != PROGRAM_CONSTANT) 146 get_value(prog, &inst->SrcReg[0], a); 147 get_value(prog, &inst->SrcReg[1], b); 155 inst->SrcReg[0] = src_reg_for_vec4(prog, result); 157 inst->SrcReg[1].File = PROGRAM_UNDEFINED; 158 inst->SrcReg[1].Swizzle = SWIZZLE_NOOP; 175 get_value(prog, &inst->SrcReg[0], a); 176 get_value(prog, &inst->SrcReg[1], b); 177 get_value(prog, &inst->SrcReg[2], c); 185 inst->SrcReg[ [all...] |
H A D | prog_parameter_layout.c | 131 if (inst->SrcReg[i].Base.RelAddr) { 134 if (!inst->SrcReg[i].Symbol->pass1_done) { 137 inst->SrcReg[i].Symbol->param_binding_begin, 138 inst->SrcReg[i].Symbol->param_binding_length); 145 inst->SrcReg[i].Symbol->param_binding_begin = new_begin; 146 inst->SrcReg[i].Symbol->pass1_done = 1; 153 inst->Base.SrcReg[i] = inst->SrcReg[i].Base; 154 inst->Base.SrcReg[i].Index += 155 inst->SrcReg[ [all...] |
H A D | programopt.c | 94 newInst[i].SrcReg[0].File = PROGRAM_STATE_VAR; 95 newInst[i].SrcReg[0].Index = mvpRef[i]; 96 newInst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP; 97 newInst[i].SrcReg[1].File = PROGRAM_INPUT; 98 newInst[i].SrcReg[1].Index = VERT_ATTRIB_POS; 99 newInst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP; 166 newInst[0].SrcReg[0].File = PROGRAM_INPUT; 167 newInst[0].SrcReg[0].Index = VERT_ATTRIB_POS; 168 newInst[0].SrcReg[0].Swizzle = SWIZZLE_XXXX; 169 newInst[0].SrcReg[ [all...] |
H A D | nvvertparse.c | 815 if (!Parse_SwizzleSrcReg(parseState, &inst->SrcReg[0])) 847 if (!Parse_SwizzleSrcReg(parseState, &inst->SrcReg[0])) 855 if (!Parse_SwizzleSrcReg(parseState, &inst->SrcReg[1])) 863 if (inst->SrcReg[0].File == PROGRAM_ENV_PARAM && 864 inst->SrcReg[1].File == PROGRAM_ENV_PARAM && 865 inst->SrcReg[0].Index != inst->SrcReg[1].Index) 869 if (inst->SrcReg[0].File == PROGRAM_INPUT && 870 inst->SrcReg[1].File == PROGRAM_INPUT && 871 inst->SrcReg[ [all...] |
H A D | prog_optimize.c | 117 const GLuint coord = GET_SWZ(inst->SrcReg[arg].Swizzle, comp); 144 src_comp = GET_SWZ(mov->SrcReg[0].Swizzle, comp); 228 if (inst->SrcReg[j].File == file) { 229 GLuint index = inst->SrcReg[j].Index; 231 inst->SrcReg[j].Index = map[index]; 274 if (inst->SrcReg[j].File == PROGRAM_TEMPORARY) { 275 const GLuint index = inst->SrcReg[j].Index; 280 if (inst->SrcReg[j].RelAddr) { 287 const GLuint swz = GET_SWZ(inst->SrcReg[j].Swizzle, comp); 412 if (inst->SrcReg[ [all...] |
/external/llvm/lib/CodeGen/ |
H A D | PHIEliminationUtils.h | 17 /// SrcReg when following the CFG edge to SuccMBB. This needs to be after 18 /// any def of SrcReg, but before any subsequent point where control flow 22 unsigned SrcReg);
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H A D | RegisterCoalescer.h | 36 unsigned SrcReg; member in class:llvm::CoalescerPair 41 /// The sub-register index of the old SrcReg in the new coalesced register. 50 /// True when DstReg and SrcReg are reversed from the original 56 /// SrcReg and DstReg. 61 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0), 68 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0), 75 /// Swap SrcReg and DstReg. Return false if swapping is impossible 103 unsigned getSrcReg() const { return SrcReg; } 108 /// Return the subregister index that SrcReg will be coalesced into, or 0.
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H A D | PeepholeOptimizer.cpp | 216 bool getNextSourceImpl(unsigned &SrcReg, unsigned &SrcSubReg); 218 bool getNextSourceFromCopy(unsigned &SrcReg, unsigned &SrcSubReg); 220 bool getNextSourceFromBitcast(unsigned &SrcReg, unsigned &SrcSubReg); 223 bool getNextSourceFromRegSequence(unsigned &SrcReg, unsigned &SrcSubReg); 226 bool getNextSourceFromInsertSubreg(unsigned &SrcReg, unsigned &SrcSubReg); 229 bool getNextSourceFromExtractSubreg(unsigned &SrcReg, unsigned &SrcSubReg); 232 bool getNextSourceFromSubregToReg(unsigned &SrcReg, unsigned &SrcSubReg); 279 /// When the returned value is not nullptr, \p SrcReg gives the register 282 /// on \p SrcReg to access the actual value. 284 /// \p SrcReg give 318 unsigned SrcReg, DstReg, SubIdx; local 469 unsigned SrcReg, SrcReg2; local 632 getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg, unsigned &TrackReg, unsigned &TrackSubReg) argument 897 unsigned SrcReg, SrcSubReg, TrackReg, TrackSubReg; local 1193 getNextSourceFromCopy(unsigned &SrcReg, unsigned &SrcSubReg) argument 1211 getNextSourceFromBitcast(unsigned &SrcReg, unsigned &SrcSubReg) argument 1245 getNextSourceFromRegSequence(unsigned &SrcReg, unsigned &SrcSubReg) argument 1297 getNextSourceFromInsertSubreg(unsigned &SrcReg, unsigned &SrcSubReg) argument 1355 getNextSourceFromExtractSubreg(unsigned &SrcReg, unsigned &SrcSubReg) argument 1386 getNextSourceFromSubregToReg(unsigned &SrcReg, unsigned &SrcSubReg) argument 1408 getNextSourceImpl(unsigned &SrcReg, unsigned &SrcSubReg) argument 1433 getNextSource(unsigned &SrcReg, unsigned &SrcSubReg) argument [all...] |
H A D | PHIEliminationUtils.cpp | 17 // findCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg 19 // SrcReg, but before any subsequent point where control flow might jump out of 23 unsigned SrcReg) { 37 for (MachineInstr &RI : MRI.reg_instructions(SrcReg)) { 22 findPHICopyInsertPoint(MachineBasicBlock* MBB, MachineBasicBlock* SuccMBB, unsigned SrcReg) argument
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_program_tex.c | 70 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; 71 inst_mov->U.I.SrcReg[1].File = RC_FILE_CONSTANT; 72 inst_mov->U.I.SrcReg[1].Index = 76 reset_srcreg(&inst->U.I.SrcReg[0]); 77 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY; 78 inst->U.I.SrcReg[0].Index = temp; 93 inst_rcp->U.I.SrcReg[0] = inst->U.I.SrcReg[0]; 96 inst_rcp->U.I.SrcReg[ [all...] |
H A D | radeon_pair_translate.c | 44 inst->SrcReg[2] = inst->SrcReg[1]; 45 inst->SrcReg[1].File = RC_FILE_NONE; 46 inst->SrcReg[1].Swizzle = RC_SWIZZLE_1111; 47 inst->SrcReg[1].Negate = RC_MASK_NONE; 51 tmp = inst->SrcReg[2]; 52 inst->SrcReg[2] = inst->SrcReg[0]; 53 inst->SrcReg[0] = tmp; 66 inst->SrcReg[ [all...] |
H A D | r3xx_vertprog.c | 43 (PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[x]), \ 48 t_src_class(vpi->SrcReg[x].File), \ 49 RC_MASK_NONE) | (vpi->SrcReg[x].RelAddr << 4)) 197 inst[1] = t_src(vp, &vpi->SrcReg[0]); 213 inst[1] = t_src(vp, &vpi->SrcReg[0]); 214 inst[2] = t_src(vp, &vpi->SrcReg[1]); 229 inst[1] = t_src_scalar(vp, &vpi->SrcReg[0]); 247 inst[1] = PVS_SRC_OPERAND(t_src_index(vp, &vpi->SrcReg[0]), t_swizzle(GET_SWZ(vpi->SrcReg[0].Swizzle, 0)), // X 248 t_swizzle(GET_SWZ(vpi->SrcReg[ [all...] |
H A D | radeon_dataflow_swizzles.c | 43 if (GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan) != RC_SWIZZLE_UNUSED) 47 c->SwizzleCaps->Split(inst->U.I.SrcReg[src], usemask, &split); 58 mov->U.I.SrcReg[0] = inst->U.I.SrcReg[src]; 64 SET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan, RC_SWIZZLE_UNUSED); 66 phase_refmask |= 1 << GET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan); 71 masked_negate = split.Phase[phase] & mov->U.I.SrcReg[0].Negate; 73 mov->U.I.SrcReg[0].Negate = 0; 75 mov->U.I.SrcReg[0].Negate = RC_MASK_XYZW; 79 inst->U.I.SrcReg[sr [all...] |
H A D | radeon_optimize.c | 76 &reader_data->Writer->U.I.PreSub.SrcReg[0], 77 &reader_data->Writer->U.I.PreSub.SrcReg[1])) { 91 if(reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_TEMPORARY && 92 reader_data->Writer->U.I.SrcReg[0].File != RC_FILE_INPUT && 162 *reader_data.Readers[i].U.I.Src = chain_srcregs(*reader_data.Readers[i].U.I.Src, inst_mov->U.I.SrcReg[0]); 164 if (inst_mov->U.I.SrcReg[0].File == RC_FILE_PRESUB) 215 if (is_src_uniform_constant(inst->U.I.SrcReg[2], &swz, &negate)) { 222 if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) { 226 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW; 227 inst->U.I.SrcReg[ [all...] |
H A D | radeon_compiler.c | 123 if (inst->U.I.SrcReg[i].File == RC_FILE_INPUT) 124 c->Program.InputsRead |= 1 << inst->U.I.SrcReg[i].Index; 149 if (inst->U.I.SrcReg[i].File == RC_FILE_INPUT && inst->U.I.SrcReg[i].Index == input) { 150 inst->U.I.SrcReg[i].File = new_input.File; 151 inst->U.I.SrcReg[i].Index = new_input.Index; 152 inst->U.I.SrcReg[i].Swizzle = combine_swizzles(new_input.Swizzle, inst->U.I.SrcReg[i].Swizzle); 153 if (!inst->U.I.SrcReg[i].Abs) { 154 inst->U.I.SrcReg[ [all...] |
H A D | radeon_vert_fc.c | 107 new_inst->U.I.SrcReg[0].Index = 0; 108 new_inst->U.I.SrcReg[0].File = RC_FILE_NONE; 109 new_inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000; 117 build_pred_src(&new_inst->U.I.SrcReg[0], fc_state); 127 new_inst->U.I.SrcReg[1].Index = 0; 128 new_inst->U.I.SrcReg[1].File = RC_FILE_NONE; 129 new_inst->U.I.SrcReg[1].Swizzle = RC_SWIZZLE_0000; 141 inst->U.I.SrcReg[0].Index = 0; 142 inst->U.I.SrcReg[0].File = RC_FILE_NONE; 143 inst->U.I.SrcReg[ [all...] |
H A D | radeon_emulate_loops.c | 99 if(!rc_src_reg_is_immediate(value->C, inst->U.I.SrcReg[0].File, 100 inst->U.I.SrcReg[0].Index)){ 106 inst->U.I.SrcReg[0].Index, 107 inst->U.I.SrcReg[0].Swizzle, 108 inst->U.I.SrcReg[0].Negate, 0); 140 if(inst->U.I.SrcReg[0].File == RC_FILE_TEMPORARY && 141 inst->U.I.SrcReg[0].Index == count_inst->Index && 142 inst->U.I.SrcReg[0].Swizzle == count_inst->Swz){ 144 } else if( inst->U.I.SrcReg[1].File == RC_FILE_TEMPORARY && 145 inst->U.I.SrcReg[ [all...] |
H A D | radeon_program_alu.c | 45 struct rc_dst_register DstReg, struct rc_src_register SrcReg) 55 fpi->U.I.SrcReg[0] = SrcReg; 73 fpi->U.I.SrcReg[0] = SrcReg0; 74 fpi->U.I.SrcReg[1] = SrcReg1; 93 fpi->U.I.SrcReg[0] = SrcReg0; 94 fpi->U.I.SrcReg[1] = SrcReg1; 95 fpi->U.I.SrcReg[2] = SrcReg2; 208 if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY && 209 inst->U.I.SrcReg[ 42 emit1( struct radeon_compiler * c, struct rc_instruction * after, rc_opcode Opcode, struct rc_sub_instruction * base, struct rc_dst_register DstReg, struct rc_src_register SrcReg) argument [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
H A D | radeon_compiler_util_tests.c | 26 &replace_inst.U.I.SrcReg[0], 27 &add_inst.U.I.SrcReg[0], &add_inst.U.I.SrcReg[1]);
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb1InstrInfo.cpp | 42 unsigned DestReg, unsigned SrcReg, 48 assert(ARM::GPRRegClass.contains(DestReg, SrcReg) && 51 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) 54 .addReg(SrcReg, getKillRegState(KillSrc))); 64 .addReg(SrcReg, getKillRegState(KillSrc)); 72 unsigned SrcReg, bool isKill, int FI, 76 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && 77 isARMLowRegister(SrcReg))) && "Unknown regclass!"); 80 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && 81 isARMLowRegister(SrcReg))) { 40 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 71 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument [all...] |
H A D | Thumb1InstrInfo.h | 43 unsigned DestReg, unsigned SrcReg, 47 unsigned SrcReg, bool isKill, int FrameIndex,
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonPeephole.cpp | 141 unsigned SrcReg = Src.getReg(); local 144 TargetRegisterInfo::isVirtualRegister(SrcReg)) { 148 PeepholeMap[DstReg] = SrcReg; 163 unsigned SrcReg = Src2.getReg(); local 164 PeepholeMap[DstReg] = SrcReg; 180 unsigned SrcReg = Src1.getReg(); local 182 std::make_pair(*&SrcReg, 1/*Hexagon::subreg_hireg*/); 192 unsigned SrcReg = Src.getReg(); local 195 TargetRegisterInfo::isVirtualRegister(SrcReg)) { 199 PeepholeMap[DstReg] = SrcReg; 215 unsigned SrcReg = Src.getReg(); local [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | SIInstrInfo.cpp | 39 unsigned DestReg, unsigned SrcReg, 46 assert(DestReg != AMDGPU::SCC && SrcReg != AMDGPU::SCC); 49 .addReg(SrcReg, getKillRegState(KillSrc)); 37 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument
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/external/mesa3d/src/mesa/state_tracker/ |
H A D | st_atom_pixeltransfer.c | 165 inst[ic].SrcReg[0].File = PROGRAM_INPUT; 166 inst[ic].SrcReg[0].Index = FRAG_ATTRIB_TEX0; 189 inst[ic].SrcReg[0].File = PROGRAM_TEMPORARY; 190 inst[ic].SrcReg[0].Index = colorTemp; 191 inst[ic].SrcReg[1].File = PROGRAM_STATE_VAR; 192 inst[ic].SrcReg[1].Index = scale_p; 193 inst[ic].SrcReg[2].File = PROGRAM_STATE_VAR; 194 inst[ic].SrcReg[2].Index = bias_p; 219 inst[ic].SrcReg[0].File = PROGRAM_TEMPORARY; 220 inst[ic].SrcReg[ [all...] |