/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 72 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain); 84 Op.getNode()->dump(); 113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1)); 115 return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1)); 119 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); 121 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1), 124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1), 127 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1), 130 return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1), 133 return DAG.getNode(AMDGPUIS [all...] |
H A D | AMDILISelLowering.cpp | 329 DST = SDValue(Op.getNode(), 0); 348 DST = SDValue(Op.getNode(), 0); 362 Nodes1 = DAG.getNode(AMDGPUISD::VBUILD, 384 Nodes1 = DAG.getNode( 395 Nodes1 = DAG.getNode( 406 Nodes1 = DAG.getNode( 434 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data); 440 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift); 442 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift); 480 Result = DAG.getNode( [all...] |
/external/antlr/antlr-3.4/runtime/ObjC/ANTLR.framework/Headers/ |
H A D | ANTLRNodeMapElement.h | 40 @property (retain, getter=getNode, setter=setNode:) id node; 51 - (id<ANTLRTree>)getNode;
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H A D | ANTLRRuleReturnScope.h | 46 - (id) getNode;
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/external/antlr/antlr-3.4/runtime/ObjC/ANTLR.framework/Versions/A/Headers/ |
H A D | ANTLRNodeMapElement.h | 40 @property (retain, getter=getNode, setter=setNode:) id node; 51 - (id<ANTLRTree>)getNode;
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H A D | ANTLRRuleReturnScope.h | 46 - (id) getNode;
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/external/antlr/antlr-3.4/runtime/ObjC/ANTLR.framework/Versions/Current/Headers/ |
H A D | ANTLRNodeMapElement.h | 40 @property (retain, getter=getNode, setter=setNode:) id node; 51 - (id<ANTLRTree>)getNode;
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H A D | ANTLRRuleReturnScope.h | 46 - (id) getNode;
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/external/antlr/antlr-3.4/runtime/ObjC/Framework/ |
H A D | ANTLRNodeMapElement.h | 40 @property (retain, getter=getNode, setter=setNode:) id<ANTLRBaseTree> node; 51 - (id<ANTLRBaseTree>)getNode;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 223 // SDValue.getNode() == 0 - No change was made 224 // SDValue.getNode() == N - N was replaced, is dead and has been handled. 506 AddToWorklist(Op.getNode()); 601 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(), 606 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(), 620 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(), 630 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), 636 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), 643 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), 647 return DAG.getNode(IS [all...] |
H A D | LegalizeVectorOps.cpp | 179 for (unsigned i = 0, e = Op.getNode()->getNumValues(); i != e; ++i) 190 SDNode* Node = Op.getNode(); 197 SDValue Result = SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops), 0); 200 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode()); 229 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode()); 344 if (Tmp1.getNode()) { 386 assert(Op.getNode()->getNumValues() == 1 && 399 Operands[j] = DAG.getNode(ISD::FP_EXTEND, dl, NVT, Op.getOperand(j)); 401 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); 406 Op = DAG.getNode(O [all...] |
H A D | LegalizeDAG.cpp | 183 UpdatedNodes->insert(New.getNode()); 184 ReplacedNode(Old.getNode()); 196 UpdatedNodes->insert(New[i].getNode()); 310 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val); 351 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 353 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); 375 SDValue Result = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores); 391 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); 399 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 408 DAG.getNode(IS [all...] |
H A D | TargetLowering.cpp | 209 SDValue Tmp = DAG.getNode(ISD::SETCC, dl, 214 NewLHS = DAG.getNode(ISD::SETCC, dl, 217 NewLHS = DAG.getNode(ISD::OR, dl, Tmp.getValueType(), Tmp, NewLHS); 305 SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0), 330 assert(Op.getNode()->getNumValues() == 1 && 339 if (!Op.getNode()->hasOneUse()) 354 SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT, 355 DAG.getNode(ISD::TRUNCATE, dl, SmallVT, 356 Op.getNode()->getOperand(0)), 357 DAG.getNode(IS [all...] |
H A D | ResourcePriorityQueue.cpp | 78 const SDNode *ScegN = PredSU->getNode(); 116 const SDNode *ScegN = SuccSU->getNode(); 134 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); 247 if (!SU || !SU->getNode()) 252 if (SU->getNode()->getGluedNode()) 257 if (SU->getNode()->isMachineOpcode()) 258 switch (SU->getNode()->getMachineOpcode()) { 261 SU->getNode()->getMachineOpcode()))) 292 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) { 297 if (SU->getNode() [all...] |
H A D | LegalizeIntegerTypes.cpp | 148 if (Res.getNode()) 161 return DAG.getNode(ISD::AssertSext, SDLoc(N), 168 return DAG.getNode(ISD::AssertZext, SDLoc(N), 249 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); 253 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); 258 SDValue Trunc = DAG.getNode(ISD::FP_TO_FP16, dl, NOutVT, PromotedOp); 259 return DAG.getNode(ISD::AssertZext, dl, NOutVT, Trunc, 270 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, 284 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, 288 return DAG.getNode(IS [all...] |
H A D | LegalizeTypesGeneric.cpp | 59 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 60 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 69 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 70 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 76 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 77 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 82 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 83 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 93 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 94 Hi = DAG.getNode(IS [all...] |
H A D | LegalizeVectorTypes.cpp | 134 if (R.getNode()) 141 return DAG.getNode(N->getOpcode(), SDLoc(N), 149 return DAG.getNode(N->getOpcode(), SDLoc(N), 161 return DAG.getNode(ISD::BITCAST, SDLoc(N), 171 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp); 187 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), 195 return DAG.getNode(ISD::FP_ROUND, SDLoc(N), 201 return DAG.getNode(ISD::FPOWI, SDLoc(N), 212 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op); 254 Op = DAG.getNode(IS [all...] |
/external/llvm/lib/Target/R600/ |
H A D | AMDGPUISelLowering.cpp | 570 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain); 600 Op.getNode()->dump(); 639 SDNode *Node = LowerLOAD(SDValue(N, 0), DAG).getNode(); 652 if (Lowered.getNode()) 704 SDValue Ptr = DAG.getNode(ISD::ADD, DL, PtrVT, InitPtr, Offset); 710 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); 728 SDValue Ptr = DAG.getNode(ISD::ADD, DL, PtrVT, InitPtr, Offset); 734 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); 848 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), Args); 860 return DAG.getNode(IS [all...] |
/external/apache-xml/src/main/java/org/apache/xml/dtm/ref/ |
H A D | DTMNodeIterator.java | 140 return dtm_iter.getDTM(handle).getNode(handle); 166 return dtm_iter.getDTM(handle).getNode(handle); 184 return dtm_iter.getDTM(handle).getNode(handle);
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/external/llvm/include/llvm/CodeGen/ |
H A D | MachinePostDominators.h | 49 return DT->getNode(BB); 52 MachineDomTreeNode *getNode(MachineBasicBlock *BB) const { function in struct:llvm::MachinePostDominatorTree 53 return DT->getNode(BB);
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZSelectionDAGInfo.cpp | 48 return DAG.getNode(Loop, DL, MVT::Other, Chain, Dst, Src, 51 return DAG.getNode(Sequence, DL, MVT::Other, Chain, Dst, Src, 114 Dst = DAG.getNode(ISD::ADD, DL, PtrVT, Dst, 119 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2); 128 SDValue Dst2 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst, 133 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2); 148 SDValue DstPlus1 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst, 171 return DAG.getNode(SystemZISD::CLC_LOOP, DL, VTs, Chain, Src1, Src2, 174 return DAG.getNode(SystemZISD::CLC, DL, VTs, Chain, Src1, Src2, 183 SDValue IPM = DAG.getNode(SystemZIS [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 395 SDNode *ADDCNode = ADDENode->getOperand(2).getNode(); 402 SDNode *MultNode = MultHi.getNode(); 406 if (MultLo.getNode() != MultNode) 431 SDValue ACCIn = CurDAG->getNode(MipsISD::MTLOHI, DL, MVT::Untyped, 438 SDValue MAdd = CurDAG->getNode(MultOpc, DL, MVT::Untyped, 445 SDValue LoOut = CurDAG->getNode(MipsISD::MFLO, DL, MVT::i32, MAdd); 449 SDValue HiOut = CurDAG->getNode(MipsISD::MFHI, DL, MVT::i32, MAdd); 467 SDNode *SUBCNode = SUBENode->getOperand(2).getNode(); 474 SDNode *MultNode = MultHi.getNode(); 478 if (MultLo.getNode() ! [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 224 case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG); 265 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA); 270 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA); 272 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA); 302 GA = DAG.getNode(ISD::ADD, DL, MVT::i32, GA, Remaining); 327 return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, getPointerTy(), Result); 345 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res); 367 return DAG.getNode(XCoreISD::BR_JT, dl, MVT::Other, Chain, TargetJT, Index); 370 SDValue ScaledIndex = DAG.getNode(ISD::SHL, dl, MVT::i32, Index, 372 return DAG.getNode(XCoreIS [all...] |
/external/llvm/unittests/IR/ |
H A D | DominatorTreeTest.cpp | 179 EXPECT_EQ(DT->getNode(BB0)->getDFSNumIn(), 0UL); 180 EXPECT_EQ(DT->getNode(BB0)->getDFSNumOut(), 7UL); 181 EXPECT_EQ(DT->getNode(BB1)->getDFSNumIn(), 1UL); 182 EXPECT_EQ(DT->getNode(BB1)->getDFSNumOut(), 2UL); 183 EXPECT_EQ(DT->getNode(BB2)->getDFSNumIn(), 5UL); 184 EXPECT_EQ(DT->getNode(BB2)->getDFSNumOut(), 6UL); 185 EXPECT_EQ(DT->getNode(BB4)->getDFSNumIn(), 3UL); 186 EXPECT_EQ(DT->getNode(BB4)->getDFSNumOut(), 4UL); 194 EXPECT_EQ(DT->getNode(BB0)->getDFSNumIn(), 0UL); 195 EXPECT_EQ(DT->getNode(BB [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.cpp | 69 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, 76 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 82 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, 88 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 110 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, 119 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 134 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, 141 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 179 Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 181 Src = DAG.getNode(IS [all...] |