Searched refs:inst (Results 1 - 25 of 309) sorted by relevance

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/external/llvm/test/MC/AArch64/
H A Dinst-directive-diagnostic.s9 .inst
12 .inst 0x5e104020,
15 .inst .Label
18 .inst 0x5e104020 0x5e104020
H A Dinst-directive.s6 .section .inst.aarch64_inst
12 .inst 0x5e104020
18 // CHECK-ASM: .inst 0x5E104020
21 // CHECK-OBJ: Name: .inst.aarch64_inst
/external/webrtc/src/modules/audio_processing/ns/
H A Dns_core.c22 void WebRtcNs_set_feature_extraction_parameters(NSinst_t* inst) { argument
24 inst->featureExtractionParams.binSizeLrt = (float)0.1;
25 inst->featureExtractionParams.binSizeSpecFlat = (float)0.05;
26 inst->featureExtractionParams.binSizeSpecDiff = (float)0.1;
29 inst->featureExtractionParams.rangeAvgHistLrt = (float)1.0;
33 inst->featureExtractionParams.factor1ModelPars = (float)1.20; //for lrt and spectral diff
34 inst->featureExtractionParams.factor2ModelPars = (float)0.9; //for spectral_flatness:
38 inst->featureExtractionParams.thresPosSpecFlat = (float)0.6;
41 inst->featureExtractionParams.limitPeakSpacingSpecFlat =
42 2 * inst
71 WebRtcNs_InitCore(NSinst_t* inst, WebRtc_UWord32 fs) argument
209 WebRtcNs_set_policy_core(NSinst_t* inst, int mode) argument
240 WebRtcNs_NoiseEstimation(NSinst_t* inst, float* magn, float* noise) argument
311 WebRtcNs_FeatureParameterExtraction(NSinst_t* inst, int flag) argument
531 WebRtcNs_ComputeSpectralFlatness(NSinst_t* inst, float* magnIn) argument
568 WebRtcNs_ComputeSpectralDifference(NSinst_t* inst, float* magnIn) argument
610 WebRtcNs_SpeechNoiseProb(NSinst_t* inst, float* probSpeechFinal, float* snrLocPrior, float* snrLocPost) argument
717 WebRtcNs_ProcessCore(NSinst_t* inst, short* speechFrame, short* speechFrameHB, short* outFrame, short* outFrameHB) argument
[all...]
H A Dnsx_core.c292 // if (gain <= inst->denoiseBound) {
293 // factor2 = 1.0 - 0.3 * (blim - inst->denoiseBound);
366 // sum of log2(i) from table index to inst->anaLen2 in Q5
380 // sum of log2(i)^2 from table index to inst->anaLen2 in Q2
439 static void UpdateNoiseEstimate(NsxInst_t* inst, int offset) { argument
447 tmp16 = WebRtcSpl_MaxValueW16(inst->noiseEstLogQuantile + offset,
448 inst->magnLen);
450 inst->qNoise = 14 - (int) WEBRTC_SPL_MUL_16_16_RSFT_WITH_ROUND(
452 for (i = 0; i < inst->magnLen; i++) {
453 // inst
471 NoiseEstimationC(NsxInst_t* inst, uint16_t* magn, uint32_t* noise, int16_t* q_noise) argument
594 PrepareSpectrumC(NsxInst_t* inst, int16_t* freq_buf) argument
619 DenormalizeC(NsxInst_t* inst, int16_t* in, int factor) argument
631 SynthesisUpdateC(NsxInst_t* inst, int16_t* out_frame, int16_t gain_factor) argument
664 AnalysisUpdateC(NsxInst_t* inst, int16_t* out, int16_t* new_speech) argument
685 CreateComplexBufferC(NsxInst_t* inst, int16_t* in, int16_t* out) argument
695 WebRtcNsx_CalcParametricNoiseEstimate(NsxInst_t* inst, WebRtc_Word16 pink_noise_exp_avg, WebRtc_Word32 pink_noise_num_avg, int freq_index, WebRtc_UWord32* noise_estimate, WebRtc_UWord32* noise_estimate_avg) argument
741 WebRtcNsx_InitCore(NsxInst_t* inst, WebRtc_UWord32 fs) argument
892 WebRtcNsx_set_policy_core(NsxInst_t* inst, int mode) argument
927 WebRtcNsx_FeatureParameterExtraction(NsxInst_t* inst, int flag) argument
1127 WebRtcNsx_ComputeSpectralFlatness(NsxInst_t* inst, WebRtc_UWord16* magn) argument
1197 WebRtcNsx_ComputeSpectralDifference(NsxInst_t* inst, WebRtc_UWord16* magnIn) argument
1292 WebRtcNsx_SpeechNoiseProb(NsxInst_t* inst, WebRtc_UWord16* nonSpeechProbFinal, WebRtc_UWord32* priorLocSnr, WebRtc_UWord32* postLocSnr) argument
1522 WebRtcNsx_DataAnalysis(NsxInst_t* inst, short* speechFrame, WebRtc_UWord16* magnU16) argument
1768 WebRtcNsx_DataSynthesis(NsxInst_t* inst, short* outFrame) argument
1844 WebRtcNsx_ProcessCore(NsxInst_t* inst, short* speechFrame, short* speechFrameHB, short* outFrame, short* outFrameHB) argument
[all...]
/external/mesa3d/src/gallium/drivers/r300/compiler/tests/
H A Drc_test_helpers.h3 struct rc_instruction * inst,
8 struct rc_instruction * inst,
12 struct rc_instruction * inst,
/external/clang/test/Index/
H A Dcursor-ref-names.cpp17 Sub inst; local
18 inst.func();
19 inst[1];
20 inst.operator[](1);
22 inst.Base<int>::operator[](1);
30 // CHECK: cursor-ref-names.cpp:17:9: VarDecl=inst:17:9 (Definition) Extent=[17:5 - 17:13]
35 // CHECK: cursor-ref-names.cpp:18:5: DeclRefExpr=inst:17:9 Extent=[18:5 - 18:9]
37 // CHECK: cursor-ref-names.cpp:19:5: DeclRefExpr=inst:17:9 Extent=[19:5 - 19:9]
41 // CHECK: cursor-ref-names.cpp:20:5: DeclRefExpr=inst:17:9 Extent=[20:5 - 20:9]
44 // CHECK: cursor-ref-names.cpp:22:5: DeclRefExpr=inst
[all...]
/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dradeon_program_alu.h35 struct rc_instruction * inst,
40 struct rc_instruction * inst,
45 struct rc_instruction * inst,
50 struct rc_instruction * inst,
55 struct rc_instruction *inst,
60 struct rc_instruction * inst,
H A Dr500_fragprog.c65 struct rc_instruction * inst; local
85 for (inst = writer->Inst; inst != inst_if; inst = inst->Next) {
87 rc_get_opcode_info(inst->U.I.Opcode);
374 uint32_t inst; local
380 inst0 = inst = code->inst[n].inst0;
381 fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst);
[all...]
H A Dradeon_program.c57 struct rc_instruction * inst = c->Program.Instructions.Next; local
59 while(inst != &c->Program.Instructions) {
60 struct rc_instruction * current = inst;
63 inst = inst->Next;
81 struct rc_instruction * inst,
109 struct rc_instruction * inst; local
114 for(inst = c->Program.Instructions.Next;
115 inst != &c->Program.Instructions; inst
79 get_used_temporaries_cb( void * userdata, struct rc_instruction * inst, rc_register_file file, unsigned int index, unsigned int mask) argument
171 struct rc_instruction * inst = memory_pool_malloc(&c->Pool, sizeof(struct rc_instruction)); local
184 rc_insert_instruction(struct rc_instruction * after, struct rc_instruction * inst) argument
195 struct rc_instruction * inst = rc_alloc_instruction(c); local
202 rc_remove_instruction(struct rc_instruction * inst) argument
214 struct rc_instruction * inst; local
[all...]
H A Dradeon_program_tex.h36 struct rc_instruction * inst,
H A Dradeon_pair_translate.c38 static void final_rewrite(struct rc_sub_instruction *inst) argument
42 switch(inst->Opcode) {
44 inst->SrcReg[2] = inst->SrcReg[1];
45 inst->SrcReg[1].File = RC_FILE_NONE;
46 inst->SrcReg[1].Swizzle = RC_SWIZZLE_1111;
47 inst->SrcReg[1].Negate = RC_MASK_NONE;
48 inst->Opcode = RC_OPCODE_MAD;
51 tmp = inst->SrcReg[2];
52 inst
87 classify_instruction(struct rc_sub_instruction * inst, int * needrgb, int * needalpha, int * istranscendent) argument
149 set_pair_instruction(struct r300_fragment_program_compiler *c, struct rc_pair_instruction * pair, struct rc_sub_instruction * inst) argument
328 check_opcode_support(struct r300_fragment_program_compiler *c, struct rc_sub_instruction *inst) argument
[all...]
H A Dradeon_program_alu.c197 static int is_dst_safe_to_reuse(struct rc_instruction *inst) argument
199 const struct rc_opcode_info *info = rc_get_opcode_info(inst->U.I.Opcode);
204 if (inst->U.I.DstReg.File != RC_FILE_TEMPORARY)
208 if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY &&
209 inst->U.I.SrcReg[i].Index == inst->U.I.DstReg.Index)
217 struct rc_instruction *inst)
221 if (is_dst_safe_to_reuse(inst))
222 tmp = inst->U.I.DstReg.Index;
226 return dstregtmpmask(tmp, inst
216 try_to_reuse_dst(struct radeon_compiler *c, struct rc_instruction *inst) argument
229 transform_ABS(struct radeon_compiler* c, struct rc_instruction* inst) argument
239 transform_CEIL(struct radeon_compiler* c, struct rc_instruction* inst) argument
259 transform_CLAMP(struct radeon_compiler *c, struct rc_instruction *inst) argument
275 transform_DP2(struct radeon_compiler* c, struct rc_instruction* inst) argument
290 transform_DPH(struct radeon_compiler* c, struct rc_instruction* inst) argument
305 transform_DST(struct radeon_compiler* c, struct rc_instruction* inst) argument
314 transform_FLR(struct radeon_compiler* c, struct rc_instruction* inst) argument
324 transform_TRUNC(struct radeon_compiler* c, struct rc_instruction* inst) argument
360 transform_LIT(struct radeon_compiler* c, struct rc_instruction* inst) argument
425 transform_LRP(struct radeon_compiler* c, struct rc_instruction* inst) argument
440 transform_POW(struct radeon_compiler* c, struct rc_instruction* inst) argument
464 transform_ROUND(struct radeon_compiler* c, struct rc_instruction* inst) argument
492 transform_RSQ(struct radeon_compiler* c, struct rc_instruction* inst) argument
498 transform_SEQ(struct radeon_compiler* c, struct rc_instruction* inst) argument
510 transform_SFL(struct radeon_compiler* c, struct rc_instruction* inst) argument
517 transform_SGE(struct radeon_compiler* c, struct rc_instruction* inst) argument
529 transform_SGT(struct radeon_compiler* c, struct rc_instruction* inst) argument
541 transform_SLE(struct radeon_compiler* c, struct rc_instruction* inst) argument
553 transform_SLT(struct radeon_compiler* c, struct rc_instruction* inst) argument
565 transform_SNE(struct radeon_compiler* c, struct rc_instruction* inst) argument
577 transform_SSG(struct radeon_compiler* c, struct rc_instruction* inst) argument
615 transform_SUB(struct radeon_compiler* c, struct rc_instruction* inst) argument
622 transform_SWZ(struct radeon_compiler* c, struct rc_instruction* inst) argument
628 transform_XPD(struct radeon_compiler* c, struct rc_instruction* inst) argument
659 radeonTransformALU( struct radeon_compiler * c, struct rc_instruction* inst, void* unused) argument
695 transform_r300_vertex_ABS(struct radeon_compiler* c, struct rc_instruction* inst) argument
704 transform_r300_vertex_CMP(struct radeon_compiler* c, struct rc_instruction* inst) argument
733 transform_r300_vertex_DP2(struct radeon_compiler* c, struct rc_instruction* inst) argument
741 transform_r300_vertex_DP3(struct radeon_compiler* c, struct rc_instruction* inst) argument
756 transform_r300_vertex_fix_LIT(struct radeon_compiler* c, struct rc_instruction* inst) argument
780 transform_r300_vertex_SEQ(struct radeon_compiler *c, struct rc_instruction *inst) argument
807 transform_r300_vertex_SNE(struct radeon_compiler *c, struct rc_instruction *inst) argument
834 transform_r300_vertex_SGT(struct radeon_compiler* c, struct rc_instruction* inst) argument
843 transform_r300_vertex_SLE(struct radeon_compiler* c, struct rc_instruction* inst) argument
852 transform_r300_vertex_SSG(struct radeon_compiler* c, struct rc_instruction* inst) argument
888 transform_vertex_TRUNC(struct radeon_compiler* c, struct rc_instruction* inst) argument
903 r300_transform_vertex_alu( struct radeon_compiler * c, struct rc_instruction* inst, void* unused) argument
974 sin_approx( struct radeon_compiler* c, struct rc_instruction * inst, struct rc_dst_register dst, struct rc_src_register src, const unsigned int* constants) argument
1002 r300_transform_trig_simple(struct radeon_compiler* c, struct rc_instruction* inst, void* unused) argument
1083 r300_transform_SIN_COS_SCS(struct radeon_compiler *c, struct rc_instruction *inst, unsigned srctmp) argument
1120 radeonTransformTrigScale(struct radeon_compiler* c, struct rc_instruction* inst, void* unused) argument
1152 r300_transform_trig_scale_vertex(struct radeon_compiler *c, struct rc_instruction *inst, void *unused) argument
1196 radeonTransformDeriv(struct radeon_compiler* c, struct rc_instruction* inst, void* unused) argument
1241 struct rc_instruction * inst; local
[all...]
H A Dradeon_pair_dead_sources.c20 struct rc_instruction * inst,
28 inst->U.P.RGB.Src[sub->Arg[i].Source].Used = 1;
32 inst->U.P.Alpha.Src[sub->Arg[i].Source].Used = 1;
43 struct rc_instruction * inst; local
44 for (inst = c->Program.Instructions.Next;
45 inst != &c->Program.Instructions;
46 inst = inst->Next) {
48 if (inst->Type == RC_INSTRUCTION_NORMAL)
53 inst
19 mark_used( struct rc_instruction * inst, struct rc_pair_sub_instruction * sub) argument
[all...]
H A Dr500_fragprog_emit.c159 static unsigned int translate_arg_rgb(struct rc_pair_instruction *inst, int arg) argument
161 unsigned int t = inst->RGB.Arg[arg].Source;
163 t |= inst->RGB.Arg[arg].Negate << 11;
164 t |= inst->RGB.Arg[arg].Abs << 12;
167 t |= fix_hw_swizzle(GET_SWZ(inst->RGB.Arg[arg].Swizzle, comp)) << (3*comp + 2);
172 static unsigned int translate_arg_alpha(struct rc_pair_instruction *inst, int i) argument
174 unsigned int t = inst->Alpha.Arg[i].Source;
175 t |= fix_hw_swizzle(GET_SWZ(inst->Alpha.Arg[i].Swizzle, 0)) << 2;
176 t |= inst->Alpha.Arg[i].Negate << 5;
177 t |= inst
235 emit_paired(struct r300_fragment_program_compiler *c, struct rc_pair_instruction *inst) argument
371 emit_tex(struct r300_fragment_program_compiler *c, struct rc_sub_instruction *inst) argument
443 emit_flowcontrol(struct emit_state * s, struct rc_instruction * inst) argument
[all...]
H A Dradeon_vert_fc.c37 static void mark_write(void * userdata, struct rc_instruction * inst, argument
55 struct rc_instruction * inst; local
57 for(inst = fc_state->C->Program.Instructions.Next;
58 inst != &fc_state->C->Program.Instructions;
59 inst = inst->Next) {
60 rc_for_all_writes_mask(inst, mark_write, writemasks);
84 struct rc_instruction * inst,
88 rc_insert_new_instruction(fc_state->C, inst->Prev);
135 struct rc_instruction * inst,
83 lower_bgnloop( struct rc_instruction * inst, struct vert_fc_state * fc_state) argument
134 lower_brk( struct rc_instruction * inst, struct vert_fc_state * fc_state) argument
152 lower_endloop( struct rc_instruction * inst, struct vert_fc_state * fc_state) argument
166 lower_if( struct rc_instruction * inst, struct vert_fc_state * fc_state) argument
210 struct rc_instruction * inst; local
[all...]
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_vec4_copy_propagation.cpp40 is_direct_copy(vec4_instruction *inst) argument
42 return (inst->opcode == BRW_OPCODE_MOV &&
43 !inst->predicate &&
44 inst->dst.file == GRF &&
45 !inst->saturate &&
46 !inst->dst.reladdr &&
47 !inst->src[0].reladdr &&
48 inst->dst.type == inst->src[0].type);
52 is_dominated_by_previous_instruction(vec4_instruction *inst) argument
61 try_constant_propagation(vec4_instruction *inst, int arg, src_reg *values[4]) argument
163 try_copy_propagation(struct intel_context *intel, vec4_instruction *inst, int arg, src_reg *values[4]) argument
241 vec4_instruction *inst = (vec4_instruction *)node; local
[all...]
H A Dbrw_fs_copy_propagation.cpp35 fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry) argument
37 if (inst->src[arg].file != entry->dst.file ||
38 inst->src[arg].reg != entry->dst.reg ||
39 inst->src[arg].reg_offset != entry->dst.reg_offset) {
44 if (inst->conditional_mod &&
45 inst->src[arg].type == BRW_REGISTER_TYPE_UD &&
51 if (intel->gen == 6 && inst->is_math() &&
55 inst->src[arg].file = entry->src.file;
56 inst->src[arg].reg = entry->src.reg;
57 inst
[all...]
H A Dbrw_disasm.c528 static int dest (FILE *file, struct brw_instruction *inst) argument
532 if (inst->header.access_mode == BRW_ALIGN_1)
534 if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT)
536 err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr);
539 if (inst->bits1.da1.dest_subreg_nr)
540 format (file, ".%d", inst->bits1.da1.dest_subreg_nr /
541 reg_type_size[inst->bits1.da1.dest_reg_type]);
543 err |= control (file, "horiz stride", horiz_stride, inst->bits1.da1.dest_horiz_stride, NULL);
545 err |= control (file, "dest reg encoding", reg_encoding, inst
585 dest_3src(FILE *file, struct brw_instruction *inst) argument
723 src0_3src(FILE *file, struct brw_instruction *inst) argument
771 src1_3src(FILE *file, struct brw_instruction *inst) argument
824 src2_3src(FILE *file, struct brw_instruction *inst) argument
874 imm(FILE *file, GLuint type, struct brw_instruction *inst) argument
903 src0(FILE *file, struct brw_instruction *inst) argument
963 src1(FILE *file, struct brw_instruction *inst) argument
1032 qtr_ctrl(FILE *file, struct brw_instruction *inst) argument
1061 brw_disasm(FILE *file, struct brw_instruction *inst, int gen) argument
[all...]
H A Dbrw_fs_schedule_instructions.cpp58 schedule_node(fs_inst *inst) argument
60 this->inst = inst;
71 switch (inst->opcode) {
103 fs_inst *inst; member in class:schedule_node
132 void add_inst(fs_inst *inst);
136 bool is_compressed(fs_inst *inst);
147 instruction_scheduler::add_inst(fs_inst *inst) argument
149 schedule_node *n = new(mem_ctx) schedule_node(inst);
151 assert(!inst
240 is_compressed(fs_inst *inst) argument
275 fs_inst *inst = n->inst; local
359 fs_inst *inst = n->inst; local
511 fs_inst *inst = next_block_header; local
[all...]
/external/webrtc/src/common_audio/vad/
H A Dvad_core.c66 int WebRtcVad_InitCore(VadInstT *inst, short mode) argument
71 inst->vad = 1;
72 inst->frame_counter = 0;
73 inst->over_hang = 0;
74 inst->num_of_speech = 0;
77 inst->downsampling_filter_states[0] = 0;
78 inst->downsampling_filter_states[1] = 0;
79 inst->downsampling_filter_states[2] = 0;
80 inst->downsampling_filter_states[3] = 0;
85 inst
193 WebRtcVad_set_mode_core(VadInstT *inst, short mode) argument
275 WebRtcVad_CalcVad32khz(VadInstT *inst, WebRtc_Word16 *speech_frame, int frame_length) argument
297 WebRtcVad_CalcVad16khz(VadInstT *inst, WebRtc_Word16 *speech_frame, int frame_length) argument
313 WebRtcVad_CalcVad8khz(VadInstT *inst, WebRtc_Word16 *speech_frame, int frame_length) argument
329 WebRtcVad_GmmProbability(VadInstT *inst, WebRtc_Word16 *feature_vector, WebRtc_Word16 total_power, int frame_length) argument
[all...]
/external/mesa3d/src/mesa/program/
H A Dprog_opt_constant_fold.c34 src_regs_are_constant(const struct prog_instruction *inst, unsigned num_srcs) argument
39 if (inst->SrcReg[i].File != PROGRAM_CONSTANT)
137 struct prog_instruction *const inst = &prog->Instructions[i]; local
139 switch (inst->Opcode) {
141 if (src_regs_are_constant(inst, 2)) {
146 get_value(prog, &inst->SrcReg[0], a);
147 get_value(prog, &inst->SrcReg[1], b);
154 inst->Opcode = OPCODE_MOV;
155 inst->SrcReg[0] = src_reg_for_vec4(prog, result);
157 inst
[all...]
H A Dprogramopt.c257 struct prog_instruction *newInst, *inst; local
299 inst = newInst;
301 if (inst->Opcode == OPCODE_END)
303 if (inst->DstReg.File == PROGRAM_OUTPUT &&
304 inst->DstReg.Index == FRAG_RESULT_COLOR) {
306 inst->DstReg.File = PROGRAM_TEMPORARY;
307 inst->DstReg.Index = colorTemp;
308 inst->SaturateMode = saturate;
311 inst++;
313 assert(inst
421 is_texture_instruction(const struct prog_instruction *inst) argument
453 const struct prog_instruction *inst = prog->Instructions + i; local
528 struct prog_instruction *inst = prog->Instructions + i; local
553 struct prog_instruction *inst = prog->Instructions + i; local
564 struct prog_instruction *inst; local
570 struct prog_instruction *inst = prog->Instructions + i; local
606 struct prog_instruction *inst; local
647 struct prog_instruction *inst; local
[all...]
H A Dprog_parameter_layout.c120 struct asm_instruction *inst; local
129 for (inst = state->inst_head; inst != NULL; inst = inst->next) {
131 if (inst->SrcReg[i].Base.RelAddr) {
134 if (!inst->SrcReg[i].Symbol->pass1_done) {
137 inst->SrcReg[i].Symbol->param_binding_begin,
138 inst->SrcReg[i].Symbol->param_binding_length);
145 inst
[all...]
/external/slf4j/slf4j-migrator/src/main/java/org/slf4j/migrator/
H A DMain.java43 MigratorFrame inst = new MigratorFrame();
44 inst.setLocationRelativeTo(null);
45 inst.setVisible(true);
/external/lldb/examples/python/
H A Dgdb_disassemble.py13 for inst in instructions:
14 inst_addr = inst.addr.load_addr
16 comment = inst.comment
18 print "<%s + %-4u> 0x%x %8s %s ; %s" % (name, inst_offset, inst_addr, inst.mnemonic, inst.operands, comment)
20 print "<%s + %-4u> 0x%x %8s %s" % (name, inst_offset, inst_addr, inst.mnemonic, inst.operands)

Completed in 522 milliseconds

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