Searched refs:rA (Results 1 - 16 of 16) sorted by relevance

/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_util.cpp180 for (Range *rA = this->head; rA; rA = rA->next)
182 if (rB->bgn < rA->end &&
183 rB->end > rA->bgn)
/external/neven/Embedded/common/src/b_BasicEm/
H A DMath.h179 /** matrix multiply rA = x1A * x2A, input/output 1.15, no overflow protection, in-place not allowed */
181 const int16 *x2A, int16 col2A, int16 *rA );
183 /** matrix multiply rA = x1A * transposed( x2A ), input/output 1.15, no overflow protection, in-place not allowed */
185 const int16 *x2A, int16 row2A, int16 *rA );
191 uint16 bbs_matTrans( int16 *xA, int16 rowA, int16 colA, int16 *rA );
H A DMath.c1048 void bbs_matMultiplyFlt16( const int16 *x1A, int16 row1A, int16 col1A, const int16 *x2A, int16 col2A, int16 *rA )
1071 *rA++ = ( sumL + ( 1 << 14 ) ) >> 15; /* round result to 1.15 */
1075 else mmul( ( int16* ) x1A, row1A, col1A, ( int16* ) x2A, col1A, col2A, rA );
1102 *rA++ = ( sumL + ( 1 << 14 ) ) >> 15; /* round result to 1.15 */
1123 *rA++ = ( sumL + ( 1 << 14 ) ) >> 15; /* round result to 1.15 */
1132 const int16 *x2A, int16 col2A, int16 *rA )
1156 *rA++ = ( sumL + ( 1 << 14 ) ) >> 15; /* round result to 1.15 */
1167 uint16 bbs_matTrans( int16 *xA, int16 rowA, int16 colA, int16 *rA )
1177 *rA++ = *sL;
/external/valgrind/VEX/priv/
H A Dguest_ppc_toIR.c1658 /* Standard effective address calc: (rA + rB) */
1659 static IRExpr* ea_rA_idxd ( UInt rA, UInt rB ) argument
1662 vassert(rA < 32);
1664 return binop(mkSzOp(ty, Iop_Add8), getIReg(rA), getIReg(rB));
1667 /* Standard effective address calc: (rA + simm) */
1668 static IRExpr* ea_rA_simm ( UInt rA, UInt simm16 ) argument
1671 vassert(rA < 32);
1672 return binop(mkSzOp(ty, Iop_Add8), getIReg(rA),
1676 /* Standard effective address calc: (rA|0) */
1677 static IRExpr* ea_rAor0 ( UInt rA )
1689 ea_rAor0_idxd( UInt rA, UInt rB ) argument
1697 ea_rAor0_simm( UInt rA, UInt simm16 ) argument
3378 IRTemp rA = newTemp(ty); local
4134 IRTemp rA = newTemp(ty); local
4511 IRTemp rA = newTemp(ty); local
4645 IRTemp rA = newTemp(ty); local
6671 IRTemp rA = newTemp(ty); local
7347 IRTemp rA = newTemp(ty); local
7373 IRTemp rA = newTemp( Ity_I32 ); local
7397 IRTemp rA = newTemp( Ity_I32 ); local
7742 IRTemp rA = newTemp(ty); local
7881 IRTemp rA = newTemp(ty); local
19959 UInt rA = ifieldRegA( theInstr ); local
[all...]
H A Dhost_tilegx_defs.c1351 UInt rA; local
1354 rA = iregNo(am->GXam.IR.base);
1361 51, rA, am->GXam.IR.index));
1365 /* store rSD to address in rA */
1366 p = mkInsnBin(p, mkTileGxInsn(opc1, 2, rA, rSD));
1372 51, rA, am->GXam.IR.index));
1376 /* load from address in rA to rSD. */
1377 p = mkInsnBin(p, mkTileGxInsn(opc1, 2, rSD, rA));
1388 UInt rA = iregNo(am->GXam.IR.base); local
1396 51, rA, a
[all...]
H A Dhost_mips_defs.c2172 UInt rA, idx, r_dst; local
2176 rA = iregNo(am->Mam.IR.base, mode64);
2194 p = mkFormI(p, opc1, rA, r_dst, idx);
2212 UInt rA, rB, r_dst; local
2215 rA = iregNo(am->Mam.RR.base, mode64);
2234 /* daddu rA, rA, rB$
2235 sd/ld r_dst, 0(rA)$
2236 dsubu rA, rA, r
[all...]
H A Dguest_arm_toIR.c10921 UInt rD = 99, rN = 99, rM = 99, rA = 99; local
10927 rA = INSNT1(15,12);
10930 if (!isBadRegT(rD) && !isBadRegT(rN) && !isBadRegT(rM) && rA != 13)
10937 rA = INSNA(15,12);
10940 if (rD != 15 && rN != 15 && rM != 15 /* but rA can be 15 */)
10944 /* We allow rA == 15, to denote the usad8 (no accumulator) case. */
10949 IRExpr* rAe = rA == 15 ? mkU32(0)
10950 : (isT ? getIRegT(rA) : getIRegA(rA));
10959 if (rA
12336 UInt rD = 99, rN = 99, rM = 99, rA = 99; local
16748 UInt rA = INSN(15,12); local
20943 UInt rA = INSN1(15,12); local
21074 UInt rA = INSN1(15,12); local
[all...]
H A Dhost_arm_isel.c1963 HReg tLo, tHi, rA; local
1965 rA = iselIntExpr_R(env, e->Iex.Load.addr);
1969 tHi, ARMAMode1_RI(rA, 4)));
1971 tLo, ARMAMode1_RI(rA, 0)));
5728 HReg rDhi, rDlo, rA; local
5730 rA = iselIntExpr_R(env, stmt->Ist.Store.addr);
5732 ARMAMode1_RI(rA,4)));
5734 ARMAMode1_RI(rA,0)));
6109 HReg rA = iselIntExpr_R(env, stmt->Ist.LLSC.addr); local
6117 addInstr(env, mk_iMOVds_RR(hregARM_R4(), rA));
6128 HReg rA = iselIntExpr_R(env, stmt->Ist.LLSC.addr); local
[all...]
H A Dhost_amd64_isel.c3768 HReg rA = iselIntExpr_R(env, e->Iex.Load.addr); local
3769 AMD64AMode* am0 = AMD64AMode_IR(0, rA);
3770 AMD64AMode* am16 = AMD64AMode_IR(16, rA);
4383 HReg rA = iselIntExpr_R(env, stmt->Ist.Store.addr); local
4384 AMD64AMode* am0 = AMD64AMode_IR(0, rA);
4385 AMD64AMode* am16 = AMD64AMode_IR(16, rA);
H A Dhost_x86_isel.c3905 HReg vHi, vLo, rA; local
3907 rA = iselIntExpr_R(env, stmt->Ist.Store.addr);
3909 Xalu_MOV, X86RI_Reg(vLo), X86AMode_IR(0, rA)));
3911 Xalu_MOV, X86RI_Reg(vHi), X86AMode_IR(4, rA)));
H A Dhost_ppc_defs.c3356 UInt rA, idx; local
3360 rA = iregEnc(am->Pam.IR.base, mode64);
3369 p = mkFormD(p, opc1, rSD, rA, idx, endness_host);
3377 UInt rA, rB; local
3380 rA = iregEnc(am->Pam.RR.base, mode64);
3383 p = mkFormX(p, opc1, rSD, rA, rB, opc2, 0, endness_host);
4673 // Use rA==0, so that EA == rB == ir_addr
4674 p = mkFormX(p, 31, fr_data, 0/*rA=0*/, ir_addr, 983, 0, endness_host);
H A Dhost_arm64_isel.c3803 HReg rA = iselIntExpr_R(env, stmt->Ist.LLSC.addr); local
3812 addInstr(env, ARM64Instr_MovI(hregARM64_X4(), rA));
/external/mesa3d/src/gallium/auxiliary/rtasm/
H A Drtasm_ppc.c706 /** vector store: store vR at mem[rA+rB] */
708 ppc_stvx(struct ppc_function *p, uint vR, uint rA, uint rB) argument
710 emit_x(p, 31, vR, rA, rB, 231, "stvx\tv%u, r%u, r%u\n");
713 /** vector load: vR = mem[rA+rB] */
715 ppc_lvx(struct ppc_function *p, uint vR, uint rA, uint rB) argument
717 emit_x(p, 31, vR, rA, rB, 103, "lvx\tv%u, r%u, r%u\n");
722 ppc_lvewx(struct ppc_function *p, uint vR, uint rA, uint rB) argument
724 emit_x(p, 31, vR, rA, rB, 71, "lvewx\tv%u, r%u, r%u\n");
/external/sqlite/dist/orig/
H A Dsqlite3.c72285 double rA; /* Real value of left operand */ local
[all...]
/external/sqlite/dist/
H A Dsqlite3.c72303 double rA; /* Real value of left operand */ local
[all...]
/external/v8/tools/profviz/
H A Dgnuplot-4.6.3-emscripten.js[all...]

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