Searched refs:vassert (Results 1 - 25 of 46) sorted by relevance

12

/external/valgrind/VEX/priv/
H A Dir_match.h55 vassert(vexGetAllocMode() == VexAllocModeTEMP); \
59 vassert(vexGetAllocMode() == VexAllocModeTEMP); \
H A Dmain_main.c82 Otherwise, the macros expand to respectively NULL and vassert(0).
94 #define X86ST(f) vassert(0)
102 #define AMD64ST(f) vassert(0)
110 #define PPC32ST(f) vassert(0)
118 #define PPC64ST(f) vassert(0)
126 #define S390ST(f) vassert(0)
134 #define ARMST(f) vassert(0)
142 #define ARM64ST(f) vassert(0)
150 #define MIPS32ST(f) vassert(0)
158 #define MIPS64ST(f) vassert(
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H A Dmain_util.c80 vassert(temporary_first == &temporary[0]);
81 vassert(temporary_last == &temporary[N_TEMPORARY_BYTES-1]);
82 vassert(permanent_first == &permanent[0]);
83 vassert(permanent_last == &permanent[N_PERMANENT_BYTES-1]);
84 vassert(temporary_first <= temporary_curr);
85 vassert(temporary_curr <= temporary_last);
86 vassert(permanent_first <= permanent_curr);
87 vassert(permanent_curr <= permanent_last);
88 vassert(private_LibVEX_alloc_first <= private_LibVEX_alloc_curr);
89 vassert(private_LibVEX_alloc_cur
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H A Dhost_generic_reg_alloc2.c175 vassert(search_from_instr >= 0);
179 vassert(state[k].disp == Bound);
199 vassert(0 == ((UShort)vreg->spill_offset % 16)); break;
201 vassert(0 == ((UShort)vreg->spill_offset % 8)); break;
214 vassert(used == *size);
242 vassert(size >= 0);
450 vassert(0 == (guest_sizeB % LibVEX_GUEST_STATE_ALIGN));
451 vassert(0 == (LibVEX_N_SPILL_BYTES % LibVEX_GUEST_STATE_ALIGN));
452 vassert(0 == (N_SPILL64S % 2));
457 vassert(instrs_i
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H A Dhost_generic_regs.c103 vassert(univ->size > 0);
104 vassert(univ->size <= N_RREGUNIVERSE_REGS);
105 vassert(univ->allocable <= univ->size);
108 vassert(!hregIsInvalid(reg));
109 vassert(!hregIsVirtual(reg));
110 vassert(hregIndex(reg) == i);
114 vassert(hregIsInvalid(reg));
127 vassert(N_RREGUNIVERSE_REGS == 64);
177 vassert(tab->n_vRegs < N_HREGUSAGE_VREGS);
202 vassert(i
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H A Dhost_arm64_defs.c156 vassert(r >= 0 && r < 31);
161 vassert(r >= 0 && r < 32);
166 vassert(r >= 0 && r < 32);
217 vassert(-256 <= simm9 && simm9 <= 255);
227 vassert(uimm12 >= 0 && uimm12 <= 4095);
230 default: vassert(0);
264 vassert(0);
310 vassert(imm12 < 4096);
311 vassert(shift == 0 || shift == 12);
331 vassert(
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H A Dhost_generic_regs.h136 vassert(ix <= 0xFFFFF);
137 vassert(enc <= 0x7F);
138 vassert(((UInt)rc) <= 0xF);
139 vassert(((UInt)virtual) <= 1);
140 if (virtual) vassert(enc == 0);
152 vassert(rc >= HRcInt32 && rc <= HRcVec128);
412 vassert(pri >= RLPri_INVALID && pri <= RLPri_2Int);
417 vassert(pri >= RLPri_V128SpRel && pri <= RLPri_V256SpRel);
H A Dhost_tilegx_defs.c79 vassert(hregClass(reg) == HRcInt32 || hregClass(reg) == HRcInt64 ||
87 vassert(r >= 0 && r < 64);
92 vassert(r >= 0 && r < 64);
97 vassert(r >= 0 && r < 64);
393 vassert(0);
622 vassert(imm16 != 0x8000);
623 vassert(syned == True || syned == False);
812 vassert(0 == (argiregs & ~mask));
828 vassert(0 == (argiregs & ~mask));
889 vassert(s
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H A Dhost_arm64_isel.c117 vassert(tmp >= 0);
118 vassert(tmp < env->n_vregmap);
125 vassert(tmp >= 0);
126 vassert(tmp < env->n_vregmap);
127 vassert(! hregIsInvalid(env->vregmapHI[tmp]));
234 vassert(off < (8 << 12)); /* otherwise it's unrepresentable */
235 vassert((off & 7) == 0); /* ditto */
242 vassert(off < (4 << 12)); /* otherwise it's unrepresentable */
243 vassert((off & 3) == 0); /* ditto */
250 vassert(of
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H A Dguest_generic_bb_to_IR.c225 vassert(sizeof(HWord) == sizeof(void*));
226 vassert(vex_control.guest_max_insns >= 1);
227 vassert(vex_control.guest_max_insns <= 100);
228 vassert(vex_control.guest_chase_thresh >= 0);
229 vassert(vex_control.guest_chase_thresh < vex_control.guest_max_insns);
230 vassert(guest_word_type == Ity_I32 || guest_word_type == Ity_I64);
233 vassert(szB_GUEST_IP == 4);
234 vassert((offB_GUEST_IP % 4) == 0);
236 vassert(szB_GUEST_IP == 8);
237 vassert((offB_GUEST_I
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H A Dhost_mips_defs.c162 vassert(hregClass(reg) == HRcInt32 || hregClass(reg) == HRcInt64 ||
169 vassert(r >= 0 && r < 32);
174 vassert (r >= 0 && r < 32);
179 vassert(r >= 0 && r < 32);
184 vassert(r >= 0 && r < 32);
592 vassert(imm16 != 0x8000);
593 vassert(syned == True || syned == False);
700 vassert(immR == False); /*there's no nor with an immediate operand!? */
883 vassert(0 == (argiregs & ~mask));
884 vassert(is_sane_RetLo
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H A Dir_opt.c254 vassert(h->used < h->size);
486 vassert(d2->mAddr == NULL);
560 vassert((*minoff & ~0xFFFF) == 0);
561 vassert((*maxoff & ~0xFFFF) == 0);
562 vassert(*minoff <= *maxoff);
572 vassert((minoff & ~0xFFFF) == 0);
573 vassert((maxoff & ~0xFFFF) == 0);
581 vassert((minoff & ~0xFFFF) == 0);
582 vassert((maxoff & ~0xFFFF) == 0);
594 vassert(k_l
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H A Dguest_arm64_toIR.c150 vassert(n > 1 && n < 64);
167 //ZZ vassert(sh >= 0 && sh < 32);
260 vassert(i < 65536);
266 vassert(i < 256);
341 //ZZ vassert(0);
343 //ZZ vassert(loaded != NULL);
357 vassert(isPlausibleIRType(ty));
371 vassert(t1 && *t1 == IRTemp_INVALID);
372 vassert(t2 && *t2 == IRTemp_INVALID);
380 vassert(t
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H A Dhost_ppc_defs.c170 vassert(r >= 0 && r < 32);
175 vassert(r >= 0 && r < 32);
180 vassert(r >= 0 && r < 32);
185 vassert(r >= 0 && r < 32);
222 vassert(flag == Pcf_NONE);
224 vassert(flag != Pcf_NONE);
232 vassert(ct != Pct_ALWAYS);
241 vassert(idx >= -0x8000 && idx < 0x8000);
324 vassert(imm16 != 0x8000);
325 vassert(syne
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H A Dhost_mips_isel.c135 vassert(tmp >= 0);
136 vassert(tmp < env->n_vregmap);
142 vassert(tmp >= 0);
143 vassert(tmp < env->n_vregmap);
144 vassert(! hregIsInvalid(env->vregmapHI[tmp]));
152 vassert(env->mode64);
153 vassert(tmp >= 0);
154 vassert(tmp < env->n_vregmap);
155 vassert(! hregIsInvalid(env->vregmapHI[tmp]));
196 vassert(
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H A Dhost_amd64_defs.c119 vassert(r >= 0 && r < 16);
124 vassert(r >= 0 && r < 16);
148 vassert(r >= 0 && r < 16);
200 vassert(shift >= 0 && shift <= 3);
610 vassert(op != Aalu_MUL);
651 default: vassert(0);
668 vassert(sz == 4 || sz == 8);
685 vassert(regparms >= 0 && regparms <= 6);
686 vassert(is_sane_RetLoc(rloc));
726 vassert(con
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H A Dmain_util.h59 #define vassert(expr) \ macro
146 vassert(offsetof(struct align,x) <= REQ_ALIGN);
H A Dhost_ppc_isel.c304 vassert(tmp >= 0);
305 vassert(tmp < env->n_vregmap);
312 vassert(tmp >= 0);
313 vassert(tmp < env->n_vregmap);
314 vassert(! hregIsInvalid(env->vregmapMedLo[tmp]));
323 vassert(!env->mode64);
324 vassert(tmp >= 0);
325 vassert(tmp < env->n_vregmap);
326 vassert(! hregIsInvalid(env->vregmapMedLo[tmp]));
515 vassert(hregClas
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H A Dhost_x86_isel.c195 vassert(tmp >= 0);
196 vassert(tmp < env->n_vregmap);
202 vassert(tmp >= 0);
203 vassert(tmp < env->n_vregmap);
204 vassert(! hregIsInvalid(env->vregmapHI[tmp]));
291 vassert(hregClass(src) == HRcInt32);
292 vassert(hregClass(dst) == HRcInt32);
301 vassert(hregClass(src) == HRcVec128);
302 vassert(hregClass(dst) == HRcVec128);
310 vassert(
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H A Ds390_disasm.c35 #include "main_util.h" // vassert
45 vassert(vex_strlen(mnm) <= S390_MAX_MNEMONIC_LEN);
66 vassert(archreg < 16);
83 vassert(archreg < 16);
100 vassert(archreg < 16);
122 vassert(vex_strlen(base) + sizeof suffix[0] <= sizeof buf);
156 vassert(vex_strlen(prefix) + vex_strlen(suffix) +
470 vassert(p < buf + sizeof buf); /* detect buffer overwrite */
H A Dhost_arm_isel.c131 vassert(tmp >= 0);
132 vassert(tmp < env->n_vregmap);
138 vassert(tmp >= 0);
139 vassert(tmp < env->n_vregmap);
140 vassert(! hregIsInvalid(env->vregmapHI[tmp]));
257 vassert(sh >= 0 && sh < 32);
277 vassert(i == 16);
284 vassert(hregClass(src) == HRcInt32);
285 vassert(hregClass(dst) == HRcInt32);
393 vassert(ARM_N_ARGREG
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H A Dhost_s390_defs.c69 vassert(ix >= 0);
77 vassert(ix >= 0);
119 vassert(r < 16);
165 vassert(fits_unsigned_12bit(d));
182 vassert(fits_signed_20bit(d));
199 vassert(fits_unsigned_12bit(d));
200 vassert(hregNumber(b) != 0);
201 vassert(hregNumber(x) != 0);
218 vassert(fits_signed_20bit(d));
219 vassert(hregNumbe
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H A Dhost_tilegx_isel.c121 vassert(tmp >= 0);
122 vassert(tmp < env->n_vregmap);
184 vassert(hregClass(r_dst) == hregClass(r_src));
185 vassert(hregClass(r_src) == HRcInt32 || hregClass(r_src) == HRcInt64);
303 vassert(argreg < TILEGX_N_REGPARMS);
304 vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32 ||
320 vassert(argreg < TILEGX_N_REGPARMS);
321 vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32
394 vassert(sane_AMode(env, am));
404 vassert(t
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H A Dguest_arm64_helpers.c101 vassert( ((UInt)(_cc_op)) < ARM64G_CC_OP_NUMBER); \
102 vassert( ((UInt)(_cond)) < 16); \
161 vassert((oldC & ~1) == 0);
171 vassert((oldC & ~1) == 0);
181 vassert((oldC & ~1) == 0);
191 vassert((oldC & ~1) == 0);
279 vassert((oldC & ~1) == 0);
289 vassert((oldC & ~1) == 0);
299 vassert((oldC & ~1) == 0);
309 vassert((old
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H A Dguest_arm_helpers.c98 vassert( ((UInt)(_cc_op)) < ARMG_CC_OP_NUMBER); \
145 vassert((oldC & ~1) == 0);
155 vassert((oldC & ~1) == 0);
225 vassert((oldC & ~1) == 0);
235 vassert((oldC & ~1) == 0);
305 vassert((oldC & ~1) == 0);
315 vassert((oldC & ~1) == 0);
322 vassert((shco & ~1) == 0);
329 vassert((cc_dep3 & ~3) == 0);
336 vassert((cc_dep
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