1d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers/* 2d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * Copyright (C) 2014 The Android Open Source Project 3d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * 4d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * Licensed under the Apache License, Version 2.0 (the "License"); 5d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * you may not use this file except in compliance with the License. 6d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * You may obtain a copy of the License at 7d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * 8d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * http://www.apache.org/licenses/LICENSE-2.0 9d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * 10d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * Unless required by applicable law or agreed to in writing, software 11d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * distributed under the License is distributed on an "AS IS" BASIS, 12d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * See the License for the specific language governing permissions and 14d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers * limitations under the License. 15d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers */ 16d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 17d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers#ifndef ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_ 18d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers#define ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_ 19d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 20d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers#include "arch/instruction_set_features.h" 21d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 22d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogersnamespace art { 23d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 24d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers// Instruction set features relevant to the MIPS architecture. 25d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogersclass MipsInstructionSetFeatures FINAL : public InstructionSetFeatures { 26d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers public: 27d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Process a CPU variant string like "r4000" and create InstructionSetFeatures. 28d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers static const MipsInstructionSetFeatures* FromVariant(const std::string& variant, 29d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers std::string* error_msg); 30d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 31d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Parse a bitmap and create an InstructionSetFeatures. 32d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers static const MipsInstructionSetFeatures* FromBitmap(uint32_t bitmap); 33d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 34d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Turn C pre-processor #defines into the equivalent instruction set features. 35d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers static const MipsInstructionSetFeatures* FromCppDefines(); 36d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 37d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Process /proc/cpuinfo and use kRuntimeISA to produce InstructionSetFeatures. 38d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers static const MipsInstructionSetFeatures* FromCpuInfo(); 39d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 40d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Process the auxiliary vector AT_HWCAP entry and use kRuntimeISA to produce 41d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // InstructionSetFeatures. 42d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers static const MipsInstructionSetFeatures* FromHwcap(); 43d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 44d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Use assembly tests of the current runtime (ie kRuntimeISA) to determine the 45d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // InstructionSetFeatures. This works around kernel bugs in AT_HWCAP and /proc/cpuinfo. 46d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers static const MipsInstructionSetFeatures* FromAssembly(); 47d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 48d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers bool Equals(const InstructionSetFeatures* other) const OVERRIDE; 49d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 50d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers InstructionSet GetInstructionSet() const OVERRIDE { 51d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers return kMips; 52d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers } 53d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 54d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers uint32_t AsBitmap() const OVERRIDE; 55d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 56d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers std::string GetFeatureString() const OVERRIDE; 57d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 58d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Is this an ISA revision greater than 2 opening up new opcodes. 59d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers bool IsMipsIsaRevGreaterThanEqual2() const { 60d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers return mips_isa_gte2_; 61d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers } 62d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 63d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Floating point double registers are encoded differently based on whether the Status.FR bit is 64d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // set. When the FR bit is 0 then the FPU is 32-bit, 1 its 64-bit. Return true if the code should 65d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // be generated assuming Status.FR is 0. 66d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers bool Is32BitFloatingPoint() const { 67d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers return fpu_32bit_; 68d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers } 69d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 70c5a3ea7522b59c18daa4325d69703a6f7f743378Andreas Gampe bool IsR6() const { 71c5a3ea7522b59c18daa4325d69703a6f7f743378Andreas Gampe return r6_; 72c5a3ea7522b59c18daa4325d69703a6f7f743378Andreas Gampe } 73c5a3ea7522b59c18daa4325d69703a6f7f743378Andreas Gampe 74d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers virtual ~MipsInstructionSetFeatures() {} 75d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 76d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers protected: 77d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Parse a vector of the form "fpu32", "mips2" adding these to a new MipsInstructionSetFeatures. 78d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers virtual const InstructionSetFeatures* 79d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers AddFeaturesFromSplitString(const bool smp, const std::vector<std::string>& features, 80d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers std::string* error_msg) const OVERRIDE; 81d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 82d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers private: 83c5a3ea7522b59c18daa4325d69703a6f7f743378Andreas Gampe MipsInstructionSetFeatures(bool smp, bool fpu_32bit, bool mips_isa_gte2, bool r6) 84c5a3ea7522b59c18daa4325d69703a6f7f743378Andreas Gampe : InstructionSetFeatures(smp), fpu_32bit_(fpu_32bit), mips_isa_gte2_(mips_isa_gte2), r6_(r6) 85c5a3ea7522b59c18daa4325d69703a6f7f743378Andreas Gampe {} 86d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 87d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers // Bitmap positions for encoding features as a bitmap. 88d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers enum { 89d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers kSmpBitfield = 1, 90d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers kFpu32Bitfield = 2, 91d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers kIsaRevGte2Bitfield = 4, 92c5a3ea7522b59c18daa4325d69703a6f7f743378Andreas Gampe kR6 = 8, 93d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers }; 94d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 95d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers const bool fpu_32bit_; 96d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers const bool mips_isa_gte2_; 97c5a3ea7522b59c18daa4325d69703a6f7f743378Andreas Gampe const bool r6_; 98d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 99d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers DISALLOW_COPY_AND_ASSIGN(MipsInstructionSetFeatures); 100d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers}; 101d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 102d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers} // namespace art 103d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers 104d582fa4ea62083a7598dded5b82dc2198b3daac7Ian Rogers#endif // ART_RUNTIME_ARCH_MIPS_INSTRUCTION_SET_FEATURES_MIPS_H_ 105