1// REQUIRES: arm-registered-target 2// RUN: %clang_cc1 -triple thumbv7-apple-darwin \ 3// RUN: -target-abi apcs-gnu \ 4// RUN: -target-cpu cortex-a8 \ 5// RUN: -mfloat-abi soft \ 6// RUN: -target-feature +soft-float-abi \ 7// RUN: -ffreestanding \ 8// RUN: -emit-llvm -w -o - %s | FileCheck %s 9 10#include <arm_neon.h> 11 12// Radar 9311427: Check that alignment specifier is used in Neon load/store 13// intrinsics. 14typedef float AlignedAddr __attribute__ ((aligned (16))); 15void t1(AlignedAddr *addr1, AlignedAddr *addr2) { 16// CHECK: @t1 17// CHECK: call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %{{.*}}, i32 16) 18 float32x4_t a = vld1q_f32(addr1); 19// CHECK: call void @llvm.arm.neon.vst1.v4f32(i8* %{{.*}}, <4 x float> %{{.*}}, i32 16) 20 vst1q_f32(addr2, a); 21} 22 23// Radar 10538555: Make sure unaligned load/stores do not gain alignment. 24void t2(char *addr) { 25// CHECK: @t2 26// CHECK: load i32, i32* %{{.*}}, align 1 27 int32x2_t vec = vld1_dup_s32(addr); 28// CHECK: store i32 %{{.*}}, i32* {{.*}}, align 1 29 vst1_lane_s32(addr, vec, 1); 30} 31