vpx_dsp.mk revision 7ce0a1d1337c01056ba24006efab21f00e179e04
1## 2## Copyright (c) 2015 The WebM project authors. All Rights Reserved. 3## 4## Use of this source code is governed by a BSD-style license 5## that can be found in the LICENSE file in the root of the source 6## tree. An additional intellectual property rights grant can be found 7## in the file PATENTS. All contributing project authors may 8## be found in the AUTHORS file in the root of the source tree. 9## 10 11DSP_SRCS-yes += vpx_dsp.mk 12DSP_SRCS-yes += vpx_dsp_common.h 13 14DSP_SRCS-$(HAVE_MSA) += mips/macros_msa.h 15 16# bit reader 17DSP_SRCS-yes += prob.h 18DSP_SRCS-yes += prob.c 19 20ifeq ($(CONFIG_ENCODERS),yes) 21DSP_SRCS-yes += bitwriter.h 22DSP_SRCS-yes += bitwriter.c 23DSP_SRCS-yes += bitwriter_buffer.c 24DSP_SRCS-yes += bitwriter_buffer.h 25DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.c 26DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.h 27DSP_SRCS-$(CONFIG_INTERNAL_STATS) += psnrhvs.c 28DSP_SRCS-$(CONFIG_INTERNAL_STATS) += fastssim.c 29endif 30 31ifeq ($(CONFIG_DECODERS),yes) 32DSP_SRCS-yes += bitreader.h 33DSP_SRCS-yes += bitreader.c 34DSP_SRCS-yes += bitreader_buffer.c 35DSP_SRCS-yes += bitreader_buffer.h 36endif 37 38# intra predictions 39ifneq ($(filter yes,$(CONFIG_VP9) $(CONFIG_VP10)),) 40DSP_SRCS-yes += intrapred.c 41 42ifeq ($(CONFIG_USE_X86INC),yes) 43DSP_SRCS-$(HAVE_SSE) += x86/intrapred_sse2.asm 44DSP_SRCS-$(HAVE_SSE2) += x86/intrapred_sse2.asm 45DSP_SRCS-$(HAVE_SSSE3) += x86/intrapred_ssse3.asm 46endif # CONFIG_USE_X86INC 47 48ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 49ifeq ($(CONFIG_USE_X86INC),yes) 50DSP_SRCS-$(HAVE_SSE) += x86/highbd_intrapred_sse2.asm 51DSP_SRCS-$(HAVE_SSE2) += x86/highbd_intrapred_sse2.asm 52endif # CONFIG_USE_X86INC 53endif # CONFIG_VP9_HIGHBITDEPTH 54 55DSP_SRCS-$(HAVE_NEON_ASM) += arm/intrapred_neon_asm$(ASM) 56DSP_SRCS-$(HAVE_NEON) += arm/intrapred_neon.c 57DSP_SRCS-$(HAVE_MSA) += mips/intrapred_msa.c 58DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred4_dspr2.c 59DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred8_dspr2.c 60DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred16_dspr2.c 61endif # CONFIG_VP9 || CONFIG_VP10 62 63DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.h 64DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.c 65 66# interpolation filters 67DSP_SRCS-yes += vpx_convolve.c 68DSP_SRCS-yes += vpx_convolve.h 69DSP_SRCS-yes += vpx_filter.h 70 71DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/convolve.h 72DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/vpx_asm_stubs.c 73DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_8t_sse2.asm 74DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_bilinear_sse2.asm 75DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm 76DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_bilinear_ssse3.asm 77DSP_SRCS-$(HAVE_AVX2) += x86/vpx_subpixel_8t_intrin_avx2.c 78DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_intrin_ssse3.c 79ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 80DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_8t_sse2.asm 81DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_bilinear_sse2.asm 82endif 83ifeq ($(CONFIG_USE_X86INC),yes) 84DSP_SRCS-$(HAVE_SSE2) += x86/vpx_convolve_copy_sse2.asm 85endif 86 87ifeq ($(HAVE_NEON_ASM),yes) 88DSP_SRCS-yes += arm/vpx_convolve_copy_neon_asm$(ASM) 89DSP_SRCS-yes += arm/vpx_convolve8_avg_neon_asm$(ASM) 90DSP_SRCS-yes += arm/vpx_convolve8_neon_asm$(ASM) 91DSP_SRCS-yes += arm/vpx_convolve_avg_neon_asm$(ASM) 92DSP_SRCS-yes += arm/vpx_convolve_neon.c 93else 94ifeq ($(HAVE_NEON),yes) 95DSP_SRCS-yes += arm/vpx_convolve_copy_neon.c 96DSP_SRCS-yes += arm/vpx_convolve8_avg_neon.c 97DSP_SRCS-yes += arm/vpx_convolve8_neon.c 98DSP_SRCS-yes += arm/vpx_convolve_avg_neon.c 99DSP_SRCS-yes += arm/vpx_convolve_neon.c 100endif # HAVE_NEON 101endif # HAVE_NEON_ASM 102 103# common (msa) 104DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_horiz_msa.c 105DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_msa.c 106DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_vert_msa.c 107DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_horiz_msa.c 108DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_msa.c 109DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_vert_msa.c 110DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_avg_msa.c 111DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_copy_msa.c 112DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_msa.h 113 114# common (dspr2) 115DSP_SRCS-$(HAVE_DSPR2) += mips/convolve_common_dspr2.h 116DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_dspr2.c 117DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_horiz_dspr2.c 118DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_dspr2.c 119DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_horiz_dspr2.c 120DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_vert_dspr2.c 121DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_dspr2.c 122DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_horiz_dspr2.c 123DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_dspr2.c 124DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_horiz_dspr2.c 125DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_vert_dspr2.c 126 127# loop filters 128DSP_SRCS-yes += loopfilter.c 129 130DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/loopfilter_sse2.c 131DSP_SRCS-$(HAVE_AVX2) += x86/loopfilter_avx2.c 132DSP_SRCS-$(HAVE_MMX) += x86/loopfilter_mmx.asm 133 134DSP_SRCS-$(HAVE_NEON) += arm/loopfilter_neon.c 135ifeq ($(HAVE_NEON_ASM),yes) 136DSP_SRCS-yes += arm/loopfilter_mb_neon$(ASM) 137DSP_SRCS-yes += arm/loopfilter_16_neon$(ASM) 138DSP_SRCS-yes += arm/loopfilter_8_neon$(ASM) 139DSP_SRCS-yes += arm/loopfilter_4_neon$(ASM) 140else 141ifeq ($(HAVE_NEON),yes) 142DSP_SRCS-yes += arm/loopfilter_16_neon.c 143DSP_SRCS-yes += arm/loopfilter_8_neon.c 144DSP_SRCS-yes += arm/loopfilter_4_neon.c 145endif # HAVE_NEON 146endif # HAVE_NEON_ASM 147 148DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_msa.h 149DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_16_msa.c 150DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_8_msa.c 151DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_4_msa.c 152DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.h 153DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.c 154DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_macros_dspr2.h 155DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_masks_dspr2.h 156DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_dspr2.c 157DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_horiz_dspr2.c 158DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_vert_dspr2.c 159 160ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 161DSP_SRCS-$(HAVE_SSE2) += x86/highbd_loopfilter_sse2.c 162endif # CONFIG_VP9_HIGHBITDEPTH 163 164DSP_SRCS-yes += txfm_common.h 165DSP_SRCS-$(HAVE_SSE2) += x86/txfm_common_sse2.h 166DSP_SRCS-$(HAVE_MSA) += mips/txfm_macros_msa.h 167# forward transform 168ifneq ($(filter yes,$(CONFIG_VP9_ENCODER) $(CONFIG_VP10_ENCODER)),) 169DSP_SRCS-yes += fwd_txfm.c 170DSP_SRCS-yes += fwd_txfm.h 171DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.h 172DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.c 173DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_impl_sse2.h 174DSP_SRCS-$(HAVE_SSE2) += x86/fwd_dct32x32_impl_sse2.h 175ifeq ($(ARCH_X86_64),yes) 176ifeq ($(CONFIG_USE_X86INC),yes) 177DSP_SRCS-$(HAVE_SSSE3) += x86/fwd_txfm_ssse3_x86_64.asm 178endif 179endif 180DSP_SRCS-$(HAVE_AVX2) += x86/fwd_txfm_avx2.c 181DSP_SRCS-$(HAVE_AVX2) += x86/fwd_dct32x32_impl_avx2.h 182DSP_SRCS-$(HAVE_NEON) += arm/fwd_txfm_neon.c 183DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.h 184DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.c 185DSP_SRCS-$(HAVE_MSA) += mips/fwd_dct32x32_msa.c 186endif # CONFIG_VP9_ENCODER || CONFIG_VP10_ENCODER 187 188# inverse transform 189ifneq ($(filter yes,$(CONFIG_VP9) $(CONFIG_VP10)),) 190DSP_SRCS-yes += inv_txfm.h 191DSP_SRCS-yes += inv_txfm.c 192DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.h 193DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.c 194ifeq ($(CONFIG_USE_X86INC),yes) 195DSP_SRCS-$(HAVE_SSE2) += x86/inv_wht_sse2.asm 196ifeq ($(ARCH_X86_64),yes) 197DSP_SRCS-$(HAVE_SSSE3) += x86/inv_txfm_ssse3_x86_64.asm 198endif # ARCH_X86_64 199endif # CONFIG_USE_X86INC 200 201ifeq ($(HAVE_NEON_ASM),yes) 202DSP_SRCS-yes += arm/save_reg_neon$(ASM) 203DSP_SRCS-yes += arm/idct4x4_1_add_neon$(ASM) 204DSP_SRCS-yes += arm/idct4x4_add_neon$(ASM) 205DSP_SRCS-yes += arm/idct8x8_1_add_neon$(ASM) 206DSP_SRCS-yes += arm/idct8x8_add_neon$(ASM) 207DSP_SRCS-yes += arm/idct16x16_1_add_neon$(ASM) 208DSP_SRCS-yes += arm/idct16x16_add_neon$(ASM) 209DSP_SRCS-yes += arm/idct32x32_1_add_neon$(ASM) 210DSP_SRCS-yes += arm/idct32x32_add_neon$(ASM) 211else 212ifeq ($(HAVE_NEON),yes) 213DSP_SRCS-yes += arm/idct4x4_1_add_neon.c 214DSP_SRCS-yes += arm/idct4x4_add_neon.c 215DSP_SRCS-yes += arm/idct8x8_1_add_neon.c 216DSP_SRCS-yes += arm/idct8x8_add_neon.c 217DSP_SRCS-yes += arm/idct16x16_1_add_neon.c 218DSP_SRCS-yes += arm/idct16x16_add_neon.c 219DSP_SRCS-yes += arm/idct32x32_1_add_neon.c 220DSP_SRCS-yes += arm/idct32x32_add_neon.c 221endif # HAVE_NEON 222endif # HAVE_NEON_ASM 223DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_neon.c 224 225DSP_SRCS-$(HAVE_MSA) += mips/inv_txfm_msa.h 226DSP_SRCS-$(HAVE_MSA) += mips/idct4x4_msa.c 227DSP_SRCS-$(HAVE_MSA) += mips/idct8x8_msa.c 228DSP_SRCS-$(HAVE_MSA) += mips/idct16x16_msa.c 229DSP_SRCS-$(HAVE_MSA) += mips/idct32x32_msa.c 230 231ifneq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 232DSP_SRCS-$(HAVE_DSPR2) += mips/inv_txfm_dspr2.h 233DSP_SRCS-$(HAVE_DSPR2) += mips/itrans4_dspr2.c 234DSP_SRCS-$(HAVE_DSPR2) += mips/itrans8_dspr2.c 235DSP_SRCS-$(HAVE_DSPR2) += mips/itrans16_dspr2.c 236DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_dspr2.c 237DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_cols_dspr2.c 238endif # CONFIG_VP9_HIGHBITDEPTH 239endif # CONFIG_VP9 || CONFIG_VP10 240 241# quantization 242ifneq ($(filter yes, $(CONFIG_VP9_ENCODER) $(CONFIG_VP10_ENCODER)),) 243DSP_SRCS-yes += quantize.c 244DSP_SRCS-yes += quantize.h 245 246DSP_SRCS-$(HAVE_SSE2) += x86/quantize_sse2.c 247ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 248DSP_SRCS-$(HAVE_SSE2) += x86/highbd_quantize_intrin_sse2.c 249endif 250ifeq ($(ARCH_X86_64),yes) 251ifeq ($(CONFIG_USE_X86INC),yes) 252DSP_SRCS-$(HAVE_SSSE3) += x86/quantize_ssse3_x86_64.asm 253endif 254endif 255endif # CONFIG_VP9_ENCODER || CONFIG_VP10_ENCODER 256 257ifeq ($(CONFIG_ENCODERS),yes) 258DSP_SRCS-yes += sad.c 259DSP_SRCS-yes += subtract.c 260 261DSP_SRCS-$(HAVE_MEDIA) += arm/sad_media$(ASM) 262DSP_SRCS-$(HAVE_NEON) += arm/sad4d_neon.c 263DSP_SRCS-$(HAVE_NEON) += arm/sad_neon.c 264DSP_SRCS-$(HAVE_NEON) += arm/subtract_neon.c 265 266DSP_SRCS-$(HAVE_MSA) += mips/sad_msa.c 267DSP_SRCS-$(HAVE_MSA) += mips/subtract_msa.c 268 269DSP_SRCS-$(HAVE_MMX) += x86/sad_mmx.asm 270DSP_SRCS-$(HAVE_SSE3) += x86/sad_sse3.asm 271DSP_SRCS-$(HAVE_SSSE3) += x86/sad_ssse3.asm 272DSP_SRCS-$(HAVE_SSE4_1) += x86/sad_sse4.asm 273DSP_SRCS-$(HAVE_AVX2) += x86/sad4d_avx2.c 274DSP_SRCS-$(HAVE_AVX2) += x86/sad_avx2.c 275 276ifeq ($(CONFIG_USE_X86INC),yes) 277DSP_SRCS-$(HAVE_SSE) += x86/sad4d_sse2.asm 278DSP_SRCS-$(HAVE_SSE) += x86/sad_sse2.asm 279DSP_SRCS-$(HAVE_SSE2) += x86/sad4d_sse2.asm 280DSP_SRCS-$(HAVE_SSE2) += x86/sad_sse2.asm 281DSP_SRCS-$(HAVE_SSE2) += x86/subtract_sse2.asm 282 283ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 284DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad4d_sse2.asm 285DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad_sse2.asm 286endif # CONFIG_VP9_HIGHBITDEPTH 287endif # CONFIG_USE_X86INC 288 289endif # CONFIG_ENCODERS 290 291ifneq ($(filter yes,$(CONFIG_ENCODERS) $(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),) 292DSP_SRCS-yes += variance.c 293DSP_SRCS-yes += variance.h 294 295DSP_SRCS-$(HAVE_MEDIA) += arm/bilinear_filter_media$(ASM) 296DSP_SRCS-$(HAVE_MEDIA) += arm/subpel_variance_media.c 297DSP_SRCS-$(HAVE_MEDIA) += arm/variance_halfpixvar16x16_h_media$(ASM) 298DSP_SRCS-$(HAVE_MEDIA) += arm/variance_halfpixvar16x16_hv_media$(ASM) 299DSP_SRCS-$(HAVE_MEDIA) += arm/variance_halfpixvar16x16_v_media$(ASM) 300DSP_SRCS-$(HAVE_MEDIA) += arm/variance_media$(ASM) 301DSP_SRCS-$(HAVE_NEON) += arm/subpel_variance_neon.c 302DSP_SRCS-$(HAVE_NEON) += arm/variance_neon.c 303 304DSP_SRCS-$(HAVE_MSA) += mips/variance_msa.c 305DSP_SRCS-$(HAVE_MSA) += mips/sub_pixel_variance_msa.c 306 307DSP_SRCS-$(HAVE_MMX) += x86/variance_mmx.c 308DSP_SRCS-$(HAVE_MMX) += x86/variance_impl_mmx.asm 309DSP_SRCS-$(HAVE_SSE) += x86/variance_sse2.c 310DSP_SRCS-$(HAVE_SSE2) += x86/variance_sse2.c # Contains SSE2 and SSSE3 311DSP_SRCS-$(HAVE_AVX2) += x86/variance_avx2.c 312DSP_SRCS-$(HAVE_AVX2) += x86/variance_impl_avx2.c 313 314ifeq ($(ARCH_X86_64),yes) 315DSP_SRCS-$(HAVE_SSE2) += x86/ssim_opt_x86_64.asm 316endif # ARCH_X86_64 317 318ifeq ($(CONFIG_USE_X86INC),yes) 319DSP_SRCS-$(HAVE_SSE) += x86/subpel_variance_sse2.asm 320DSP_SRCS-$(HAVE_SSE2) += x86/subpel_variance_sse2.asm # Contains SSE2 and SSSE3 321endif # CONFIG_USE_X86INC 322 323ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes) 324DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_sse2.c 325DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_impl_sse2.asm 326ifeq ($(CONFIG_USE_X86INC),yes) 327DSP_SRCS-$(HAVE_SSE2) += x86/highbd_subpel_variance_impl_sse2.asm 328endif # CONFIG_USE_X86INC 329endif # CONFIG_VP9_HIGHBITDEPTH 330endif # CONFIG_ENCODERS || CONFIG_POSTPROC || CONFIG_VP9_POSTPROC 331 332DSP_SRCS-no += $(DSP_SRCS_REMOVE-yes) 333 334DSP_SRCS-yes += vpx_dsp_rtcd.c 335DSP_SRCS-yes += vpx_dsp_rtcd_defs.pl 336 337$(eval $(call rtcd_h_template,vpx_dsp_rtcd,vpx_dsp/vpx_dsp_rtcd_defs.pl)) 338