1//===-- llvm/CodeGen/SelectionDAG.h - InstSelection DAG ---------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file declares the SelectionDAG class, and transitively defines the 11// SDNode class and subclasses. 12// 13//===----------------------------------------------------------------------===// 14 15#ifndef LLVM_CODEGEN_SELECTIONDAG_H 16#define LLVM_CODEGEN_SELECTIONDAG_H 17 18#include "llvm/ADT/DenseSet.h" 19#include "llvm/ADT/SetVector.h" 20#include "llvm/ADT/StringMap.h" 21#include "llvm/ADT/ilist.h" 22#include "llvm/CodeGen/DAGCombine.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/SelectionDAGNodes.h" 25#include "llvm/Support/RecyclingAllocator.h" 26#include "llvm/Target/TargetMachine.h" 27#include <cassert> 28#include <map> 29#include <string> 30#include <vector> 31 32namespace llvm { 33 34class AliasAnalysis; 35class MachineConstantPoolValue; 36class MachineFunction; 37class MDNode; 38class SDDbgValue; 39class TargetLowering; 40class TargetSelectionDAGInfo; 41 42class SDVTListNode : public FoldingSetNode { 43 friend struct FoldingSetTrait<SDVTListNode>; 44 /// A reference to an Interned FoldingSetNodeID for this node. 45 /// The Allocator in SelectionDAG holds the data. 46 /// SDVTList contains all types which are frequently accessed in SelectionDAG. 47 /// The size of this list is not expected to be big so it won't introduce 48 /// a memory penalty. 49 FoldingSetNodeIDRef FastID; 50 const EVT *VTs; 51 unsigned int NumVTs; 52 /// The hash value for SDVTList is fixed, so cache it to avoid 53 /// hash calculation. 54 unsigned HashValue; 55public: 56 SDVTListNode(const FoldingSetNodeIDRef ID, const EVT *VT, unsigned int Num) : 57 FastID(ID), VTs(VT), NumVTs(Num) { 58 HashValue = ID.ComputeHash(); 59 } 60 SDVTList getSDVTList() { 61 SDVTList result = {VTs, NumVTs}; 62 return result; 63 } 64}; 65 66/// Specialize FoldingSetTrait for SDVTListNode 67/// to avoid computing temp FoldingSetNodeID and hash value. 68template<> struct FoldingSetTrait<SDVTListNode> : DefaultFoldingSetTrait<SDVTListNode> { 69 static void Profile(const SDVTListNode &X, FoldingSetNodeID& ID) { 70 ID = X.FastID; 71 } 72 static bool Equals(const SDVTListNode &X, const FoldingSetNodeID &ID, 73 unsigned IDHash, FoldingSetNodeID &TempID) { 74 if (X.HashValue != IDHash) 75 return false; 76 return ID == X.FastID; 77 } 78 static unsigned ComputeHash(const SDVTListNode &X, FoldingSetNodeID &TempID) { 79 return X.HashValue; 80 } 81}; 82 83template<> struct ilist_traits<SDNode> : public ilist_default_traits<SDNode> { 84private: 85 mutable ilist_half_node<SDNode> Sentinel; 86public: 87 SDNode *createSentinel() const { 88 return static_cast<SDNode*>(&Sentinel); 89 } 90 static void destroySentinel(SDNode *) {} 91 92 SDNode *provideInitialHead() const { return createSentinel(); } 93 SDNode *ensureHead(SDNode*) const { return createSentinel(); } 94 static void noteHead(SDNode*, SDNode*) {} 95 96 static void deleteNode(SDNode *) { 97 llvm_unreachable("ilist_traits<SDNode> shouldn't see a deleteNode call!"); 98 } 99private: 100 static void createNode(const SDNode &); 101}; 102 103/// Keeps track of dbg_value information through SDISel. We do 104/// not build SDNodes for these so as not to perturb the generated code; 105/// instead the info is kept off to the side in this structure. Each SDNode may 106/// have one or more associated dbg_value entries. This information is kept in 107/// DbgValMap. 108/// Byval parameters are handled separately because they don't use alloca's, 109/// which busts the normal mechanism. There is good reason for handling all 110/// parameters separately: they may not have code generated for them, they 111/// should always go at the beginning of the function regardless of other code 112/// motion, and debug info for them is potentially useful even if the parameter 113/// is unused. Right now only byval parameters are handled separately. 114class SDDbgInfo { 115 SmallVector<SDDbgValue*, 32> DbgValues; 116 SmallVector<SDDbgValue*, 32> ByvalParmDbgValues; 117 typedef DenseMap<const SDNode*, SmallVector<SDDbgValue*, 2> > DbgValMapType; 118 DbgValMapType DbgValMap; 119 120 void operator=(const SDDbgInfo&) = delete; 121 SDDbgInfo(const SDDbgInfo&) = delete; 122public: 123 SDDbgInfo() {} 124 125 void add(SDDbgValue *V, const SDNode *Node, bool isParameter) { 126 if (isParameter) { 127 ByvalParmDbgValues.push_back(V); 128 } else DbgValues.push_back(V); 129 if (Node) 130 DbgValMap[Node].push_back(V); 131 } 132 133 /// \brief Invalidate all DbgValues attached to the node and remove 134 /// it from the Node-to-DbgValues map. 135 void erase(const SDNode *Node); 136 137 void clear() { 138 DbgValMap.clear(); 139 DbgValues.clear(); 140 ByvalParmDbgValues.clear(); 141 } 142 143 bool empty() const { 144 return DbgValues.empty() && ByvalParmDbgValues.empty(); 145 } 146 147 ArrayRef<SDDbgValue*> getSDDbgValues(const SDNode *Node) { 148 DbgValMapType::iterator I = DbgValMap.find(Node); 149 if (I != DbgValMap.end()) 150 return I->second; 151 return ArrayRef<SDDbgValue*>(); 152 } 153 154 typedef SmallVectorImpl<SDDbgValue*>::iterator DbgIterator; 155 DbgIterator DbgBegin() { return DbgValues.begin(); } 156 DbgIterator DbgEnd() { return DbgValues.end(); } 157 DbgIterator ByvalParmDbgBegin() { return ByvalParmDbgValues.begin(); } 158 DbgIterator ByvalParmDbgEnd() { return ByvalParmDbgValues.end(); } 159}; 160 161class SelectionDAG; 162void checkForCycles(const SelectionDAG *DAG, bool force = false); 163 164/// This is used to represent a portion of an LLVM function in a low-level 165/// Data Dependence DAG representation suitable for instruction selection. 166/// This DAG is constructed as the first step of instruction selection in order 167/// to allow implementation of machine specific optimizations 168/// and code simplifications. 169/// 170/// The representation used by the SelectionDAG is a target-independent 171/// representation, which has some similarities to the GCC RTL representation, 172/// but is significantly more simple, powerful, and is a graph form instead of a 173/// linear form. 174/// 175class SelectionDAG { 176 const TargetMachine &TM; 177 const TargetSelectionDAGInfo *TSI; 178 const TargetLowering *TLI; 179 MachineFunction *MF; 180 LLVMContext *Context; 181 CodeGenOpt::Level OptLevel; 182 183 /// The starting token. 184 SDNode EntryNode; 185 186 /// The root of the entire DAG. 187 SDValue Root; 188 189 /// A linked list of nodes in the current DAG. 190 ilist<SDNode> AllNodes; 191 192 /// The AllocatorType for allocating SDNodes. We use 193 /// pool allocation with recycling. 194 typedef RecyclingAllocator<BumpPtrAllocator, SDNode, sizeof(LargestSDNode), 195 AlignOf<MostAlignedSDNode>::Alignment> 196 NodeAllocatorType; 197 198 /// Pool allocation for nodes. 199 NodeAllocatorType NodeAllocator; 200 201 /// This structure is used to memoize nodes, automatically performing 202 /// CSE with existing nodes when a duplicate is requested. 203 FoldingSet<SDNode> CSEMap; 204 205 /// Pool allocation for machine-opcode SDNode operands. 206 BumpPtrAllocator OperandAllocator; 207 208 /// Pool allocation for misc. objects that are created once per SelectionDAG. 209 BumpPtrAllocator Allocator; 210 211 /// Tracks dbg_value information through SDISel. 212 SDDbgInfo *DbgInfo; 213 214public: 215 /// Clients of various APIs that cause global effects on 216 /// the DAG can optionally implement this interface. This allows the clients 217 /// to handle the various sorts of updates that happen. 218 /// 219 /// A DAGUpdateListener automatically registers itself with DAG when it is 220 /// constructed, and removes itself when destroyed in RAII fashion. 221 struct DAGUpdateListener { 222 DAGUpdateListener *const Next; 223 SelectionDAG &DAG; 224 225 explicit DAGUpdateListener(SelectionDAG &D) 226 : Next(D.UpdateListeners), DAG(D) { 227 DAG.UpdateListeners = this; 228 } 229 230 virtual ~DAGUpdateListener() { 231 assert(DAG.UpdateListeners == this && 232 "DAGUpdateListeners must be destroyed in LIFO order"); 233 DAG.UpdateListeners = Next; 234 } 235 236 /// The node N that was deleted and, if E is not null, an 237 /// equivalent node E that replaced it. 238 virtual void NodeDeleted(SDNode *N, SDNode *E); 239 240 /// The node N that was updated. 241 virtual void NodeUpdated(SDNode *N); 242 }; 243 244 /// When true, additional steps are taken to 245 /// ensure that getConstant() and similar functions return DAG nodes that 246 /// have legal types. This is important after type legalization since 247 /// any illegally typed nodes generated after this point will not experience 248 /// type legalization. 249 bool NewNodesMustHaveLegalTypes; 250 251private: 252 /// DAGUpdateListener is a friend so it can manipulate the listener stack. 253 friend struct DAGUpdateListener; 254 255 /// Linked list of registered DAGUpdateListener instances. 256 /// This stack is maintained by DAGUpdateListener RAII. 257 DAGUpdateListener *UpdateListeners; 258 259 /// Implementation of setSubgraphColor. 260 /// Return whether we had to truncate the search. 261 bool setSubgraphColorHelper(SDNode *N, const char *Color, 262 DenseSet<SDNode *> &visited, 263 int level, bool &printed); 264 265 void operator=(const SelectionDAG&) = delete; 266 SelectionDAG(const SelectionDAG&) = delete; 267 268public: 269 explicit SelectionDAG(const TargetMachine &TM, llvm::CodeGenOpt::Level); 270 ~SelectionDAG(); 271 272 /// Prepare this SelectionDAG to process code in the given MachineFunction. 273 void init(MachineFunction &mf); 274 275 /// Clear state and free memory necessary to make this 276 /// SelectionDAG ready to process a new block. 277 void clear(); 278 279 MachineFunction &getMachineFunction() const { return *MF; } 280 const TargetMachine &getTarget() const { return TM; } 281 const TargetSubtargetInfo &getSubtarget() const { return MF->getSubtarget(); } 282 const TargetLowering &getTargetLoweringInfo() const { return *TLI; } 283 const TargetSelectionDAGInfo &getSelectionDAGInfo() const { return *TSI; } 284 LLVMContext *getContext() const {return Context; } 285 286 /// Pop up a GraphViz/gv window with the DAG rendered using 'dot'. 287 void viewGraph(const std::string &Title); 288 void viewGraph(); 289 290#ifndef NDEBUG 291 std::map<const SDNode *, std::string> NodeGraphAttrs; 292#endif 293 294 /// Clear all previously defined node graph attributes. 295 /// Intended to be used from a debugging tool (eg. gdb). 296 void clearGraphAttrs(); 297 298 /// Set graph attributes for a node. (eg. "color=red".) 299 void setGraphAttrs(const SDNode *N, const char *Attrs); 300 301 /// Get graph attributes for a node. (eg. "color=red".) 302 /// Used from getNodeAttributes. 303 const std::string getGraphAttrs(const SDNode *N) const; 304 305 /// Convenience for setting node color attribute. 306 void setGraphColor(const SDNode *N, const char *Color); 307 308 /// Convenience for setting subgraph color attribute. 309 void setSubgraphColor(SDNode *N, const char *Color); 310 311 typedef ilist<SDNode>::const_iterator allnodes_const_iterator; 312 allnodes_const_iterator allnodes_begin() const { return AllNodes.begin(); } 313 allnodes_const_iterator allnodes_end() const { return AllNodes.end(); } 314 typedef ilist<SDNode>::iterator allnodes_iterator; 315 allnodes_iterator allnodes_begin() { return AllNodes.begin(); } 316 allnodes_iterator allnodes_end() { return AllNodes.end(); } 317 ilist<SDNode>::size_type allnodes_size() const { 318 return AllNodes.size(); 319 } 320 321 /// Return the root tag of the SelectionDAG. 322 const SDValue &getRoot() const { return Root; } 323 324 /// Return the token chain corresponding to the entry of the function. 325 SDValue getEntryNode() const { 326 return SDValue(const_cast<SDNode *>(&EntryNode), 0); 327 } 328 329 /// Set the current root tag of the SelectionDAG. 330 /// 331 const SDValue &setRoot(SDValue N) { 332 assert((!N.getNode() || N.getValueType() == MVT::Other) && 333 "DAG root value is not a chain!"); 334 if (N.getNode()) 335 checkForCycles(N.getNode(), this); 336 Root = N; 337 if (N.getNode()) 338 checkForCycles(this); 339 return Root; 340 } 341 342 /// This iterates over the nodes in the SelectionDAG, folding 343 /// certain types of nodes together, or eliminating superfluous nodes. The 344 /// Level argument controls whether Combine is allowed to produce nodes and 345 /// types that are illegal on the target. 346 void Combine(CombineLevel Level, AliasAnalysis &AA, 347 CodeGenOpt::Level OptLevel); 348 349 /// This transforms the SelectionDAG into a SelectionDAG that 350 /// only uses types natively supported by the target. 351 /// Returns "true" if it made any changes. 352 /// 353 /// Note that this is an involved process that may invalidate pointers into 354 /// the graph. 355 bool LegalizeTypes(); 356 357 /// This transforms the SelectionDAG into a SelectionDAG that is 358 /// compatible with the target instruction selector, as indicated by the 359 /// TargetLowering object. 360 /// 361 /// Note that this is an involved process that may invalidate pointers into 362 /// the graph. 363 void Legalize(); 364 365 /// \brief Transforms a SelectionDAG node and any operands to it into a node 366 /// that is compatible with the target instruction selector, as indicated by 367 /// the TargetLowering object. 368 /// 369 /// \returns true if \c N is a valid, legal node after calling this. 370 /// 371 /// This essentially runs a single recursive walk of the \c Legalize process 372 /// over the given node (and its operands). This can be used to incrementally 373 /// legalize the DAG. All of the nodes which are directly replaced, 374 /// potentially including N, are added to the output parameter \c 375 /// UpdatedNodes so that the delta to the DAG can be understood by the 376 /// caller. 377 /// 378 /// When this returns false, N has been legalized in a way that make the 379 /// pointer passed in no longer valid. It may have even been deleted from the 380 /// DAG, and so it shouldn't be used further. When this returns true, the 381 /// N passed in is a legal node, and can be immediately processed as such. 382 /// This may still have done some work on the DAG, and will still populate 383 /// UpdatedNodes with any new nodes replacing those originally in the DAG. 384 bool LegalizeOp(SDNode *N, SmallSetVector<SDNode *, 16> &UpdatedNodes); 385 386 /// This transforms the SelectionDAG into a SelectionDAG 387 /// that only uses vector math operations supported by the target. This is 388 /// necessary as a separate step from Legalize because unrolling a vector 389 /// operation can introduce illegal types, which requires running 390 /// LegalizeTypes again. 391 /// 392 /// This returns true if it made any changes; in that case, LegalizeTypes 393 /// is called again before Legalize. 394 /// 395 /// Note that this is an involved process that may invalidate pointers into 396 /// the graph. 397 bool LegalizeVectors(); 398 399 /// This method deletes all unreachable nodes in the SelectionDAG. 400 void RemoveDeadNodes(); 401 402 /// Remove the specified node from the system. This node must 403 /// have no referrers. 404 void DeleteNode(SDNode *N); 405 406 /// Return an SDVTList that represents the list of values specified. 407 SDVTList getVTList(EVT VT); 408 SDVTList getVTList(EVT VT1, EVT VT2); 409 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3); 410 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4); 411 SDVTList getVTList(ArrayRef<EVT> VTs); 412 413 //===--------------------------------------------------------------------===// 414 // Node creation methods. 415 // 416 SDValue getConstant(uint64_t Val, EVT VT, bool isTarget = false, 417 bool isOpaque = false); 418 SDValue getConstant(const APInt &Val, EVT VT, bool isTarget = false, 419 bool isOpaque = false); 420 SDValue getConstant(const ConstantInt &Val, EVT VT, bool isTarget = false, 421 bool isOpaque = false); 422 SDValue getIntPtrConstant(uint64_t Val, bool isTarget = false); 423 SDValue getTargetConstant(uint64_t Val, EVT VT, bool isOpaque = false) { 424 return getConstant(Val, VT, true, isOpaque); 425 } 426 SDValue getTargetConstant(const APInt &Val, EVT VT, bool isOpaque = false) { 427 return getConstant(Val, VT, true, isOpaque); 428 } 429 SDValue getTargetConstant(const ConstantInt &Val, EVT VT, 430 bool isOpaque = false) { 431 return getConstant(Val, VT, true, isOpaque); 432 } 433 // The forms below that take a double should only be used for simple 434 // constants that can be exactly represented in VT. No checks are made. 435 SDValue getConstantFP(double Val, EVT VT, bool isTarget = false); 436 SDValue getConstantFP(const APFloat& Val, EVT VT, bool isTarget = false); 437 SDValue getConstantFP(const ConstantFP &CF, EVT VT, bool isTarget = false); 438 SDValue getTargetConstantFP(double Val, EVT VT) { 439 return getConstantFP(Val, VT, true); 440 } 441 SDValue getTargetConstantFP(const APFloat& Val, EVT VT) { 442 return getConstantFP(Val, VT, true); 443 } 444 SDValue getTargetConstantFP(const ConstantFP &Val, EVT VT) { 445 return getConstantFP(Val, VT, true); 446 } 447 SDValue getGlobalAddress(const GlobalValue *GV, SDLoc DL, EVT VT, 448 int64_t offset = 0, bool isTargetGA = false, 449 unsigned char TargetFlags = 0); 450 SDValue getTargetGlobalAddress(const GlobalValue *GV, SDLoc DL, EVT VT, 451 int64_t offset = 0, 452 unsigned char TargetFlags = 0) { 453 return getGlobalAddress(GV, DL, VT, offset, true, TargetFlags); 454 } 455 SDValue getFrameIndex(int FI, EVT VT, bool isTarget = false); 456 SDValue getTargetFrameIndex(int FI, EVT VT) { 457 return getFrameIndex(FI, VT, true); 458 } 459 SDValue getJumpTable(int JTI, EVT VT, bool isTarget = false, 460 unsigned char TargetFlags = 0); 461 SDValue getTargetJumpTable(int JTI, EVT VT, unsigned char TargetFlags = 0) { 462 return getJumpTable(JTI, VT, true, TargetFlags); 463 } 464 SDValue getConstantPool(const Constant *C, EVT VT, 465 unsigned Align = 0, int Offs = 0, bool isT=false, 466 unsigned char TargetFlags = 0); 467 SDValue getTargetConstantPool(const Constant *C, EVT VT, 468 unsigned Align = 0, int Offset = 0, 469 unsigned char TargetFlags = 0) { 470 return getConstantPool(C, VT, Align, Offset, true, TargetFlags); 471 } 472 SDValue getConstantPool(MachineConstantPoolValue *C, EVT VT, 473 unsigned Align = 0, int Offs = 0, bool isT=false, 474 unsigned char TargetFlags = 0); 475 SDValue getTargetConstantPool(MachineConstantPoolValue *C, 476 EVT VT, unsigned Align = 0, 477 int Offset = 0, unsigned char TargetFlags=0) { 478 return getConstantPool(C, VT, Align, Offset, true, TargetFlags); 479 } 480 SDValue getTargetIndex(int Index, EVT VT, int64_t Offset = 0, 481 unsigned char TargetFlags = 0); 482 // When generating a branch to a BB, we don't in general know enough 483 // to provide debug info for the BB at that time, so keep this one around. 484 SDValue getBasicBlock(MachineBasicBlock *MBB); 485 SDValue getBasicBlock(MachineBasicBlock *MBB, SDLoc dl); 486 SDValue getExternalSymbol(const char *Sym, EVT VT); 487 SDValue getExternalSymbol(const char *Sym, SDLoc dl, EVT VT); 488 SDValue getTargetExternalSymbol(const char *Sym, EVT VT, 489 unsigned char TargetFlags = 0); 490 SDValue getValueType(EVT); 491 SDValue getRegister(unsigned Reg, EVT VT); 492 SDValue getRegisterMask(const uint32_t *RegMask); 493 SDValue getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label); 494 SDValue getBlockAddress(const BlockAddress *BA, EVT VT, 495 int64_t Offset = 0, bool isTarget = false, 496 unsigned char TargetFlags = 0); 497 SDValue getTargetBlockAddress(const BlockAddress *BA, EVT VT, 498 int64_t Offset = 0, 499 unsigned char TargetFlags = 0) { 500 return getBlockAddress(BA, VT, Offset, true, TargetFlags); 501 } 502 503 SDValue getCopyToReg(SDValue Chain, SDLoc dl, unsigned Reg, SDValue N) { 504 return getNode(ISD::CopyToReg, dl, MVT::Other, Chain, 505 getRegister(Reg, N.getValueType()), N); 506 } 507 508 // This version of the getCopyToReg method takes an extra operand, which 509 // indicates that there is potentially an incoming glue value (if Glue is not 510 // null) and that there should be a glue result. 511 SDValue getCopyToReg(SDValue Chain, SDLoc dl, unsigned Reg, SDValue N, 512 SDValue Glue) { 513 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 514 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue }; 515 return getNode(ISD::CopyToReg, dl, VTs, 516 ArrayRef<SDValue>(Ops, Glue.getNode() ? 4 : 3)); 517 } 518 519 // Similar to last getCopyToReg() except parameter Reg is a SDValue 520 SDValue getCopyToReg(SDValue Chain, SDLoc dl, SDValue Reg, SDValue N, 521 SDValue Glue) { 522 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 523 SDValue Ops[] = { Chain, Reg, N, Glue }; 524 return getNode(ISD::CopyToReg, dl, VTs, 525 ArrayRef<SDValue>(Ops, Glue.getNode() ? 4 : 3)); 526 } 527 528 SDValue getCopyFromReg(SDValue Chain, SDLoc dl, unsigned Reg, EVT VT) { 529 SDVTList VTs = getVTList(VT, MVT::Other); 530 SDValue Ops[] = { Chain, getRegister(Reg, VT) }; 531 return getNode(ISD::CopyFromReg, dl, VTs, Ops); 532 } 533 534 // This version of the getCopyFromReg method takes an extra operand, which 535 // indicates that there is potentially an incoming glue value (if Glue is not 536 // null) and that there should be a glue result. 537 SDValue getCopyFromReg(SDValue Chain, SDLoc dl, unsigned Reg, EVT VT, 538 SDValue Glue) { 539 SDVTList VTs = getVTList(VT, MVT::Other, MVT::Glue); 540 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue }; 541 return getNode(ISD::CopyFromReg, dl, VTs, 542 ArrayRef<SDValue>(Ops, Glue.getNode() ? 3 : 2)); 543 } 544 545 SDValue getCondCode(ISD::CondCode Cond); 546 547 /// Returns the ConvertRndSat Note: Avoid using this node because it may 548 /// disappear in the future and most targets don't support it. 549 SDValue getConvertRndSat(EVT VT, SDLoc dl, SDValue Val, SDValue DTy, 550 SDValue STy, 551 SDValue Rnd, SDValue Sat, ISD::CvtCode Code); 552 553 /// Return an ISD::VECTOR_SHUFFLE node. The number of elements in VT, 554 /// which must be a vector type, must match the number of mask elements 555 /// NumElts. An integer mask element equal to -1 is treated as undefined. 556 SDValue getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, 557 const int *MaskElts); 558 SDValue getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, 559 ArrayRef<int> MaskElts) { 560 assert(VT.getVectorNumElements() == MaskElts.size() && 561 "Must have the same number of vector elements as mask elements!"); 562 return getVectorShuffle(VT, dl, N1, N2, MaskElts.data()); 563 } 564 565 /// \brief Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to 566 /// the shuffle node in input but with swapped operands. 567 /// 568 /// Example: shuffle A, B, <0,5,2,7> -> shuffle B, A, <4,1,6,3> 569 SDValue getCommutedVectorShuffle(const ShuffleVectorSDNode &SV); 570 571 /// Convert Op, which must be of integer type, to the 572 /// integer type VT, by either any-extending or truncating it. 573 SDValue getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT); 574 575 /// Convert Op, which must be of integer type, to the 576 /// integer type VT, by either sign-extending or truncating it. 577 SDValue getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT); 578 579 /// Convert Op, which must be of integer type, to the 580 /// integer type VT, by either zero-extending or truncating it. 581 SDValue getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT); 582 583 /// Return the expression required to zero extend the Op 584 /// value assuming it was the smaller SrcTy value. 585 SDValue getZeroExtendInReg(SDValue Op, SDLoc DL, EVT SrcTy); 586 587 /// Return an operation which will any-extend the low lanes of the operand 588 /// into the specified vector type. For example, 589 /// this can convert a v16i8 into a v4i32 by any-extending the low four 590 /// lanes of the operand from i8 to i32. 591 SDValue getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT); 592 593 /// Return an operation which will sign extend the low lanes of the operand 594 /// into the specified vector type. For example, 595 /// this can convert a v16i8 into a v4i32 by sign extending the low four 596 /// lanes of the operand from i8 to i32. 597 SDValue getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT); 598 599 /// Return an operation which will zero extend the low lanes of the operand 600 /// into the specified vector type. For example, 601 /// this can convert a v16i8 into a v4i32 by zero extending the low four 602 /// lanes of the operand from i8 to i32. 603 SDValue getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT); 604 605 /// Convert Op, which must be of integer type, to the integer type VT, 606 /// by using an extension appropriate for the target's 607 /// BooleanContent for type OpVT or truncating it. 608 SDValue getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT, EVT OpVT); 609 610 /// Create a bitwise NOT operation as (XOR Val, -1). 611 SDValue getNOT(SDLoc DL, SDValue Val, EVT VT); 612 613 /// \brief Create a logical NOT operation as (XOR Val, BooleanOne). 614 SDValue getLogicalNOT(SDLoc DL, SDValue Val, EVT VT); 615 616 /// Return a new CALLSEQ_START node, which always must have a glue result 617 /// (to ensure it's not CSE'd). CALLSEQ_START does not have a useful SDLoc. 618 SDValue getCALLSEQ_START(SDValue Chain, SDValue Op, SDLoc DL) { 619 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 620 SDValue Ops[] = { Chain, Op }; 621 return getNode(ISD::CALLSEQ_START, DL, VTs, Ops); 622 } 623 624 /// Return a new CALLSEQ_END node, which always must have a 625 /// glue result (to ensure it's not CSE'd). 626 /// CALLSEQ_END does not have a useful SDLoc. 627 SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, 628 SDValue InGlue, SDLoc DL) { 629 SDVTList NodeTys = getVTList(MVT::Other, MVT::Glue); 630 SmallVector<SDValue, 4> Ops; 631 Ops.push_back(Chain); 632 Ops.push_back(Op1); 633 Ops.push_back(Op2); 634 if (InGlue.getNode()) 635 Ops.push_back(InGlue); 636 return getNode(ISD::CALLSEQ_END, DL, NodeTys, Ops); 637 } 638 639 /// Return an UNDEF node. UNDEF does not have a useful SDLoc. 640 SDValue getUNDEF(EVT VT) { 641 return getNode(ISD::UNDEF, SDLoc(), VT); 642 } 643 644 /// Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc. 645 SDValue getGLOBAL_OFFSET_TABLE(EVT VT) { 646 return getNode(ISD::GLOBAL_OFFSET_TABLE, SDLoc(), VT); 647 } 648 649 /// Gets or creates the specified node. 650 /// 651 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT); 652 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N); 653 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, 654 bool nuw = false, bool nsw = false, bool exact = false); 655 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, 656 SDValue N3); 657 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, 658 SDValue N3, SDValue N4); 659 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, 660 SDValue N3, SDValue N4, SDValue N5); 661 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, ArrayRef<SDUse> Ops); 662 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, 663 ArrayRef<SDValue> Ops); 664 SDValue getNode(unsigned Opcode, SDLoc DL, 665 ArrayRef<EVT> ResultTys, 666 ArrayRef<SDValue> Ops); 667 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 668 ArrayRef<SDValue> Ops); 669 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs); 670 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs, SDValue N); 671 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 672 SDValue N1, SDValue N2); 673 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 674 SDValue N1, SDValue N2, SDValue N3); 675 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 676 SDValue N1, SDValue N2, SDValue N3, SDValue N4); 677 SDValue getNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 678 SDValue N1, SDValue N2, SDValue N3, SDValue N4, 679 SDValue N5); 680 681 /// Compute a TokenFactor to force all the incoming stack arguments to be 682 /// loaded from the stack. This is used in tail call lowering to protect 683 /// stack arguments from being clobbered. 684 SDValue getStackArgumentTokenFactor(SDValue Chain); 685 686 SDValue getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, 687 SDValue Size, unsigned Align, bool isVol, bool AlwaysInline, 688 bool isTailCall, MachinePointerInfo DstPtrInfo, 689 MachinePointerInfo SrcPtrInfo); 690 691 SDValue getMemmove(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, 692 SDValue Size, unsigned Align, bool isVol, bool isTailCall, 693 MachinePointerInfo DstPtrInfo, 694 MachinePointerInfo SrcPtrInfo); 695 696 SDValue getMemset(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, 697 SDValue Size, unsigned Align, bool isVol, bool isTailCall, 698 MachinePointerInfo DstPtrInfo); 699 700 /// Helper function to make it easier to build SetCC's if you just 701 /// have an ISD::CondCode instead of an SDValue. 702 /// 703 SDValue getSetCC(SDLoc DL, EVT VT, SDValue LHS, SDValue RHS, 704 ISD::CondCode Cond) { 705 assert(LHS.getValueType().isVector() == RHS.getValueType().isVector() && 706 "Cannot compare scalars to vectors"); 707 assert(LHS.getValueType().isVector() == VT.isVector() && 708 "Cannot compare scalars to vectors"); 709 assert(Cond != ISD::SETCC_INVALID && 710 "Cannot create a setCC of an invalid node."); 711 return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond)); 712 } 713 714 /// Helper function to make it easier to build Select's if you just 715 /// have operands and don't want to check for vector. 716 SDValue getSelect(SDLoc DL, EVT VT, SDValue Cond, 717 SDValue LHS, SDValue RHS) { 718 assert(LHS.getValueType() == RHS.getValueType() && 719 "Cannot use select on differing types"); 720 assert(VT.isVector() == LHS.getValueType().isVector() && 721 "Cannot mix vectors and scalars"); 722 return getNode(Cond.getValueType().isVector() ? ISD::VSELECT : ISD::SELECT, DL, VT, 723 Cond, LHS, RHS); 724 } 725 726 /// Helper function to make it easier to build SelectCC's if you 727 /// just have an ISD::CondCode instead of an SDValue. 728 /// 729 SDValue getSelectCC(SDLoc DL, SDValue LHS, SDValue RHS, 730 SDValue True, SDValue False, ISD::CondCode Cond) { 731 return getNode(ISD::SELECT_CC, DL, True.getValueType(), 732 LHS, RHS, True, False, getCondCode(Cond)); 733 } 734 735 /// VAArg produces a result and token chain, and takes a pointer 736 /// and a source value as input. 737 SDValue getVAArg(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, 738 SDValue SV, unsigned Align); 739 740 /// Gets a node for an atomic cmpxchg op. There are two 741 /// valid Opcodes. ISD::ATOMIC_CMO_SWAP produces the value loaded and a 742 /// chain result. ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS produces the value loaded, 743 /// a success flag (initially i1), and a chain. 744 SDValue getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, 745 SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, 746 MachinePointerInfo PtrInfo, unsigned Alignment, 747 AtomicOrdering SuccessOrdering, 748 AtomicOrdering FailureOrdering, 749 SynchronizationScope SynchScope); 750 SDValue getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, 751 SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, 752 MachineMemOperand *MMO, 753 AtomicOrdering SuccessOrdering, 754 AtomicOrdering FailureOrdering, 755 SynchronizationScope SynchScope); 756 757 /// Gets a node for an atomic op, produces result (if relevant) 758 /// and chain and takes 2 operands. 759 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain, 760 SDValue Ptr, SDValue Val, const Value *PtrVal, 761 unsigned Alignment, AtomicOrdering Ordering, 762 SynchronizationScope SynchScope); 763 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain, 764 SDValue Ptr, SDValue Val, MachineMemOperand *MMO, 765 AtomicOrdering Ordering, 766 SynchronizationScope SynchScope); 767 768 /// Gets a node for an atomic op, produces result and chain and 769 /// takes 1 operand. 770 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT, 771 SDValue Chain, SDValue Ptr, MachineMemOperand *MMO, 772 AtomicOrdering Ordering, 773 SynchronizationScope SynchScope); 774 775 /// Gets a node for an atomic op, produces result and chain and takes N 776 /// operands. 777 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTList, 778 ArrayRef<SDValue> Ops, MachineMemOperand *MMO, 779 AtomicOrdering SuccessOrdering, 780 AtomicOrdering FailureOrdering, 781 SynchronizationScope SynchScope); 782 SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTList, 783 ArrayRef<SDValue> Ops, MachineMemOperand *MMO, 784 AtomicOrdering Ordering, SynchronizationScope SynchScope); 785 786 /// Creates a MemIntrinsicNode that may produce a 787 /// result and takes a list of operands. Opcode may be INTRINSIC_VOID, 788 /// INTRINSIC_W_CHAIN, or a target-specific opcode with a value not 789 /// less than FIRST_TARGET_MEMORY_OPCODE. 790 SDValue getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 791 ArrayRef<SDValue> Ops, 792 EVT MemVT, MachinePointerInfo PtrInfo, 793 unsigned Align = 0, bool Vol = false, 794 bool ReadMem = true, bool WriteMem = true, 795 unsigned Size = 0); 796 797 SDValue getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 798 ArrayRef<SDValue> Ops, 799 EVT MemVT, MachineMemOperand *MMO); 800 801 /// Create a MERGE_VALUES node from the given operands. 802 SDValue getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl); 803 804 /// Loads are not normal binary operators: their result type is not 805 /// determined by their operands, and they produce a value AND a token chain. 806 /// 807 SDValue getLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, 808 MachinePointerInfo PtrInfo, bool isVolatile, 809 bool isNonTemporal, bool isInvariant, unsigned Alignment, 810 const AAMDNodes &AAInfo = AAMDNodes(), 811 const MDNode *Ranges = nullptr); 812 SDValue getLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, 813 MachineMemOperand *MMO); 814 SDValue getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, 815 SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, 816 EVT MemVT, bool isVolatile, 817 bool isNonTemporal, bool isInvariant, unsigned Alignment, 818 const AAMDNodes &AAInfo = AAMDNodes()); 819 SDValue getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, 820 SDValue Chain, SDValue Ptr, EVT MemVT, 821 MachineMemOperand *MMO); 822 SDValue getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base, 823 SDValue Offset, ISD::MemIndexedMode AM); 824 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 825 EVT VT, SDLoc dl, 826 SDValue Chain, SDValue Ptr, SDValue Offset, 827 MachinePointerInfo PtrInfo, EVT MemVT, 828 bool isVolatile, bool isNonTemporal, bool isInvariant, 829 unsigned Alignment, const AAMDNodes &AAInfo = AAMDNodes(), 830 const MDNode *Ranges = nullptr); 831 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 832 EVT VT, SDLoc dl, 833 SDValue Chain, SDValue Ptr, SDValue Offset, 834 EVT MemVT, MachineMemOperand *MMO); 835 836 /// Helper function to build ISD::STORE nodes. 837 SDValue getStore(SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, 838 MachinePointerInfo PtrInfo, bool isVolatile, 839 bool isNonTemporal, unsigned Alignment, 840 const AAMDNodes &AAInfo = AAMDNodes()); 841 SDValue getStore(SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, 842 MachineMemOperand *MMO); 843 SDValue getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, 844 MachinePointerInfo PtrInfo, EVT TVT, 845 bool isNonTemporal, bool isVolatile, 846 unsigned Alignment, 847 const AAMDNodes &AAInfo = AAMDNodes()); 848 SDValue getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, 849 EVT TVT, MachineMemOperand *MMO); 850 SDValue getIndexedStore(SDValue OrigStoe, SDLoc dl, SDValue Base, 851 SDValue Offset, ISD::MemIndexedMode AM); 852 853 SDValue getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, 854 SDValue Mask, SDValue Src0, EVT MemVT, 855 MachineMemOperand *MMO, ISD::LoadExtType); 856 SDValue getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val, 857 SDValue Ptr, SDValue Mask, EVT MemVT, 858 MachineMemOperand *MMO, bool IsTrunc); 859 /// Construct a node to track a Value* through the backend. 860 SDValue getSrcValue(const Value *v); 861 862 /// Return an MDNodeSDNode which holds an MDNode. 863 SDValue getMDNode(const MDNode *MD); 864 865 /// Return an AddrSpaceCastSDNode. 866 SDValue getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr, 867 unsigned SrcAS, unsigned DestAS); 868 869 /// Return the specified value casted to 870 /// the target's desired shift amount type. 871 SDValue getShiftAmountOperand(EVT LHSTy, SDValue Op); 872 873 /// *Mutate* the specified node in-place to have the 874 /// specified operands. If the resultant node already exists in the DAG, 875 /// this does not modify the specified node, instead it returns the node that 876 /// already exists. If the resultant node does not exist in the DAG, the 877 /// input node is returned. As a degenerate case, if you specify the same 878 /// input operands as the node already has, the input node is returned. 879 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op); 880 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2); 881 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 882 SDValue Op3); 883 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 884 SDValue Op3, SDValue Op4); 885 SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 886 SDValue Op3, SDValue Op4, SDValue Op5); 887 SDNode *UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops); 888 889 /// These are used for target selectors to *mutate* the 890 /// specified node to have the specified return type, Target opcode, and 891 /// operands. Note that target opcodes are stored as 892 /// ~TargetOpcode in the node opcode field. The resultant node is returned. 893 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT); 894 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1); 895 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, 896 SDValue Op1, SDValue Op2); 897 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, 898 SDValue Op1, SDValue Op2, SDValue Op3); 899 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT, 900 ArrayRef<SDValue> Ops); 901 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2); 902 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, 903 EVT VT2, ArrayRef<SDValue> Ops); 904 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, 905 EVT VT2, EVT VT3, ArrayRef<SDValue> Ops); 906 SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, 907 EVT VT2, EVT VT3, EVT VT4, ArrayRef<SDValue> Ops); 908 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, 909 EVT VT2, SDValue Op1); 910 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, 911 EVT VT2, SDValue Op1, SDValue Op2); 912 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, 913 EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); 914 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, 915 EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3); 916 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, SDVTList VTs, 917 ArrayRef<SDValue> Ops); 918 919 /// This *mutates* the specified node to have the specified 920 /// return type, opcode, and operands. 921 SDNode *MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs, 922 ArrayRef<SDValue> Ops); 923 924 /// These are used for target selectors to create a new node 925 /// with specified return type(s), MachineInstr opcode, and operands. 926 /// 927 /// Note that getMachineNode returns the resultant node. If there is already 928 /// a node of the specified opcode and operands, it returns that node instead 929 /// of the current one. 930 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT); 931 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 932 SDValue Op1); 933 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 934 SDValue Op1, SDValue Op2); 935 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 936 SDValue Op1, SDValue Op2, SDValue Op3); 937 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 938 ArrayRef<SDValue> Ops); 939 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2); 940 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, 941 SDValue Op1); 942 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, 943 SDValue Op1, SDValue Op2); 944 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, 945 SDValue Op1, SDValue Op2, SDValue Op3); 946 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, 947 ArrayRef<SDValue> Ops); 948 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, 949 EVT VT3, SDValue Op1, SDValue Op2); 950 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, 951 EVT VT3, SDValue Op1, SDValue Op2, 952 SDValue Op3); 953 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, 954 EVT VT3, ArrayRef<SDValue> Ops); 955 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, 956 EVT VT3, EVT VT4, ArrayRef<SDValue> Ops); 957 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, 958 ArrayRef<EVT> ResultTys, 959 ArrayRef<SDValue> Ops); 960 MachineSDNode *getMachineNode(unsigned Opcode, SDLoc dl, SDVTList VTs, 961 ArrayRef<SDValue> Ops); 962 963 /// A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes. 964 SDValue getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT, 965 SDValue Operand); 966 967 /// A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes. 968 SDValue getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT, 969 SDValue Operand, SDValue Subreg); 970 971 /// Get the specified node if it's already available, or else return NULL. 972 SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTs, ArrayRef<SDValue> Ops, 973 bool nuw = false, bool nsw = false, 974 bool exact = false); 975 976 /// Creates a SDDbgValue node. 977 SDDbgValue *getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N, unsigned R, 978 bool IsIndirect, uint64_t Off, DebugLoc DL, 979 unsigned O); 980 981 /// Constant 982 SDDbgValue *getConstantDbgValue(MDNode *Var, MDNode *Expr, const Value *C, 983 uint64_t Off, DebugLoc DL, unsigned O); 984 985 /// FrameIndex 986 SDDbgValue *getFrameIndexDbgValue(MDNode *Var, MDNode *Expr, unsigned FI, 987 uint64_t Off, DebugLoc DL, unsigned O); 988 989 /// Remove the specified node from the system. If any of its 990 /// operands then becomes dead, remove them as well. Inform UpdateListener 991 /// for each node deleted. 992 void RemoveDeadNode(SDNode *N); 993 994 /// This method deletes the unreachable nodes in the 995 /// given list, and any nodes that become unreachable as a result. 996 void RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes); 997 998 /// Modify anything using 'From' to use 'To' instead. 999 /// This can cause recursive merging of nodes in the DAG. Use the first 1000 /// version if 'From' is known to have a single result, use the second 1001 /// if you have two nodes with identical results (or if 'To' has a superset 1002 /// of the results of 'From'), use the third otherwise. 1003 /// 1004 /// These methods all take an optional UpdateListener, which (if not null) is 1005 /// informed about nodes that are deleted and modified due to recursive 1006 /// changes in the dag. 1007 /// 1008 /// These functions only replace all existing uses. It's possible that as 1009 /// these replacements are being performed, CSE may cause the From node 1010 /// to be given new uses. These new uses of From are left in place, and 1011 /// not automatically transferred to To. 1012 /// 1013 void ReplaceAllUsesWith(SDValue From, SDValue Op); 1014 void ReplaceAllUsesWith(SDNode *From, SDNode *To); 1015 void ReplaceAllUsesWith(SDNode *From, const SDValue *To); 1016 1017 /// Replace any uses of From with To, leaving 1018 /// uses of other values produced by From.Val alone. 1019 void ReplaceAllUsesOfValueWith(SDValue From, SDValue To); 1020 1021 /// Like ReplaceAllUsesOfValueWith, but for multiple values at once. 1022 /// This correctly handles the case where 1023 /// there is an overlap between the From values and the To values. 1024 void ReplaceAllUsesOfValuesWith(const SDValue *From, const SDValue *To, 1025 unsigned Num); 1026 1027 /// Topological-sort the AllNodes list and a 1028 /// assign a unique node id for each node in the DAG based on their 1029 /// topological order. Returns the number of nodes. 1030 unsigned AssignTopologicalOrder(); 1031 1032 /// Move node N in the AllNodes list to be immediately 1033 /// before the given iterator Position. This may be used to update the 1034 /// topological ordering when the list of nodes is modified. 1035 void RepositionNode(allnodes_iterator Position, SDNode *N) { 1036 AllNodes.insert(Position, AllNodes.remove(N)); 1037 } 1038 1039 /// Returns true if the opcode is a commutative binary operation. 1040 static bool isCommutativeBinOp(unsigned Opcode) { 1041 // FIXME: This should get its info from the td file, so that we can include 1042 // target info. 1043 switch (Opcode) { 1044 case ISD::ADD: 1045 case ISD::MUL: 1046 case ISD::MULHU: 1047 case ISD::MULHS: 1048 case ISD::SMUL_LOHI: 1049 case ISD::UMUL_LOHI: 1050 case ISD::FADD: 1051 case ISD::FMUL: 1052 case ISD::AND: 1053 case ISD::OR: 1054 case ISD::XOR: 1055 case ISD::SADDO: 1056 case ISD::UADDO: 1057 case ISD::ADDC: 1058 case ISD::ADDE: 1059 case ISD::FMINNUM: 1060 case ISD::FMAXNUM: 1061 return true; 1062 default: return false; 1063 } 1064 } 1065 1066 /// Returns an APFloat semantics tag appropriate for the given type. If VT is 1067 /// a vector type, the element semantics are returned. 1068 static const fltSemantics &EVTToAPFloatSemantics(EVT VT) { 1069 switch (VT.getScalarType().getSimpleVT().SimpleTy) { 1070 default: llvm_unreachable("Unknown FP format"); 1071 case MVT::f16: return APFloat::IEEEhalf; 1072 case MVT::f32: return APFloat::IEEEsingle; 1073 case MVT::f64: return APFloat::IEEEdouble; 1074 case MVT::f80: return APFloat::x87DoubleExtended; 1075 case MVT::f128: return APFloat::IEEEquad; 1076 case MVT::ppcf128: return APFloat::PPCDoubleDouble; 1077 } 1078 } 1079 1080 /// Add a dbg_value SDNode. If SD is non-null that means the 1081 /// value is produced by SD. 1082 void AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter); 1083 1084 /// Get the debug values which reference the given SDNode. 1085 ArrayRef<SDDbgValue*> GetDbgValues(const SDNode* SD) { 1086 return DbgInfo->getSDDbgValues(SD); 1087 } 1088 1089 /// Transfer SDDbgValues. 1090 void TransferDbgValues(SDValue From, SDValue To); 1091 1092 /// Return true if there are any SDDbgValue nodes associated 1093 /// with this SelectionDAG. 1094 bool hasDebugValues() const { return !DbgInfo->empty(); } 1095 1096 SDDbgInfo::DbgIterator DbgBegin() { return DbgInfo->DbgBegin(); } 1097 SDDbgInfo::DbgIterator DbgEnd() { return DbgInfo->DbgEnd(); } 1098 SDDbgInfo::DbgIterator ByvalParmDbgBegin() { 1099 return DbgInfo->ByvalParmDbgBegin(); 1100 } 1101 SDDbgInfo::DbgIterator ByvalParmDbgEnd() { 1102 return DbgInfo->ByvalParmDbgEnd(); 1103 } 1104 1105 void dump() const; 1106 1107 /// Create a stack temporary, suitable for holding the 1108 /// specified value type. If minAlign is specified, the slot size will have 1109 /// at least that alignment. 1110 SDValue CreateStackTemporary(EVT VT, unsigned minAlign = 1); 1111 1112 /// Create a stack temporary suitable for holding 1113 /// either of the specified value types. 1114 SDValue CreateStackTemporary(EVT VT1, EVT VT2); 1115 1116 SDValue FoldConstantArithmetic(unsigned Opcode, EVT VT, 1117 SDNode *Cst1, SDNode *Cst2); 1118 1119 /// Constant fold a setcc to true or false. 1120 SDValue FoldSetCC(EVT VT, SDValue N1, 1121 SDValue N2, ISD::CondCode Cond, SDLoc dl); 1122 1123 /// Return true if the sign bit of Op is known to be zero. 1124 /// We use this predicate to simplify operations downstream. 1125 bool SignBitIsZero(SDValue Op, unsigned Depth = 0) const; 1126 1127 /// Return true if 'Op & Mask' is known to be zero. We 1128 /// use this predicate to simplify operations downstream. Op and Mask are 1129 /// known to be the same type. 1130 bool MaskedValueIsZero(SDValue Op, const APInt &Mask, unsigned Depth = 0) 1131 const; 1132 1133 /// Determine which bits of Op are known to be either zero or one and return 1134 /// them in the KnownZero/KnownOne bitsets. Targets can implement the 1135 /// computeKnownBitsForTargetNode method in the TargetLowering class to allow 1136 /// target nodes to be understood. 1137 void computeKnownBits(SDValue Op, APInt &KnownZero, APInt &KnownOne, 1138 unsigned Depth = 0) const; 1139 1140 /// Return the number of times the sign bit of the 1141 /// register is replicated into the other bits. We know that at least 1 bit 1142 /// is always equal to the sign bit (itself), but other cases can give us 1143 /// information. For example, immediately after an "SRA X, 2", we know that 1144 /// the top 3 bits are all equal to each other, so we return 3. Targets can 1145 /// implement the ComputeNumSignBitsForTarget method in the TargetLowering 1146 /// class to allow target nodes to be understood. 1147 unsigned ComputeNumSignBits(SDValue Op, unsigned Depth = 0) const; 1148 1149 /// Return true if the specified operand is an 1150 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 1151 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same 1152 /// semantics as an ADD. This handles the equivalence: 1153 /// X|Cst == X+Cst iff X&Cst = 0. 1154 bool isBaseWithConstantOffset(SDValue Op) const; 1155 1156 /// Test whether the given SDValue is known to never be NaN. 1157 bool isKnownNeverNaN(SDValue Op) const; 1158 1159 /// Test whether the given SDValue is known to never be 1160 /// positive or negative Zero. 1161 bool isKnownNeverZero(SDValue Op) const; 1162 1163 /// Test whether two SDValues are known to compare equal. This 1164 /// is true if they are the same value, or if one is negative zero and the 1165 /// other positive zero. 1166 bool isEqualTo(SDValue A, SDValue B) const; 1167 1168 /// Utility function used by legalize and lowering to 1169 /// "unroll" a vector operation by splitting out the scalars and operating 1170 /// on each element individually. If the ResNE is 0, fully unroll the vector 1171 /// op. If ResNE is less than the width of the vector op, unroll up to ResNE. 1172 /// If the ResNE is greater than the width of the vector op, unroll the 1173 /// vector op and fill the end of the resulting vector with UNDEFS. 1174 SDValue UnrollVectorOp(SDNode *N, unsigned ResNE = 0); 1175 1176 /// Return true if LD is loading 'Bytes' bytes from a location that is 'Dist' 1177 /// units away from the location that the 'Base' load is loading from. 1178 bool isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 1179 unsigned Bytes, int Dist) const; 1180 1181 /// Infer alignment of a load / store address. Return 0 if 1182 /// it cannot be inferred. 1183 unsigned InferPtrAlignment(SDValue Ptr) const; 1184 1185 /// Compute the VTs needed for the low/hi parts of a type 1186 /// which is split (or expanded) into two not necessarily identical pieces. 1187 std::pair<EVT, EVT> GetSplitDestVTs(const EVT &VT) const; 1188 1189 /// Split the vector with EXTRACT_SUBVECTOR using the provides 1190 /// VTs and return the low/high part. 1191 std::pair<SDValue, SDValue> SplitVector(const SDValue &N, const SDLoc &DL, 1192 const EVT &LoVT, const EVT &HiVT); 1193 1194 /// Split the vector with EXTRACT_SUBVECTOR and return the low/high part. 1195 std::pair<SDValue, SDValue> SplitVector(const SDValue &N, const SDLoc &DL) { 1196 EVT LoVT, HiVT; 1197 std::tie(LoVT, HiVT) = GetSplitDestVTs(N.getValueType()); 1198 return SplitVector(N, DL, LoVT, HiVT); 1199 } 1200 1201 /// Split the node's operand with EXTRACT_SUBVECTOR and 1202 /// return the low/high part. 1203 std::pair<SDValue, SDValue> SplitVectorOperand(const SDNode *N, unsigned OpNo) 1204 { 1205 return SplitVector(N->getOperand(OpNo), SDLoc(N)); 1206 } 1207 1208 /// Append the extracted elements from Start to Count out of the vector Op 1209 /// in Args. If Count is 0, all of the elements will be extracted. 1210 void ExtractVectorElements(SDValue Op, SmallVectorImpl<SDValue> &Args, 1211 unsigned Start = 0, unsigned Count = 0); 1212 1213 unsigned getEVTAlignment(EVT MemoryVT) const; 1214 1215private: 1216 void InsertNode(SDNode *N); 1217 bool RemoveNodeFromCSEMaps(SDNode *N); 1218 void AddModifiedNodeToCSEMaps(SDNode *N); 1219 SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op, void *&InsertPos); 1220 SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op1, SDValue Op2, 1221 void *&InsertPos); 1222 SDNode *FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops, 1223 void *&InsertPos); 1224 SDNode *UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc loc); 1225 1226 void DeleteNodeNotInCSEMaps(SDNode *N); 1227 void DeallocateNode(SDNode *N); 1228 1229 void allnodes_clear(); 1230 1231 BinarySDNode *GetBinarySDNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 1232 SDValue N1, SDValue N2, bool nuw, bool nsw, 1233 bool exact); 1234 1235 /// List of non-single value types. 1236 FoldingSet<SDVTListNode> VTListMap; 1237 1238 /// Maps to auto-CSE operations. 1239 std::vector<CondCodeSDNode*> CondCodeNodes; 1240 1241 std::vector<SDNode*> ValueTypeNodes; 1242 std::map<EVT, SDNode*, EVT::compareRawBits> ExtendedValueTypeNodes; 1243 StringMap<SDNode*> ExternalSymbols; 1244 1245 std::map<std::pair<std::string, unsigned char>,SDNode*> TargetExternalSymbols; 1246}; 1247 1248template <> struct GraphTraits<SelectionDAG*> : public GraphTraits<SDNode*> { 1249 typedef SelectionDAG::allnodes_iterator nodes_iterator; 1250 static nodes_iterator nodes_begin(SelectionDAG *G) { 1251 return G->allnodes_begin(); 1252 } 1253 static nodes_iterator nodes_end(SelectionDAG *G) { 1254 return G->allnodes_end(); 1255 } 1256}; 1257 1258} // end namespace llvm 1259 1260#endif 1261