1//===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file provides AArch64 specific target descriptions. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H 15#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H 16 17#include "llvm/Support/DataTypes.h" 18#include <string> 19 20namespace llvm { 21class formatted_raw_ostream; 22class MCAsmBackend; 23class MCCodeEmitter; 24class MCContext; 25class MCInstrInfo; 26class MCInstPrinter; 27class MCRegisterInfo; 28class MCObjectWriter; 29class MCStreamer; 30class MCSubtargetInfo; 31class MCTargetStreamer; 32class StringRef; 33class Target; 34class Triple; 35class raw_ostream; 36class raw_pwrite_stream; 37 38extern Target TheAArch64leTarget; 39extern Target TheAArch64beTarget; 40extern Target TheARM64Target; 41 42MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII, 43 const MCRegisterInfo &MRI, 44 MCContext &Ctx); 45MCAsmBackend *createAArch64leAsmBackend(const Target &T, 46 const MCRegisterInfo &MRI, StringRef TT, 47 StringRef CPU); 48MCAsmBackend *createAArch64beAsmBackend(const Target &T, 49 const MCRegisterInfo &MRI, StringRef TT, 50 StringRef CPU); 51 52MCObjectWriter *createAArch64ELFObjectWriter(raw_pwrite_stream &OS, 53 uint8_t OSABI, 54 bool IsLittleEndian); 55 56MCObjectWriter *createAArch64MachObjectWriter(raw_pwrite_stream &OS, 57 uint32_t CPUType, 58 uint32_t CPUSubtype); 59 60MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S, 61 formatted_raw_ostream &OS, 62 MCInstPrinter *InstPrint, 63 bool isVerboseAsm); 64 65MCTargetStreamer *createAArch64ObjectTargetStreamer(MCStreamer &S, 66 const MCSubtargetInfo &STI); 67 68} // End llvm namespace 69 70// Defines symbolic names for AArch64 registers. This defines a mapping from 71// register name to register number. 72// 73#define GET_REGINFO_ENUM 74#include "AArch64GenRegisterInfo.inc" 75 76// Defines symbolic names for the AArch64 instructions. 77// 78#define GET_INSTRINFO_ENUM 79#include "AArch64GenInstrInfo.inc" 80 81#define GET_SUBTARGETINFO_ENUM 82#include "AArch64GenSubtargetInfo.inc" 83 84#endif 85