ARMBaseInfo.h revision 47a0d52b69056250a1edaca8b28f705993094542
1754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach//===-- ARMBaseInfo.h - Top level definitions for ARM -------- --*- C++ -*-===// 2754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// 3754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// The LLVM Compiler Infrastructure 4754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// 5754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// This file is distributed under the University of Illinois Open Source 6754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// License. See LICENSE.TXT for details. 7754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// 8754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach//===----------------------------------------------------------------------===// 9754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// 10754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// This file contains small standalone helper functions and enum definitions for 11754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// the ARM target useful for the compiler back-end and the MC libraries. 12754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// As such, it deliberately does not include references to LLVM core 13754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// code gen types, passes, etc.. 14754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// 15754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach//===----------------------------------------------------------------------===// 16754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 17754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach#ifndef ARMBASEINFO_H 18754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach#define ARMBASEINFO_H 19754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 20be74029f44c32efc09274a16cbff588ad10dc5eaEvan Cheng#include "ARMMCTargetDesc.h" 21754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach#include "llvm/Support/ErrorHandling.h" 22754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 23754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbachnamespace llvm { 24754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 25754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach// Enums corresponding to ARM condition codes 26754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbachnamespace ARMCC { 27754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach // The CondCodes constants map directly to the 4-bit encoding of the 28754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach // condition field for predicated instructions. 29754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach enum CondCodes { // Meaning (integer) Meaning (floating-point) 30754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach EQ, // Equal Equal 31754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach NE, // Not equal Not equal, or unordered 32754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach HS, // Carry set >, ==, or unordered 33754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach LO, // Carry clear Less than 34754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach MI, // Minus, negative Less than 35754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach PL, // Plus, positive or zero >, ==, or unordered 36754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach VS, // Overflow Unordered 37754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach VC, // No overflow Not unordered 38754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach HI, // Unsigned higher Greater than, or unordered 39754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach LS, // Unsigned lower or same Less than or equal 40754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach GE, // Greater than or equal Greater than or equal 41754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach LT, // Less than Less than, or unordered 42754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach GT, // Greater than Greater than 43754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach LE, // Less than or equal <, ==, or unordered 44754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach AL // Always (unconditional) Always (unconditional) 45754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach }; 46754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 47754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach inline static CondCodes getOppositeCondition(CondCodes CC) { 48754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach switch (CC) { 49754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach default: llvm_unreachable("Unknown condition code"); 50754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case EQ: return NE; 51754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case NE: return EQ; 52754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case HS: return LO; 53754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case LO: return HS; 54754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case MI: return PL; 55754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case PL: return MI; 56754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case VS: return VC; 57754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case VC: return VS; 58754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case HI: return LS; 59754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case LS: return HI; 60754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case GE: return LT; 61754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case LT: return GE; 62754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case GT: return LE; 63754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case LE: return GT; 64754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach } 65754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach } 66754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach} // namespace ARMCC 67754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 68754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbachinline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) { 69754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach switch (CC) { 70754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach default: llvm_unreachable("Unknown condition code"); 71754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::EQ: return "eq"; 72754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::NE: return "ne"; 73754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::HS: return "hs"; 74754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::LO: return "lo"; 75754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::MI: return "mi"; 76754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::PL: return "pl"; 77754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::VS: return "vs"; 78754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::VC: return "vc"; 79754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::HI: return "hi"; 80754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::LS: return "ls"; 81754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::GE: return "ge"; 82754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::LT: return "lt"; 83754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::GT: return "gt"; 84754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::LE: return "le"; 85754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ARMCC::AL: return "al"; 86754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach } 87754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach} 88754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 89a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopesnamespace ARM_PROC { 90a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes enum IMod { 91a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes IE = 2, 92a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes ID = 3 93a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes }; 94a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes 95a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes enum IFlags { 96a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes F = 1, 97a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes I = 2, 98a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes A = 4 99a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes }; 100a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes 101a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes inline static const char *IFlagsToString(unsigned val) { 102a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes switch (val) { 103a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes default: llvm_unreachable("Unknown iflags operand"); 104a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes case F: return "f"; 105a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes case I: return "i"; 106a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes case A: return "a"; 107a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes } 108a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes } 109a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes 110a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes inline static const char *IModToString(unsigned val) { 111a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes switch (val) { 112a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes default: llvm_unreachable("Unknown imod operand"); 113a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes case IE: return "ie"; 114a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes case ID: return "id"; 115a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes } 116a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes } 117a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes} 118a2b6e4151b75248f9dbf8067186cba673520f8f4Bruno Cardoso Lopes 119754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbachnamespace ARM_MB { 120754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach // The Memory Barrier Option constants map directly to the 4-bit encoding of 121754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach // the option field for memory barrier operations. 122754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach enum MemBOpt { 123f74a4298163a7d0b500c7f7a818829c153dc942eBob Wilson SY = 15, 124754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach ST = 14, 125754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach ISH = 11, 126754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach ISHST = 10, 127754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach NSH = 7, 128754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach NSHST = 6, 129754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach OSH = 3, 130754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach OSHST = 2 131754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach }; 132754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 133754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach inline static const char *MemBOptToString(unsigned val) { 134754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach switch (val) { 1358b7fa198c352993c406b756c84531e33fe1b49ebJim Grosbach default: llvm_unreachable("Unknown memory operation"); 136f74a4298163a7d0b500c7f7a818829c153dc942eBob Wilson case SY: return "sy"; 137754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ST: return "st"; 138754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ISH: return "ish"; 139754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case ISHST: return "ishst"; 140754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case NSH: return "nsh"; 141754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case NSHST: return "nshst"; 142754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case OSH: return "osh"; 143754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach case OSHST: return "oshst"; 144754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach } 145754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach } 146754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach} // namespace ARM_MB 147754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 148a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach/// getARMRegisterNumbering - Given the enum value for some register, e.g. 149a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach/// ARM::LR, return the number that it corresponds to (e.g. 14). 150a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbachinline static unsigned getARMRegisterNumbering(unsigned Reg) { 151a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach using namespace ARM; 152a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach switch (Reg) { 153a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach default: 154a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach llvm_unreachable("Unknown ARM register!"); 155a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach case R0: case S0: case D0: case Q0: return 0; 15690d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R1: case S1: case D1: case Q1: return 1; 15790d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R2: case S2: case D2: case Q2: return 2; 15890d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R3: case S3: case D3: case Q3: return 3; 15990d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R4: case S4: case D4: case Q4: return 4; 16090d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R5: case S5: case D5: case Q5: return 5; 16190d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R6: case S6: case D6: case Q6: return 6; 16290d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R7: case S7: case D7: case Q7: return 7; 16390d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R8: case S8: case D8: case Q8: return 8; 16490d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R9: case S9: case D9: case Q9: return 9; 16590d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R10: case S10: case D10: case Q10: return 10; 16690d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R11: case S11: case D11: case Q11: return 11; 16790d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case R12: case S12: case D12: case Q12: return 12; 16890d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case SP: case S13: case D13: case Q13: return 13; 16990d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case LR: case S14: case D14: case Q14: return 14; 17090d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case PC: case S15: case D15: case Q15: return 15; 17190d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson 17290d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case S16: case D16: return 16; 173a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach case S17: case D17: return 17; 17490d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case S18: case D18: return 18; 175a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach case S19: case D19: return 19; 17690d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case S20: case D20: return 20; 177a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach case S21: case D21: return 21; 17890d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case S22: case D22: return 22; 179a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach case S23: case D23: return 23; 18090d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case S24: case D24: return 24; 181a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach case S25: case D25: return 25; 18290d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case S26: case D26: return 26; 183a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach case S27: case D27: return 27; 18490d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case S28: case D28: return 28; 185a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach case S29: case D29: return 29; 18690d4cf931477b497553a9f2d0ed53377dd5dd88cOwen Anderson case S30: case D30: return 30; 187a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach case S31: case D31: return 31; 188a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach } 189a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach} 190754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 191ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng/// ARMII - This namespace holds all of the target specific flags that 192ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng/// instruction info tracks. 193ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng/// 194c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbachnamespace ARMII { 195ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes 196ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes /// ARM Index Modes 197ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes enum IndexMode { 198ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes IndexModeNone = 0, 199ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes IndexModePre = 1, 200ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes IndexModePost = 2, 201ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes IndexModeUpd = 3 202ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes }; 203ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes 204ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes /// ARM Addressing Modes 205ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes enum AddrMode { 206ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeNone = 0, 207ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrMode1 = 1, 208ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrMode2 = 2, 209ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrMode3 = 3, 210ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrMode4 = 4, 211ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrMode5 = 5, 212ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrMode6 = 6, 213ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeT1_1 = 7, 214ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeT1_2 = 8, 215ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeT1_4 = 9, 216ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeT1_s = 10, // i8 * 4 for pc and sp relative data 217ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeT2_i12 = 11, 218ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeT2_i8 = 12, 219ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeT2_so = 13, 220ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeT2_pc = 14, // +/- i12 for pc relative data 221ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrModeT2_i8s4 = 15, // i8 * 4 222ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes AddrMode_i12 = 16 223ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes }; 224ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes 225ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes inline static const char *AddrModeToString(AddrMode addrmode) { 226ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes switch (addrmode) { 227ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes default: llvm_unreachable("Unknown memory operation"); 228ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeNone: return "AddrModeNone"; 229ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrMode1: return "AddrMode1"; 230ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrMode2: return "AddrMode2"; 231ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrMode3: return "AddrMode3"; 232ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrMode4: return "AddrMode4"; 233ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrMode5: return "AddrMode5"; 234ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrMode6: return "AddrMode6"; 235ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeT1_1: return "AddrModeT1_1"; 236ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeT1_2: return "AddrModeT1_2"; 237ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeT1_4: return "AddrModeT1_4"; 238ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeT1_s: return "AddrModeT1_s"; 239ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeT2_i12: return "AddrModeT2_i12"; 240ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeT2_i8: return "AddrModeT2_i8"; 241ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeT2_so: return "AddrModeT2_so"; 242ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeT2_pc: return "AddrModeT2_pc"; 243ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrModeT2_i8s4: return "AddrModeT2_i8s4"; 244ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes case AddrMode_i12: return "AddrMode_i12"; 245ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes } 246ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes } 247ae0855401b8c80f96904b6808b0bc4c89216aecdBruno Cardoso Lopes 248c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach /// Target Operand Flag enum. 249c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach enum TOF { 250c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach //===------------------------------------------------------------------===// 251c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach // ARM Specific MachineOperand flags. 252c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach 253c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach MO_NO_FLAG, 254c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach 255c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach /// MO_LO16 - On a symbol operand, this represents a relocation containing 256c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach /// lower 16 bit of the address. Used only via movw instruction. 257c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach MO_LO16, 258c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach 259c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach /// MO_HI16 - On a symbol operand, this represents a relocation containing 260c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach /// higher 16 bit of the address. Used only via movt instruction. 261637d89fe0eca4fa2b9c95f6c15eb69a99bae83bcJim Grosbach MO_HI16, 262637d89fe0eca4fa2b9c95f6c15eb69a99bae83bcJim Grosbach 26353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng /// MO_LO16_NONLAZY - On a symbol operand "FOO", this represents a 26453519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng /// relocation containing lower 16 bit of the non-lazy-ptr indirect symbol, 26553519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng /// i.e. "FOO$non_lazy_ptr". 26653519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng /// Used only via movw instruction. 26753519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MO_LO16_NONLAZY, 26853519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng 26953519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng /// MO_HI16_NONLAZY - On a symbol operand "FOO", this represents a 27053519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng /// relocation containing lower 16 bit of the non-lazy-ptr indirect symbol, 27153519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng /// i.e. "FOO$non_lazy_ptr". Used only via movt instruction. 27253519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng MO_HI16_NONLAZY, 27353519f015e3e84e9f57b677cc8724805a6009b73Evan Cheng 2745de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng /// MO_LO16_NONLAZY_PIC - On a symbol operand "FOO", this represents a 2755de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng /// relocation containing lower 16 bit of the PC relative address of the 2765de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng /// non-lazy-ptr indirect symbol, i.e. "FOO$non_lazy_ptr - LABEL". 2775de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng /// Used only via movw instruction. 2785de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MO_LO16_NONLAZY_PIC, 2795de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 2805de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng /// MO_HI16_NONLAZY_PIC - On a symbol operand "FOO", this represents a 2815de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng /// relocation containing lower 16 bit of the PC relative address of the 2825de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng /// non-lazy-ptr indirect symbol, i.e. "FOO$non_lazy_ptr - LABEL". 2835de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng /// Used only via movt instruction. 2845de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng MO_HI16_NONLAZY_PIC, 2855de5d4b6d0eb3fd379fa571d82f6fa764460b3b8Evan Cheng 286637d89fe0eca4fa2b9c95f6c15eb69a99bae83bcJim Grosbach /// MO_PLT - On a symbol operand, this represents an ELF PLT reference on a 287637d89fe0eca4fa2b9c95f6c15eb69a99bae83bcJim Grosbach /// call operand. 288637d89fe0eca4fa2b9c95f6c15eb69a99bae83bcJim Grosbach MO_PLT 289c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach }; 290ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 291ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng enum { 292ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng //===------------------------------------------------------------------===// 293ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Instruction Flags. 294ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 295ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng //===------------------------------------------------------------------===// 296ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // This four-bit field describes the addressing mode used. 297ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng AddrModeMask = 0x1f, // The AddrMode enums are declared in ARMBaseInfo.h 298ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 299ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // IndexMode - Unindex, pre-indexed, or post-indexed are valid for load 300ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // and store ops only. Generic "updating" flag is used for ld/st multiple. 301ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // The index mode enums are declared in ARMBaseInfo.h 302ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng IndexModeShift = 5, 303ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng IndexModeMask = 3 << IndexModeShift, 304ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 305ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng //===------------------------------------------------------------------===// 306ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Instruction encoding formats. 307ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // 308ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng FormShift = 7, 309ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng FormMask = 0x3f << FormShift, 310ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 311ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Pseudo instructions 312ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng Pseudo = 0 << FormShift, 313ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 314ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Multiply instructions 315ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng MulFrm = 1 << FormShift, 316ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 317ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Branch instructions 318ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng BrFrm = 2 << FormShift, 319ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng BrMiscFrm = 3 << FormShift, 320ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 321ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Data Processing instructions 322ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng DPFrm = 4 << FormShift, 323ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng DPSoRegFrm = 5 << FormShift, 324ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 325ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Load and Store 326ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng LdFrm = 6 << FormShift, 327ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng StFrm = 7 << FormShift, 328ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng LdMiscFrm = 8 << FormShift, 329ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng StMiscFrm = 9 << FormShift, 330ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng LdStMulFrm = 10 << FormShift, 331ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 332ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng LdStExFrm = 11 << FormShift, 333ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 334ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Miscellaneous arithmetic instructions 335ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng ArithMiscFrm = 12 << FormShift, 336ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng SatFrm = 13 << FormShift, 337ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 338ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Extend instructions 339ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng ExtFrm = 14 << FormShift, 340ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 341ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // VFP formats 342ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPUnaryFrm = 15 << FormShift, 343ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPBinaryFrm = 16 << FormShift, 344ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPConv1Frm = 17 << FormShift, 345ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPConv2Frm = 18 << FormShift, 346ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPConv3Frm = 19 << FormShift, 347ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPConv4Frm = 20 << FormShift, 348ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPConv5Frm = 21 << FormShift, 349ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPLdStFrm = 22 << FormShift, 350ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPLdStMulFrm = 23 << FormShift, 351ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng VFPMiscFrm = 24 << FormShift, 352ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 353ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Thumb format 354ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng ThumbFrm = 25 << FormShift, 355ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 356ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Miscelleaneous format 357ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng MiscFrm = 26 << FormShift, 358ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 359ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // NEON formats 360ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng NGetLnFrm = 27 << FormShift, 361ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng NSetLnFrm = 28 << FormShift, 362ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng NDupFrm = 29 << FormShift, 363ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng NLdStFrm = 30 << FormShift, 364ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng N1RegModImmFrm= 31 << FormShift, 365ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng N2RegFrm = 32 << FormShift, 366ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng NVCVTFrm = 33 << FormShift, 367ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng NVDupLnFrm = 34 << FormShift, 368ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng N2RegVShLFrm = 35 << FormShift, 369ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng N2RegVShRFrm = 36 << FormShift, 370ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng N3RegFrm = 37 << FormShift, 371ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng N3RegVShFrm = 38 << FormShift, 372ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng NVExtFrm = 39 << FormShift, 373ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng NVMulSLFrm = 40 << FormShift, 374ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng NVTBLFrm = 41 << FormShift, 375ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 376ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng //===------------------------------------------------------------------===// 377ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Misc flags. 378ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 379ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // UnaryDP - Indicates this is a unary data processing instruction, i.e. 380ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // it doesn't have a Rn operand. 381ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng UnaryDP = 1 << 13, 382ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 383ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Xform16Bit - Indicates this Thumb2 instruction may be transformed into 384ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // a 16-bit Thumb instruction if certain conditions are met. 385ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng Xform16Bit = 1 << 14, 386ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 38747a0d52b69056250a1edaca8b28f705993094542Jim Grosbach // ThumbArithFlagSetting - The instruction is a 16-bit flag setting Thumb 38847a0d52b69056250a1edaca8b28f705993094542Jim Grosbach // instruction. Used by the parser to determine whether to require the 'S' 38947a0d52b69056250a1edaca8b28f705993094542Jim Grosbach // suffix on the mnemonic (when not in an IT block) or preclude it (when 39047a0d52b69056250a1edaca8b28f705993094542Jim Grosbach // in an IT block). 39147a0d52b69056250a1edaca8b28f705993094542Jim Grosbach ThumbArithFlagSetting = 1 << 18, 39247a0d52b69056250a1edaca8b28f705993094542Jim Grosbach 393ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng //===------------------------------------------------------------------===// 394ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Code domain. 395ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng DomainShift = 15, 396ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng DomainMask = 7 << DomainShift, 397ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng DomainGeneral = 0 << DomainShift, 398ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng DomainVFP = 1 << DomainShift, 399ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng DomainNEON = 2 << DomainShift, 400ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng DomainNEONA8 = 4 << DomainShift, 401ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 402ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng //===------------------------------------------------------------------===// 403ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // Field shifts - such shifts are used to set field while generating 404ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // machine instructions. 405ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // 406ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // FIXME: This list will need adjusting/fixing as the MC code emitter 407ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng // takes shape and the ARMCodeEmitter.cpp bits go away. 408ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng ShiftTypeShift = 4, 409ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 410ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng M_BitShift = 5, 411ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng ShiftImmShift = 5, 412ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng ShiftShift = 7, 413ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng N_BitShift = 7, 414ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng ImmHiShift = 8, 415ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng SoRotImmShift = 8, 416ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng RegRsShift = 8, 417ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng ExtRotImmShift = 10, 418ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng RegRdLoShift = 12, 419ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng RegRdShift = 12, 420ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng RegRdHiShift = 16, 421ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng RegRnShift = 16, 422ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng S_BitShift = 20, 423ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng W_BitShift = 21, 424ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng AM3_I_BitShift = 22, 425ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng D_BitShift = 22, 426ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng U_BitShift = 23, 427ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng P_BitShift = 24, 428ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng I_BitShift = 25, 429ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng CondShift = 28 430ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng }; 431ee04a6d3a40c3017124e3fd89a0db473a2824498Evan Cheng 432c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach} // end namespace ARMII 433c686e33d12f84e1e1f5c96eadef851d078bab043Jim Grosbach 434a4c3c8f28d9465dc7c42eb43c2377530f1821574Jim Grosbach} // end namespace llvm; 435754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach 436754578b56518d57c28cd439a6dab2b75865e6746Jim Grosbach#endif 437