NVPTX.h revision 7536ecf2916a6a986f0d328069e3a210f34d5ea7
1//===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the entry points for global functions defined in 11// the LLVM NVPTX back-end. 12// 13//===----------------------------------------------------------------------===// 14 15#ifndef LLVM_TARGET_NVPTX_H 16#define LLVM_TARGET_NVPTX_H 17 18#include "MCTargetDesc/NVPTXBaseInfo.h" 19#include "llvm/IR/Module.h" 20#include "llvm/IR/Value.h" 21#include "llvm/Support/ErrorHandling.h" 22#include "llvm/Target/TargetMachine.h" 23#include <cassert> 24#include <iosfwd> 25 26namespace llvm { 27class NVPTXTargetMachine; 28class FunctionPass; 29class formatted_raw_ostream; 30 31namespace NVPTXCC { 32enum CondCodes { 33 EQ, 34 NE, 35 LT, 36 LE, 37 GT, 38 GE 39}; 40} 41 42inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) { 43 switch (CC) { 44 case NVPTXCC::NE: 45 return "ne"; 46 case NVPTXCC::EQ: 47 return "eq"; 48 case NVPTXCC::LT: 49 return "lt"; 50 case NVPTXCC::LE: 51 return "le"; 52 case NVPTXCC::GT: 53 return "gt"; 54 case NVPTXCC::GE: 55 return "ge"; 56 } 57 llvm_unreachable("Unknown condition code"); 58} 59 60FunctionPass * 61createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel); 62FunctionPass *createLowerStructArgsPass(NVPTXTargetMachine &); 63FunctionPass *createNVPTXReMatPass(NVPTXTargetMachine &); 64FunctionPass *createNVPTXReMatBlockPass(NVPTXTargetMachine &); 65ModulePass *createGenericToNVVMPass(); 66 67bool isImageOrSamplerVal(const Value *, const Module *); 68 69extern Target TheNVPTXTarget32; 70extern Target TheNVPTXTarget64; 71 72namespace NVPTX { 73enum DrvInterface { 74 NVCL, 75 CUDA, 76 TEST 77}; 78 79// A field inside TSFlags needs a shift and a mask. The usage is 80// always as follows : 81// ((TSFlags & fieldMask) >> fieldShift) 82// The enum keeps the mask, the shift, and all valid values of the 83// field in one place. 84enum VecInstType { 85 VecInstTypeShift = 0, 86 VecInstTypeMask = 0xF, 87 88 VecNOP = 0, 89 VecLoad = 1, 90 VecStore = 2, 91 VecBuild = 3, 92 VecShuffle = 4, 93 VecExtract = 5, 94 VecInsert = 6, 95 VecDest = 7, 96 VecOther = 15 97}; 98 99enum SimpleMove { 100 SimpleMoveMask = 0x10, 101 SimpleMoveShift = 4 102}; 103enum LoadStore { 104 isLoadMask = 0x20, 105 isLoadShift = 5, 106 isStoreMask = 0x40, 107 isStoreShift = 6 108}; 109 110namespace PTXLdStInstCode { 111enum AddressSpace { 112 GENERIC = 0, 113 GLOBAL = 1, 114 CONSTANT = 2, 115 SHARED = 3, 116 PARAM = 4, 117 LOCAL = 5 118}; 119enum FromType { 120 Unsigned = 0, 121 Signed, 122 Float 123}; 124enum VecType { 125 Scalar = 1, 126 V2 = 2, 127 V4 = 4 128}; 129} 130} 131} // end namespace llvm; 132 133// Defines symbolic names for NVPTX registers. This defines a mapping from 134// register name to register number. 135#define GET_REGINFO_ENUM 136#include "NVPTXGenRegisterInfo.inc" 137 138// Defines symbolic names for the NVPTX instructions. 139#define GET_INSTRINFO_ENUM 140#include "NVPTXGenInstrInfo.inc" 141 142#endif 143