1//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the X86 specific subclass of TargetMachine. 11// 12//===----------------------------------------------------------------------===// 13 14#include "X86TargetMachine.h" 15#include "X86.h" 16#include "X86TargetObjectFile.h" 17#include "X86TargetTransformInfo.h" 18#include "llvm/CodeGen/Passes.h" 19#include "llvm/IR/Function.h" 20#include "llvm/IR/LegacyPassManager.h" 21#include "llvm/Support/CommandLine.h" 22#include "llvm/Support/FormattedStream.h" 23#include "llvm/Support/TargetRegistry.h" 24#include "llvm/Target/TargetOptions.h" 25using namespace llvm; 26 27extern "C" void LLVMInitializeX86Target() { 28 // Register the target. 29 RegisterTargetMachine<X86TargetMachine> X(TheX86_32Target); 30 RegisterTargetMachine<X86TargetMachine> Y(TheX86_64Target); 31} 32 33static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) { 34 if (TT.isOSBinFormatMachO()) { 35 if (TT.getArch() == Triple::x86_64) 36 return make_unique<X86_64MachoTargetObjectFile>(); 37 return make_unique<TargetLoweringObjectFileMachO>(); 38 } 39 40 if (TT.isOSLinux() || TT.isOSNaCl()) 41 return make_unique<X86LinuxNaClTargetObjectFile>(); 42 if (TT.isOSBinFormatELF()) 43 return make_unique<X86ELFTargetObjectFile>(); 44 if (TT.isKnownWindowsMSVCEnvironment()) 45 return make_unique<X86WindowsTargetObjectFile>(); 46 if (TT.isOSBinFormatCOFF()) 47 return make_unique<TargetLoweringObjectFileCOFF>(); 48 llvm_unreachable("unknown subtarget type"); 49} 50 51static std::string computeDataLayout(const Triple &TT) { 52 // X86 is little endian 53 std::string Ret = "e"; 54 55 Ret += DataLayout::getManglingComponent(TT); 56 // X86 and x32 have 32 bit pointers. 57 if ((TT.isArch64Bit() && 58 (TT.getEnvironment() == Triple::GNUX32 || TT.isOSNaCl())) || 59 !TT.isArch64Bit()) 60 Ret += "-p:32:32"; 61 62 // Some ABIs align 64 bit integers and doubles to 64 bits, others to 32. 63 if (TT.isArch64Bit() || TT.isOSWindows() || TT.isOSNaCl()) 64 Ret += "-i64:64"; 65 else 66 Ret += "-f64:32:64"; 67 68 // Some ABIs align long double to 128 bits, others to 32. 69 if (TT.isOSNaCl()) 70 ; // No f80 71 else if (TT.isArch64Bit() || TT.isOSDarwin()) 72 Ret += "-f80:128"; 73 else 74 Ret += "-f80:32"; 75 76 // The registers can hold 8, 16, 32 or, in x86-64, 64 bits. 77 if (TT.isArch64Bit()) 78 Ret += "-n8:16:32:64"; 79 else 80 Ret += "-n8:16:32"; 81 82 // The stack is aligned to 32 bits on some ABIs and 128 bits on others. 83 if (!TT.isArch64Bit() && TT.isOSWindows()) 84 Ret += "-S32"; 85 else 86 Ret += "-S128"; 87 88 return Ret; 89} 90 91/// X86TargetMachine ctor - Create an X86 target. 92/// 93X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, StringRef CPU, 94 StringRef FS, const TargetOptions &Options, 95 Reloc::Model RM, CodeModel::Model CM, 96 CodeGenOpt::Level OL) 97 : LLVMTargetMachine(T, computeDataLayout(Triple(TT)), TT, CPU, FS, Options, 98 RM, CM, OL), 99 TLOF(createTLOF(Triple(getTargetTriple()))), 100 Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) { 101 // default to hard float ABI 102 if (Options.FloatABIType == FloatABI::Default) 103 this->Options.FloatABIType = FloatABI::Hard; 104 105 // Windows stack unwinder gets confused when execution flow "falls through" 106 // after a call to 'noreturn' function. 107 // To prevent that, we emit a trap for 'unreachable' IR instructions. 108 // (which on X86, happens to be the 'ud2' instruction) 109 if (Subtarget.isTargetWin64()) 110 this->Options.TrapUnreachable = true; 111 112 initAsmInfo(); 113} 114 115X86TargetMachine::~X86TargetMachine() {} 116 117const X86Subtarget * 118X86TargetMachine::getSubtargetImpl(const Function &F) const { 119 Attribute CPUAttr = F.getFnAttribute("target-cpu"); 120 Attribute FSAttr = F.getFnAttribute("target-features"); 121 122 std::string CPU = !CPUAttr.hasAttribute(Attribute::None) 123 ? CPUAttr.getValueAsString().str() 124 : TargetCPU; 125 std::string FS = !FSAttr.hasAttribute(Attribute::None) 126 ? FSAttr.getValueAsString().str() 127 : TargetFS; 128 129 // FIXME: This is related to the code below to reset the target options, 130 // we need to know whether or not the soft float flag is set on the 131 // function before we can generate a subtarget. We also need to use 132 // it as a key for the subtarget since that can be the only difference 133 // between two functions. 134 Attribute SFAttr = F.getFnAttribute("use-soft-float"); 135 bool SoftFloat = !SFAttr.hasAttribute(Attribute::None) 136 ? SFAttr.getValueAsString() == "true" 137 : Options.UseSoftFloat; 138 139 auto &I = SubtargetMap[CPU + FS + (SoftFloat ? "use-soft-float=true" 140 : "use-soft-float=false")]; 141 if (!I) { 142 // This needs to be done before we create a new subtarget since any 143 // creation will depend on the TM and the code generation flags on the 144 // function that reside in TargetOptions. 145 resetTargetOptions(F); 146 I = llvm::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this, 147 Options.StackAlignmentOverride); 148 } 149 return I.get(); 150} 151 152//===----------------------------------------------------------------------===// 153// Command line options for x86 154//===----------------------------------------------------------------------===// 155static cl::opt<bool> 156UseVZeroUpper("x86-use-vzeroupper", cl::Hidden, 157 cl::desc("Minimize AVX to SSE transition penalty"), 158 cl::init(true)); 159 160//===----------------------------------------------------------------------===// 161// X86 TTI query. 162//===----------------------------------------------------------------------===// 163 164TargetIRAnalysis X86TargetMachine::getTargetIRAnalysis() { 165 return TargetIRAnalysis( 166 [this](Function &F) { return TargetTransformInfo(X86TTIImpl(this, F)); }); 167} 168 169 170//===----------------------------------------------------------------------===// 171// Pass Pipeline Configuration 172//===----------------------------------------------------------------------===// 173 174namespace { 175/// X86 Code Generator Pass Configuration Options. 176class X86PassConfig : public TargetPassConfig { 177public: 178 X86PassConfig(X86TargetMachine *TM, PassManagerBase &PM) 179 : TargetPassConfig(TM, PM) {} 180 181 X86TargetMachine &getX86TargetMachine() const { 182 return getTM<X86TargetMachine>(); 183 } 184 185 void addIRPasses() override; 186 bool addInstSelector() override; 187 bool addILPOpts() override; 188 void addPreRegAlloc() override; 189 void addPostRegAlloc() override; 190 void addPreEmitPass() override; 191}; 192} // namespace 193 194TargetPassConfig *X86TargetMachine::createPassConfig(PassManagerBase &PM) { 195 return new X86PassConfig(this, PM); 196} 197 198void X86PassConfig::addIRPasses() { 199 addPass(createAtomicExpandPass(&getX86TargetMachine())); 200 201 TargetPassConfig::addIRPasses(); 202} 203 204bool X86PassConfig::addInstSelector() { 205 // Install an instruction selector. 206 addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel())); 207 208 // For ELF, cleanup any local-dynamic TLS accesses. 209 if (Triple(TM->getTargetTriple()).isOSBinFormatELF() && 210 getOptLevel() != CodeGenOpt::None) 211 addPass(createCleanupLocalDynamicTLSPass()); 212 213 addPass(createX86GlobalBaseRegPass()); 214 215 return false; 216} 217 218bool X86PassConfig::addILPOpts() { 219 addPass(&EarlyIfConverterID); 220 return true; 221} 222 223void X86PassConfig::addPreRegAlloc() { 224 addPass(createX86CallFrameOptimization()); 225} 226 227void X86PassConfig::addPostRegAlloc() { 228 addPass(createX86FloatingPointStackifierPass()); 229} 230 231void X86PassConfig::addPreEmitPass() { 232 if (getOptLevel() != CodeGenOpt::None) 233 addPass(createExecutionDependencyFixPass(&X86::VR128RegClass)); 234 235 if (UseVZeroUpper) 236 addPass(createX86IssueVZeroUpperPass()); 237 238 if (getOptLevel() != CodeGenOpt::None) { 239 addPass(createX86PadShortFunctions()); 240 addPass(createX86FixupLEAs()); 241 } 242} 243