pb_buffer_fenced.c revision ea4ca10b1bec67c8a60db0e4e5581318ce9f62f9
1/**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28/**
29 * \file
30 * Implementation of fenced buffers.
31 *
32 * \author José Fonseca <jrfonseca-at-tungstengraphics-dot-com>
33 * \author Thomas Hellström <thomas-at-tungstengraphics-dot-com>
34 */
35
36
37#include "pipe/p_config.h"
38
39#if defined(PIPE_OS_LINUX)
40#include <unistd.h>
41#endif
42
43#include "pipe/p_compiler.h"
44#include "pipe/p_error.h"
45#include "pipe/p_debug.h"
46#include "pipe/p_winsys.h"
47#include "pipe/p_thread.h"
48#include "pipe/p_util.h"
49#include "util/u_double_list.h"
50
51#include "pb_buffer.h"
52#include "pb_buffer_fenced.h"
53
54
55
56/**
57 * Convenience macro (type safe).
58 */
59#define SUPER(__derived) (&(__derived)->base)
60
61#define PIPE_BUFFER_USAGE_CPU_READ_WRITE \
62   ( PIPE_BUFFER_USAGE_CPU_READ | PIPE_BUFFER_USAGE_CPU_WRITE )
63#define PIPE_BUFFER_USAGE_GPU_READ_WRITE \
64   ( PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE )
65#define PIPE_BUFFER_USAGE_WRITE \
66   ( PIPE_BUFFER_USAGE_CPU_WRITE | PIPE_BUFFER_USAGE_GPU_WRITE )
67
68
69struct fenced_buffer_list
70{
71   _glthread_Mutex mutex;
72
73   struct pipe_winsys *winsys;
74
75   size_t numDelayed;
76
77   struct list_head delayed;
78};
79
80
81/**
82 * Wrapper around a pipe buffer which adds fencing and reference counting.
83 */
84struct fenced_buffer
85{
86   struct pb_buffer base;
87
88   struct pb_buffer *buffer;
89
90   /* FIXME: protect access with mutex */
91
92   /**
93    * A bitmask of PIPE_BUFFER_USAGE_CPU/GPU_READ/WRITE describing the current
94    * buffer usage.
95    */
96   unsigned flags;
97
98   unsigned mapcount;
99   struct pipe_fence_handle *fence;
100
101   struct list_head head;
102   struct fenced_buffer_list *list;
103};
104
105
106static INLINE struct fenced_buffer *
107fenced_buffer(struct pb_buffer *buf)
108{
109   assert(buf);
110   assert(buf->vtbl == &fenced_buffer_vtbl);
111   return (struct fenced_buffer *)buf;
112}
113
114
115static INLINE void
116_fenced_buffer_add(struct fenced_buffer *fenced_buf)
117{
118   struct fenced_buffer_list *fenced_list = fenced_buf->list;
119
120   assert(fenced_buf->base.base.refcount);
121   assert(fenced_buf->flags & PIPE_BUFFER_USAGE_GPU_READ_WRITE);
122   assert(fenced_buf->fence);
123
124   assert(!fenced_buf->head.prev);
125   assert(!fenced_buf->head.next);
126   LIST_ADDTAIL(&fenced_buf->head, &fenced_list->delayed);
127   ++fenced_list->numDelayed;
128}
129
130
131/**
132 * Actually destroy the buffer.
133 */
134static INLINE void
135_fenced_buffer_destroy(struct fenced_buffer *fenced_buf)
136{
137   assert(!fenced_buf->base.base.refcount);
138   assert(!fenced_buf->fence);
139   pb_reference(&fenced_buf->buffer, NULL);
140   FREE(fenced_buf);
141}
142
143
144static INLINE void
145_fenced_buffer_remove(struct fenced_buffer *fenced_buf)
146{
147   struct fenced_buffer_list *fenced_list = fenced_buf->list;
148   struct pipe_winsys *winsys = fenced_list->winsys;
149
150   assert(fenced_buf->fence);
151
152   winsys->fence_reference(winsys, &fenced_buf->fence, NULL);
153   fenced_buf->flags &= ~PIPE_BUFFER_USAGE_GPU_READ_WRITE;
154
155   assert(fenced_buf->head.prev);
156   assert(fenced_buf->head.next);
157   LIST_DEL(&fenced_buf->head);
158#ifdef DEBUG
159   fenced_buf->head.prev = NULL;
160   fenced_buf->head.next = NULL;
161#endif
162
163   assert(fenced_list->numDelayed);
164   --fenced_list->numDelayed;
165
166   if(!fenced_buf->base.base.refcount)
167      _fenced_buffer_destroy(fenced_buf);
168}
169
170
171static INLINE enum pipe_error
172_fenced_buffer_finish(struct fenced_buffer *fenced_buf)
173{
174   struct fenced_buffer_list *fenced_list = fenced_buf->list;
175   struct pipe_winsys *winsys = fenced_list->winsys;
176
177   debug_warning("waiting for GPU");
178
179   assert(fenced_buf->fence);
180   if(fenced_buf->fence) {
181      if(winsys->fence_finish(winsys, fenced_buf->fence, 0) != 0) {
182	 return PIPE_ERROR;
183      }
184      /* Remove from the fenced list */
185      _fenced_buffer_remove(fenced_buf); /* TODO: remove consequents */
186   }
187
188   fenced_buf->flags &= ~PIPE_BUFFER_USAGE_GPU_READ_WRITE;
189   return PIPE_OK;
190}
191
192
193/**
194 * Free as many fenced buffers from the list head as possible.
195 */
196static void
197_fenced_buffer_list_check_free(struct fenced_buffer_list *fenced_list,
198                               int wait)
199{
200   struct pipe_winsys *winsys = fenced_list->winsys;
201   struct list_head *curr, *next;
202   struct fenced_buffer *fenced_buf;
203   struct pipe_fence_handle *prev_fence = NULL;
204
205   curr = fenced_list->delayed.next;
206   next = curr->next;
207   while(curr != &fenced_list->delayed) {
208      fenced_buf = LIST_ENTRY(struct fenced_buffer, curr, head);
209
210      if(fenced_buf->fence != prev_fence) {
211	 int signaled;
212	 if (wait)
213	    signaled = winsys->fence_finish(winsys, fenced_buf->fence, 0);
214	 else
215	    signaled = winsys->fence_signalled(winsys, fenced_buf->fence, 0);
216	 if (signaled != 0)
217	    break;
218	 prev_fence = fenced_buf->fence;
219      }
220      else {
221	 assert(winsys->fence_signalled(winsys, fenced_buf->fence, 0) == 0);
222      }
223
224      _fenced_buffer_remove(fenced_buf);
225
226      curr = next;
227      next = curr->next;
228   }
229}
230
231
232static void
233fenced_buffer_destroy(struct pb_buffer *buf)
234{
235   struct fenced_buffer *fenced_buf = fenced_buffer(buf);
236   struct fenced_buffer_list *fenced_list = fenced_buf->list;
237
238   _glthread_LOCK_MUTEX(fenced_list->mutex);
239   assert(fenced_buf->base.base.refcount == 0);
240   if (fenced_buf->fence) {
241      struct pipe_winsys *winsys = fenced_list->winsys;
242      if(winsys->fence_signalled(winsys, fenced_buf->fence, 0) == 0) {
243	 struct list_head *curr, *prev;
244	 curr = &fenced_buf->head;
245	 prev = curr->prev;
246	 do {
247	    fenced_buf = LIST_ENTRY(struct fenced_buffer, curr, head);
248	    assert(winsys->fence_signalled(winsys, fenced_buf->fence, 0) == 0);
249	    _fenced_buffer_remove(fenced_buf);
250	    curr = prev;
251	    prev = curr->prev;
252	 } while (curr != &fenced_list->delayed);
253      }
254      else {
255	 /* delay destruction */
256      }
257   }
258   else {
259      _fenced_buffer_destroy(fenced_buf);
260   }
261   _glthread_UNLOCK_MUTEX(fenced_list->mutex);
262}
263
264
265static void *
266fenced_buffer_map(struct pb_buffer *buf,
267                  unsigned flags)
268{
269   struct fenced_buffer *fenced_buf = fenced_buffer(buf);
270   void *map;
271
272   assert(!(flags & ~PIPE_BUFFER_USAGE_CPU_READ_WRITE));
273   flags &= PIPE_BUFFER_USAGE_CPU_READ_WRITE;
274
275   /* Check for GPU read/write access */
276   if(fenced_buf->flags & PIPE_BUFFER_USAGE_GPU_WRITE) {
277      /* Wait for the GPU to finish writing */
278      _fenced_buffer_finish(fenced_buf);
279   }
280
281   /* Check for CPU write access (read is OK) */
282   if(fenced_buf->flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE) {
283      /* this is legal -- just for debugging */
284      debug_warning("concurrent CPU writes");
285   }
286
287   map = pb_map(fenced_buf->buffer, flags);
288   if(map) {
289      ++fenced_buf->mapcount;
290      fenced_buf->flags |= flags;
291   }
292
293   return map;
294}
295
296
297static void
298fenced_buffer_unmap(struct pb_buffer *buf)
299{
300   struct fenced_buffer *fenced_buf = fenced_buffer(buf);
301   assert(fenced_buf->mapcount);
302   if(fenced_buf->mapcount) {
303      pb_unmap(fenced_buf->buffer);
304      --fenced_buf->mapcount;
305      if(!fenced_buf->mapcount)
306	 fenced_buf->flags &= ~PIPE_BUFFER_USAGE_CPU_READ_WRITE;
307   }
308}
309
310
311static void
312fenced_buffer_get_base_buffer(struct pb_buffer *buf,
313                              struct pb_buffer **base_buf,
314                              unsigned *offset)
315{
316   struct fenced_buffer *fenced_buf = fenced_buffer(buf);
317   pb_get_base_buffer(fenced_buf->buffer, base_buf, offset);
318}
319
320
321const struct pb_vtbl
322fenced_buffer_vtbl = {
323      fenced_buffer_destroy,
324      fenced_buffer_map,
325      fenced_buffer_unmap,
326      fenced_buffer_get_base_buffer
327};
328
329
330struct pb_buffer *
331fenced_buffer_create(struct fenced_buffer_list *fenced_list,
332                     struct pb_buffer *buffer)
333{
334   struct fenced_buffer *buf;
335
336   if(!buffer)
337      return NULL;
338
339   buf = CALLOC_STRUCT(fenced_buffer);
340   if(!buf) {
341      pb_reference(&buffer, NULL);
342      return NULL;
343   }
344
345   buf->base.base.refcount = 1;
346   buf->base.base.alignment = buffer->base.alignment;
347   buf->base.base.usage = buffer->base.usage;
348   buf->base.base.size = buffer->base.size;
349
350   buf->base.vtbl = &fenced_buffer_vtbl;
351   buf->buffer = buffer;
352   buf->list = fenced_list;
353
354   return &buf->base;
355}
356
357
358void
359buffer_fence(struct pb_buffer *buf,
360             struct pipe_fence_handle *fence)
361{
362   struct fenced_buffer *fenced_buf;
363   struct fenced_buffer_list *fenced_list;
364   struct pipe_winsys *winsys;
365   /* FIXME: receive this as a parameter */
366   unsigned flags = fence ? PIPE_BUFFER_USAGE_GPU_READ_WRITE : 0;
367
368   /* This is a public function, so be extra cautious with the buffer passed,
369    * as happens frequently to receive null buffers, or pointer to buffers
370    * other than fenced buffers. */
371   assert(buf);
372   if(!buf)
373      return;
374   assert(buf->vtbl == &fenced_buffer_vtbl);
375   if(buf->vtbl != &fenced_buffer_vtbl)
376      return;
377
378   fenced_buf = fenced_buffer(buf);
379   fenced_list = fenced_buf->list;
380   winsys = fenced_list->winsys;
381
382   if(!fence || fence == fenced_buf->fence) {
383      /* Handle the same fence case specially, not only because it is a fast
384       * path, but mostly to avoid serializing two writes with the same fence,
385       * as that would bring the hardware down to synchronous operation without
386       * any benefit.
387       */
388      fenced_buf->flags |= flags & PIPE_BUFFER_USAGE_GPU_READ_WRITE;
389      return;
390   }
391
392   _glthread_LOCK_MUTEX(fenced_list->mutex);
393   if (fenced_buf->fence)
394      _fenced_buffer_remove(fenced_buf);
395   if (fence) {
396      winsys->fence_reference(winsys, &fenced_buf->fence, fence);
397      fenced_buf->flags |= flags & PIPE_BUFFER_USAGE_GPU_READ_WRITE;
398      _fenced_buffer_add(fenced_buf);
399   }
400   _glthread_UNLOCK_MUTEX(fenced_list->mutex);
401}
402
403
404struct fenced_buffer_list *
405fenced_buffer_list_create(struct pipe_winsys *winsys)
406{
407   struct fenced_buffer_list *fenced_list;
408
409   fenced_list = CALLOC_STRUCT(fenced_buffer_list);
410   if (!fenced_list)
411      return NULL;
412
413   fenced_list->winsys = winsys;
414
415   LIST_INITHEAD(&fenced_list->delayed);
416
417   fenced_list->numDelayed = 0;
418
419   _glthread_INIT_MUTEX(fenced_list->mutex);
420
421   return fenced_list;
422}
423
424
425void
426fenced_buffer_list_check_free(struct fenced_buffer_list *fenced_list,
427                              int wait)
428{
429   _glthread_LOCK_MUTEX(fenced_list->mutex);
430   _fenced_buffer_list_check_free(fenced_list, wait);
431   _glthread_UNLOCK_MUTEX(fenced_list->mutex);
432}
433
434
435void
436fenced_buffer_list_destroy(struct fenced_buffer_list *fenced_list)
437{
438   _glthread_LOCK_MUTEX(fenced_list->mutex);
439
440   /* Wait on outstanding fences */
441   while (fenced_list->numDelayed) {
442      _glthread_UNLOCK_MUTEX(fenced_list->mutex);
443#if defined(PIPE_OS_LINUX)
444      sched_yield();
445#endif
446      _fenced_buffer_list_check_free(fenced_list, 1);
447      _glthread_LOCK_MUTEX(fenced_list->mutex);
448   }
449
450   _glthread_UNLOCK_MUTEX(fenced_list->mutex);
451
452   FREE(fenced_list);
453}
454
455
456