nvc0_screen.c revision 7a40ae4a31f3ab526706fdfda7631d54f094512a
1/*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23#include "util/u_format.h"
24#include "util/u_format_s3tc.h"
25#include "pipe/p_screen.h"
26
27#include "vl/vl_decoder.h"
28#include "vl/vl_video_buffer.h"
29
30#include "nvc0_context.h"
31#include "nvc0_screen.h"
32
33#include "nouveau/nv_object.xml.h"
34#include "nvc0_graph_macros.h"
35
36static boolean
37nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
38                                enum pipe_format format,
39                                enum pipe_texture_target target,
40                                unsigned sample_count,
41                                unsigned bindings)
42{
43   if (!(0x117 & (1 << sample_count))) /* 0, 1, 2, 4 or 8 */
44      return FALSE;
45
46   if (!util_format_is_supported(format, bindings))
47      return FALSE;
48
49   switch (format) {
50   case PIPE_FORMAT_R8G8B8A8_UNORM:
51   case PIPE_FORMAT_R8G8B8X8_UNORM:
52      /* HACK: GL requires equal formats for MS resolve and window is BGRA */
53      if (bindings & PIPE_BIND_RENDER_TARGET)
54         return FALSE;
55   default:
56      break;
57   }
58
59   /* transfers & shared are always supported */
60   bindings &= ~(PIPE_BIND_TRANSFER_READ |
61                 PIPE_BIND_TRANSFER_WRITE |
62                 PIPE_BIND_SHARED);
63
64   return (nvc0_format_table[format].usage & bindings) == bindings;
65}
66
67static int
68nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
69{
70   switch (param) {
71   case PIPE_CAP_MAX_COMBINED_SAMPLERS:
72      return 16 * PIPE_SHADER_TYPES; /* NOTE: should not count COMPUTE */
73   case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
74   case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
75      return 15;
76   case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
77      return 12;
78   case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
79      return 2048;
80   case PIPE_CAP_MIN_TEXEL_OFFSET:
81      return -8;
82   case PIPE_CAP_MAX_TEXEL_OFFSET:
83      return 7;
84   case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
85   case PIPE_CAP_TEXTURE_SWIZZLE:
86   case PIPE_CAP_TEXTURE_SHADOW_MAP:
87   case PIPE_CAP_NPOT_TEXTURES:
88   case PIPE_CAP_ANISOTROPIC_FILTER:
89   case PIPE_CAP_SEAMLESS_CUBE_MAP:
90      return 1;
91   case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
92      return 0;
93   case PIPE_CAP_TWO_SIDED_STENCIL:
94   case PIPE_CAP_DEPTH_CLIP_DISABLE:
95   case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
96   case PIPE_CAP_POINT_SPRITE:
97      return 1;
98   case PIPE_CAP_SM3:
99      return 1;
100   case PIPE_CAP_GLSL_FEATURE_LEVEL:
101      return 150;
102   case PIPE_CAP_MAX_RENDER_TARGETS:
103      return 8;
104   case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
105      return 1;
106   case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
107   case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
108   case PIPE_CAP_VERTEX_COLOR_CLAMPED:
109      return 1;
110   case PIPE_CAP_TIMER_QUERY:
111   case PIPE_CAP_OCCLUSION_QUERY:
112   case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
113      return 1;
114   case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
115      return 4;
116   case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
117   case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
118      return 128;
119   case PIPE_CAP_BLEND_EQUATION_SEPARATE:
120   case PIPE_CAP_INDEP_BLEND_ENABLE:
121   case PIPE_CAP_INDEP_BLEND_FUNC:
122      return 1;
123   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
124   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
125      return 1;
126   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
127   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
128      return 0;
129   case PIPE_CAP_SHADER_STENCIL_EXPORT:
130      return 0;
131   case PIPE_CAP_PRIMITIVE_RESTART:
132   case PIPE_CAP_TGSI_INSTANCEID:
133   case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
134   case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
135   case PIPE_CAP_CONDITIONAL_RENDER:
136   case PIPE_CAP_TEXTURE_BARRIER:
137   case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
138      return 1;
139   case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
140   case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
141      return 0; /* state trackers will know better */
142   default:
143      NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
144      return 0;
145   }
146}
147
148static int
149nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
150                             enum pipe_shader_cap param)
151{
152   switch (shader) {
153   case PIPE_SHADER_VERTEX:
154      /*
155   case PIPE_SHADER_TESSELLATION_CONTROL:
156   case PIPE_SHADER_TESSELLATION_EVALUATION:
157      */
158   case PIPE_SHADER_GEOMETRY:
159   case PIPE_SHADER_FRAGMENT:
160      break;
161   default:
162      return 0;
163   }
164
165   switch (param) {
166   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
167   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
168   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
169   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
170      return 16384;
171   case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
172      return 16;
173   case PIPE_SHADER_CAP_MAX_INPUTS:
174      if (shader == PIPE_SHADER_VERTEX)
175         return 32;
176      if (shader == PIPE_SHADER_FRAGMENT)
177         return (0x200 + 0x20 + 0x80) / 16; /* generic + colors + TexCoords */
178      return (0x200 + 0x40 + 0x80) / 16; /* without 0x60 for per-patch inputs */
179   case PIPE_SHADER_CAP_MAX_CONSTS:
180      return 65536 / 16;
181   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
182      return 14;
183   case PIPE_SHADER_CAP_MAX_ADDRS:
184      return 1;
185   case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
186   case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
187      return shader != PIPE_SHADER_FRAGMENT;
188   case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
189   case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
190      return 1;
191   case PIPE_SHADER_CAP_MAX_PREDS:
192      return 0;
193   case PIPE_SHADER_CAP_MAX_TEMPS:
194      return NVC0_CAP_MAX_PROGRAM_TEMPS;
195   case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
196      return 1;
197   case PIPE_SHADER_CAP_SUBROUTINES:
198      return 1; /* but inlining everything, we need function declarations */
199   case PIPE_SHADER_CAP_INTEGERS:
200      return 1;
201   case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
202      return 16; /* would be 32 in linked (OpenGL-style) mode */
203      /*
204   case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLER_VIEWS:
205      return 32;
206      */
207   default:
208      NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
209      return 0;
210   }
211}
212
213static float
214nvc0_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
215{
216   switch (param) {
217   case PIPE_CAPF_MAX_LINE_WIDTH:
218   case PIPE_CAPF_MAX_LINE_WIDTH_AA:
219      return 10.0f;
220   case PIPE_CAPF_MAX_POINT_WIDTH:
221      return 63.0f;
222   case PIPE_CAPF_MAX_POINT_WIDTH_AA:
223      return 63.375f;
224   case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
225      return 16.0f;
226   case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
227      return 15.0f;
228   default:
229      NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
230      return 0.0f;
231   }
232}
233
234static void
235nvc0_screen_destroy(struct pipe_screen *pscreen)
236{
237   struct nvc0_screen *screen = nvc0_screen(pscreen);
238
239   if (screen->base.fence.current) {
240      nouveau_fence_wait(screen->base.fence.current);
241      nouveau_fence_ref(NULL, &screen->base.fence.current);
242   }
243   if (screen->base.pushbuf)
244      screen->base.pushbuf->user_priv = NULL;
245
246   if (screen->blitctx)
247      FREE(screen->blitctx);
248
249   nouveau_bo_ref(NULL, &screen->text);
250   nouveau_bo_ref(NULL, &screen->tls);
251   nouveau_bo_ref(NULL, &screen->txc);
252   nouveau_bo_ref(NULL, &screen->fence.bo);
253   nouveau_bo_ref(NULL, &screen->vfetch_cache);
254
255   nouveau_heap_destroy(&screen->lib_code);
256   nouveau_heap_destroy(&screen->text_heap);
257
258   if (screen->tic.entries)
259      FREE(screen->tic.entries);
260
261   nouveau_mm_destroy(screen->mm_VRAM_fe0);
262
263   nouveau_object_del(&screen->fermi);
264   nouveau_object_del(&screen->eng2d);
265   nouveau_object_del(&screen->m2mf);
266
267   nouveau_screen_fini(&screen->base);
268
269   FREE(screen);
270}
271
272static int
273nvc0_graph_set_macro(struct nvc0_screen *screen, uint32_t m, unsigned pos,
274                     unsigned size, const uint32_t *data)
275{
276   struct nouveau_pushbuf *push = screen->base.pushbuf;
277
278   size /= 4;
279
280   BEGIN_NVC0(push, SUBC_3D(NVC0_GRAPH_MACRO_ID), 2);
281   PUSH_DATA (push, (m - 0x3800) / 8);
282   PUSH_DATA (push, pos);
283   BEGIN_1IC0(push, SUBC_3D(NVC0_GRAPH_MACRO_UPLOAD_POS), size + 1);
284   PUSH_DATA (push, pos);
285   PUSH_DATAp(push, data, size);
286
287   return pos + size;
288}
289
290static void
291nvc0_magic_3d_init(struct nouveau_pushbuf *push)
292{
293   BEGIN_NVC0(push, SUBC_3D(0x10cc), 1);
294   PUSH_DATA (push, 0xff);
295   BEGIN_NVC0(push, SUBC_3D(0x10e0), 2);
296   PUSH_DATA(push, 0xff);
297   PUSH_DATA(push, 0xff);
298   BEGIN_NVC0(push, SUBC_3D(0x10ec), 2);
299   PUSH_DATA(push, 0xff);
300   PUSH_DATA(push, 0xff);
301   BEGIN_NVC0(push, SUBC_3D(0x074c), 1);
302   PUSH_DATA (push, 0x3f);
303
304   BEGIN_NVC0(push, SUBC_3D(0x16a8), 1);
305   PUSH_DATA (push, (3 << 16) | 3);
306   BEGIN_NVC0(push, SUBC_3D(0x1794), 1);
307   PUSH_DATA (push, (2 << 16) | 2);
308   BEGIN_NVC0(push, SUBC_3D(0x0de8), 1);
309   PUSH_DATA (push, 1);
310
311#if 0 /* software method */
312   BEGIN_NVC0(push, SUBC_3D(0x1528), 1); /* MP poke */
313   PUSH_DATA (push, 0);
314#endif
315
316   BEGIN_NVC0(push, SUBC_3D(0x12ac), 1);
317   PUSH_DATA (push, 0);
318   BEGIN_NVC0(push, SUBC_3D(0x0218), 1);
319   PUSH_DATA (push, 0x10);
320   BEGIN_NVC0(push, SUBC_3D(0x10fc), 1);
321   PUSH_DATA (push, 0x10);
322   BEGIN_NVC0(push, SUBC_3D(0x1290), 1);
323   PUSH_DATA (push, 0x10);
324   BEGIN_NVC0(push, SUBC_3D(0x12d8), 2);
325   PUSH_DATA (push, 0x10);
326   PUSH_DATA (push, 0x10);
327   BEGIN_NVC0(push, SUBC_3D(0x06d4), 1);
328   PUSH_DATA (push, 8);
329   BEGIN_NVC0(push, SUBC_3D(0x1140), 1);
330   PUSH_DATA (push, 0x10);
331   BEGIN_NVC0(push, SUBC_3D(0x1610), 1);
332   PUSH_DATA (push, 0xe);
333
334   BEGIN_NVC0(push, SUBC_3D(0x164c), 1);
335   PUSH_DATA (push, 1 << 12);
336   BEGIN_NVC0(push, SUBC_3D(0x151c), 1);
337   PUSH_DATA (push, 1);
338   BEGIN_NVC0(push, SUBC_3D(0x030c), 1);
339   PUSH_DATA (push, 0);
340   BEGIN_NVC0(push, SUBC_3D(0x0300), 1);
341   PUSH_DATA (push, 3);
342#if 0 /* software method */
343   BEGIN_NVC0(push, SUBC_3D(0x1280), 1); /* PGRAPH poke */
344   PUSH_DATA (push, 0);
345#endif
346   BEGIN_NVC0(push, SUBC_3D(0x02d0), 1);
347   PUSH_DATA (push, 0x1f40);
348   BEGIN_NVC0(push, SUBC_3D(0x0fdc), 1);
349   PUSH_DATA (push, 1);
350   BEGIN_NVC0(push, SUBC_3D(0x19c0), 1);
351   PUSH_DATA (push, 1);
352   BEGIN_NVC0(push, SUBC_3D(0x075c), 1);
353   PUSH_DATA (push, 3);
354}
355
356static void
357nvc0_screen_fence_emit(struct pipe_screen *pscreen, u32 *sequence)
358{
359   struct nvc0_screen *screen = nvc0_screen(pscreen);
360   struct nouveau_pushbuf *push = screen->base.pushbuf;
361
362   /* we need to do it after possible flush in MARK_RING */
363   *sequence = ++screen->base.fence.sequence;
364
365   BEGIN_NVC0(push, NVC0_3D(QUERY_ADDRESS_HIGH), 4);
366   PUSH_DATAh(push, screen->fence.bo->offset);
367   PUSH_DATA (push, screen->fence.bo->offset);
368   PUSH_DATA (push, *sequence);
369   PUSH_DATA (push, NVC0_3D_QUERY_GET_FENCE | NVC0_3D_QUERY_GET_SHORT |
370              (0xf << NVC0_3D_QUERY_GET_UNIT__SHIFT));
371}
372
373static u32
374nvc0_screen_fence_update(struct pipe_screen *pscreen)
375{
376   struct nvc0_screen *screen = nvc0_screen(pscreen);
377   return screen->fence.map[0];
378}
379
380#define FAIL_SCREEN_INIT(str, err)                    \
381   do {                                               \
382      NOUVEAU_ERR(str, err);                          \
383      nvc0_screen_destroy(pscreen);                   \
384      return NULL;                                    \
385   } while(0)
386
387struct pipe_screen *
388nvc0_screen_create(struct nouveau_device *dev)
389{
390   struct nvc0_screen *screen;
391   struct pipe_screen *pscreen;
392   struct nouveau_object *chan;
393   struct nouveau_pushbuf *push;
394   int ret;
395   unsigned i;
396   union nouveau_bo_config mm_config;
397
398   screen = CALLOC_STRUCT(nvc0_screen);
399   if (!screen)
400      return NULL;
401   pscreen = &screen->base.base;
402
403   screen->base.sysmem_bindings = PIPE_BIND_CONSTANT_BUFFER;
404
405   ret = nouveau_screen_init(&screen->base, dev);
406   if (ret) {
407      nvc0_screen_destroy(pscreen);
408      return NULL;
409   }
410   chan = screen->base.channel;
411   push = screen->base.pushbuf;
412   push->user_priv = screen;
413
414   pscreen->destroy = nvc0_screen_destroy;
415   pscreen->context_create = nvc0_create;
416   pscreen->is_format_supported = nvc0_screen_is_format_supported;
417   pscreen->get_param = nvc0_screen_get_param;
418   pscreen->get_shader_param = nvc0_screen_get_shader_param;
419   pscreen->get_paramf = nvc0_screen_get_paramf;
420
421   nvc0_screen_init_resource_functions(pscreen);
422
423   nouveau_screen_init_vdec(&screen->base);
424
425   ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096, NULL,
426                        &screen->fence.bo);
427   if (ret)
428      goto fail;
429   nouveau_bo_map(screen->fence.bo, 0, NULL);
430   screen->fence.map = screen->fence.bo->map;
431   screen->base.fence.emit = nvc0_screen_fence_emit;
432   screen->base.fence.update = nvc0_screen_fence_update;
433
434   ret = nouveau_object_new(chan, 0xbeef9039, NVC0_M2MF_CLASS, NULL, 0,
435                            &screen->m2mf);
436   if (ret)
437      FAIL_SCREEN_INIT("Error allocating PGRAPH context for M2MF: %d\n", ret);
438
439   BEGIN_NVC0(push, SUBC_M2MF(NV01_SUBCHAN_OBJECT), 1);
440   PUSH_DATA (push, screen->m2mf->oclass);
441   BEGIN_NVC0(push, NVC0_M2MF(NOTIFY_ADDRESS_HIGH), 3);
442   PUSH_DATAh(push, screen->fence.bo->offset + 16);
443   PUSH_DATA (push, screen->fence.bo->offset + 16);
444   PUSH_DATA (push, 0);
445
446   ret = nouveau_object_new(chan, 0xbeef902d, NVC0_2D_CLASS, NULL, 0,
447                            &screen->eng2d);
448   if (ret)
449      FAIL_SCREEN_INIT("Error allocating PGRAPH context for 2D: %d\n", ret);
450
451   BEGIN_NVC0(push, SUBC_2D(NV01_SUBCHAN_OBJECT), 1);
452   PUSH_DATA (push, screen->eng2d->oclass);
453   BEGIN_NVC0(push, NVC0_2D(OPERATION), 1);
454   PUSH_DATA (push, NVC0_2D_OPERATION_SRCCOPY);
455   BEGIN_NVC0(push, NVC0_2D(CLIP_ENABLE), 1);
456   PUSH_DATA (push, 0);
457   BEGIN_NVC0(push, NVC0_2D(COLOR_KEY_ENABLE), 1);
458   PUSH_DATA (push, 0);
459   BEGIN_NVC0(push, SUBC_2D(0x0884), 1);
460   PUSH_DATA (push, 0x3f);
461   BEGIN_NVC0(push, SUBC_2D(0x0888), 1);
462   PUSH_DATA (push, 1);
463
464   ret = nouveau_object_new(chan, 0xbeef9097, NVC0_3D_CLASS, NULL, 0,
465                            &screen->fermi);
466   if (ret)
467      FAIL_SCREEN_INIT("Error allocating PGRAPH context for 3D: %d\n", ret);
468
469   BEGIN_NVC0(push, SUBC_3D(NV01_SUBCHAN_OBJECT), 1);
470   PUSH_DATA (push, screen->fermi->oclass);
471   BEGIN_NVC0(push, NVC0_3D(NOTIFY_ADDRESS_HIGH), 3);
472   PUSH_DATAh(push, screen->fence.bo->offset + 32);
473   PUSH_DATA (push, screen->fence.bo->offset + 32);
474   PUSH_DATA (push, 0);
475
476   BEGIN_NVC0(push, NVC0_3D(COND_MODE), 1);
477   PUSH_DATA (push, NVC0_3D_COND_MODE_ALWAYS);
478
479   if (debug_get_bool_option("NOUVEAU_SHADER_WATCHDOG", TRUE)) {
480      /* kill shaders after about 1 second (at 100 MHz) */
481      BEGIN_NVC0(push, NVC0_3D(WATCHDOG_TIMER), 1);
482      PUSH_DATA (push, 0x17);
483   }
484
485   BEGIN_NVC0(push, NVC0_3D(RT_CONTROL), 1);
486   PUSH_DATA (push, 1);
487
488   BEGIN_NVC0(push, NVC0_3D(CSAA_ENABLE), 1);
489   PUSH_DATA (push, 0);
490   BEGIN_NVC0(push, NVC0_3D(MULTISAMPLE_ENABLE), 1);
491   PUSH_DATA (push, 0);
492   BEGIN_NVC0(push, NVC0_3D(MULTISAMPLE_MODE), 1);
493   PUSH_DATA (push, NVC0_3D_MULTISAMPLE_MODE_MS1);
494   BEGIN_NVC0(push, NVC0_3D(MULTISAMPLE_CTRL), 1);
495   PUSH_DATA (push, 0);
496   BEGIN_NVC0(push, NVC0_3D(LINE_WIDTH_SEPARATE), 1);
497   PUSH_DATA (push, 1);
498   BEGIN_NVC0(push, NVC0_3D(LINE_LAST_PIXEL), 1);
499   PUSH_DATA (push, 0);
500   BEGIN_NVC0(push, NVC0_3D(BLEND_SEPARATE_ALPHA), 1);
501   PUSH_DATA (push, 1);
502   BEGIN_NVC0(push, NVC0_3D(BLEND_ENABLE_COMMON), 1);
503   PUSH_DATA (push, 0);
504   BEGIN_NVC0(push, NVC0_3D(TEX_MISC), 1);
505   PUSH_DATA (push, NVC0_3D_TEX_MISC_SEAMLESS_CUBE_MAP);
506
507   nvc0_magic_3d_init(push);
508
509   ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, NULL,
510                        &screen->text);
511   if (ret)
512      goto fail;
513
514   /* XXX: getting a page fault at the end of the code buffer every few
515    *  launches, don't use the last 256 bytes to work around them - prefetch ?
516    */
517   nouveau_heap_init(&screen->text_heap, 0, (1 << 20) - 0x100);
518
519   ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 12, 6 << 16, NULL,
520                        &screen->uniforms);
521   if (ret)
522      goto fail;
523
524   /* auxiliary constants (6 user clip planes, base instance id) */
525   BEGIN_NVC0(push, NVC0_3D(CB_SIZE), 3);
526   PUSH_DATA (push, 256);
527   PUSH_DATAh(push, screen->uniforms->offset + (5 << 16));
528   PUSH_DATA (push, screen->uniforms->offset + (5 << 16));
529   for (i = 0; i < 5; ++i) {
530      BEGIN_NVC0(push, NVC0_3D(CB_BIND(i)), 1);
531      PUSH_DATA (push, (15 << 4) | 1);
532   }
533
534   screen->tls_size = (16 * 32) * (NVC0_CAP_MAX_PROGRAM_TEMPS * 16);
535   ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17,
536                        screen->tls_size, NULL, &screen->tls);
537   if (ret)
538      goto fail;
539
540   BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
541   PUSH_DATAh(push, screen->text->offset);
542   PUSH_DATA (push, screen->text->offset);
543   BEGIN_NVC0(push, NVC0_3D(TEMP_ADDRESS_HIGH), 4);
544   PUSH_DATAh(push, screen->tls->offset);
545   PUSH_DATA (push, screen->tls->offset);
546   PUSH_DATA (push, screen->tls_size >> 32);
547   PUSH_DATA (push, screen->tls_size);
548   BEGIN_NVC0(push, NVC0_3D(WARP_TEMP_ALLOC), 1);
549   PUSH_DATA (push, 0);
550   BEGIN_NVC0(push, NVC0_3D(LOCAL_BASE), 1);
551   PUSH_DATA (push, 0);
552
553   for (i = 0; i < 5; ++i) {
554      BEGIN_NVC0(push, NVC0_3D(TEX_LIMITS(i)), 1);
555      PUSH_DATA (push, 0x54);
556   }
557   BEGIN_NVC0(push, NVC0_3D(LINKED_TSC), 1);
558   PUSH_DATA (push, 0);
559
560   ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, NULL,
561                        &screen->vfetch_cache);
562   if (ret)
563      goto fail;
564
565   BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
566   PUSH_DATAh(push, screen->vfetch_cache->offset);
567   PUSH_DATA (push, screen->vfetch_cache->offset);
568   PUSH_DATA (push, 3);
569
570   ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 17, NULL,
571                        &screen->txc);
572   if (ret)
573      goto fail;
574
575   BEGIN_NVC0(push, NVC0_3D(TIC_ADDRESS_HIGH), 3);
576   PUSH_DATAh(push, screen->txc->offset);
577   PUSH_DATA (push, screen->txc->offset);
578   PUSH_DATA (push, NVC0_TIC_MAX_ENTRIES - 1);
579
580   BEGIN_NVC0(push, NVC0_3D(TSC_ADDRESS_HIGH), 3);
581   PUSH_DATAh(push, screen->txc->offset + 65536);
582   PUSH_DATA (push, screen->txc->offset + 65536);
583   PUSH_DATA (push, NVC0_TSC_MAX_ENTRIES - 1);
584
585   BEGIN_NVC0(push, NVC0_3D(SCREEN_Y_CONTROL), 1);
586   PUSH_DATA (push, 0);
587   BEGIN_NVC0(push, NVC0_3D(WINDOW_OFFSET_X), 2);
588   PUSH_DATA (push, 0);
589   PUSH_DATA (push, 0);
590   BEGIN_NVC0(push, NVC0_3D(ZCULL_REGION), 1); /* deactivate ZCULL */
591   PUSH_DATA (push, 0x3f);
592
593   BEGIN_NVC0(push, NVC0_3D(CLIP_RECTS_MODE), 1);
594   PUSH_DATA (push, NVC0_3D_CLIP_RECTS_MODE_INSIDE_ANY);
595   BEGIN_NVC0(push, NVC0_3D(CLIP_RECT_HORIZ(0)), 8 * 2);
596   for (i = 0; i < 8 * 2; ++i)
597      PUSH_DATA(push, 0);
598   BEGIN_NVC0(push, NVC0_3D(CLIP_RECTS_EN), 1);
599   PUSH_DATA (push, 0);
600   BEGIN_NVC0(push, NVC0_3D(CLIPID_ENABLE), 1);
601   PUSH_DATA (push, 0);
602
603   /* neither scissors, viewport nor stencil mask should affect clears */
604   BEGIN_NVC0(push, NVC0_3D(CLEAR_FLAGS), 1);
605   PUSH_DATA (push, 0);
606
607   BEGIN_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 1);
608   PUSH_DATA (push, 1);
609   BEGIN_NVC0(push, NVC0_3D(DEPTH_RANGE_NEAR(0)), 2);
610   PUSH_DATAf(push, 0.0f);
611   PUSH_DATAf(push, 1.0f);
612   BEGIN_NVC0(push, NVC0_3D(VIEW_VOLUME_CLIP_CTRL), 1);
613   PUSH_DATA (push, NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1);
614
615   /* We use scissors instead of exact view volume clipping,
616    * so they're always enabled.
617    */
618   BEGIN_NVC0(push, NVC0_3D(SCISSOR_ENABLE(0)), 3);
619   PUSH_DATA (push, 1);
620   PUSH_DATA (push, 8192 << 16);
621   PUSH_DATA (push, 8192 << 16);
622
623#define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n);
624
625   i = 0;
626   MK_MACRO(NVC0_3D_MACRO_VERTEX_ARRAY_PER_INSTANCE, nvc0_9097_per_instance_bf);
627   MK_MACRO(NVC0_3D_MACRO_BLEND_ENABLES, nvc0_9097_blend_enables);
628   MK_MACRO(NVC0_3D_MACRO_VERTEX_ARRAY_SELECT, nvc0_9097_vertex_array_select);
629   MK_MACRO(NVC0_3D_MACRO_TEP_SELECT, nvc0_9097_tep_select);
630   MK_MACRO(NVC0_3D_MACRO_GP_SELECT, nvc0_9097_gp_select);
631   MK_MACRO(NVC0_3D_MACRO_POLYGON_MODE_FRONT, nvc0_9097_poly_mode_front);
632   MK_MACRO(NVC0_3D_MACRO_POLYGON_MODE_BACK, nvc0_9097_poly_mode_back);
633
634   BEGIN_NVC0(push, NVC0_3D(RASTERIZE_ENABLE), 1);
635   PUSH_DATA (push, 1);
636   BEGIN_NVC0(push, NVC0_3D(RT_SEPARATE_FRAG_DATA), 1);
637   PUSH_DATA (push, 1);
638   BEGIN_NVC0(push, NVC0_3D(MACRO_GP_SELECT), 1);
639   PUSH_DATA (push, 0x40);
640   BEGIN_NVC0(push, NVC0_3D(LAYER), 1);
641   PUSH_DATA (push, 0);
642   BEGIN_NVC0(push, NVC0_3D(MACRO_TEP_SELECT), 1);
643   PUSH_DATA (push, 0x30);
644   BEGIN_NVC0(push, NVC0_3D(PATCH_VERTICES), 1);
645   PUSH_DATA (push, 3);
646   BEGIN_NVC0(push, NVC0_3D(SP_SELECT(2)), 1);
647   PUSH_DATA (push, 0x20);
648   BEGIN_NVC0(push, NVC0_3D(SP_SELECT(0)), 1);
649   PUSH_DATA (push, 0x00);
650
651   BEGIN_NVC0(push, NVC0_3D(POINT_COORD_REPLACE), 1);
652   PUSH_DATA (push, 0);
653   BEGIN_NVC0(push, NVC0_3D(POINT_RASTER_RULES), 1);
654   PUSH_DATA (push, NVC0_3D_POINT_RASTER_RULES_OGL);
655
656   IMMED_NVC0(push, NVC0_3D(EDGEFLAG), 1);
657
658   BEGIN_NVC0(push, NVC0_3D(VERTEX_RUNOUT_ADDRESS_HIGH), 2);
659   PUSH_DATA (push, 0xab);
660   PUSH_DATA (push, 0x00000000);
661
662   PUSH_KICK (push);
663
664   screen->tic.entries = CALLOC(4096, sizeof(void *));
665   screen->tsc.entries = screen->tic.entries + 2048;
666
667   mm_config.nvc0.tile_mode = 0;
668   mm_config.nvc0.memtype = 0xfe0;
669   screen->mm_VRAM_fe0 = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, &mm_config);
670
671   if (!nvc0_blitctx_create(screen))
672      goto fail;
673
674   nouveau_fence_new(&screen->base, &screen->base.fence.current, FALSE);
675
676   return pscreen;
677
678fail:
679   nvc0_screen_destroy(pscreen);
680   return NULL;
681}
682
683int
684nvc0_screen_tic_alloc(struct nvc0_screen *screen, void *entry)
685{
686   int i = screen->tic.next;
687
688   while (screen->tic.lock[i / 32] & (1 << (i % 32)))
689      i = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
690
691   screen->tic.next = (i + 1) & (NVC0_TIC_MAX_ENTRIES - 1);
692
693   if (screen->tic.entries[i])
694      nv50_tic_entry(screen->tic.entries[i])->id = -1;
695
696   screen->tic.entries[i] = entry;
697   return i;
698}
699
700int
701nvc0_screen_tsc_alloc(struct nvc0_screen *screen, void *entry)
702{
703   int i = screen->tsc.next;
704
705   while (screen->tsc.lock[i / 32] & (1 << (i % 32)))
706      i = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
707
708   screen->tsc.next = (i + 1) & (NVC0_TSC_MAX_ENTRIES - 1);
709
710   if (screen->tsc.entries[i])
711      nv50_tsc_entry(screen->tsc.entries[i])->id = -1;
712
713   screen->tsc.entries[i] = entry;
714   return i;
715}
716