r300_state_derived.c revision 6f2936c654c68388b9c43a189a1b8c06f3a9d241
1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_math.h" 27#include "util/u_memory.h" 28 29#include "r300_context.h" 30#include "r300_fs.h" 31#include "r300_hyperz.h" 32#include "r300_screen.h" 33#include "r300_shader_semantics.h" 34#include "r300_state_derived.h" 35#include "r300_state_inlines.h" 36#include "r300_texture.h" 37#include "r300_vs.h" 38 39/* r300_state_derived: Various bits of state which are dependent upon 40 * currently bound CSO data. */ 41 42enum r300_rs_swizzle { 43 SWIZ_XYZW = 0, 44 SWIZ_X001, 45 SWIZ_XY01, 46 SWIZ_0001, 47}; 48 49static void r300_draw_emit_attrib(struct r300_context* r300, 50 enum attrib_emit emit, 51 enum interp_mode interp, 52 int index) 53{ 54 struct r300_vertex_shader* vs = r300->vs_state.state; 55 struct tgsi_shader_info* info = &vs->info; 56 int output; 57 58 output = draw_find_shader_output(r300->draw, 59 info->output_semantic_name[index], 60 info->output_semantic_index[index]); 61 draw_emit_vertex_attr(&r300->vertex_info, emit, interp, output); 62} 63 64static void r300_draw_emit_all_attribs(struct r300_context* r300) 65{ 66 struct r300_vertex_shader* vs = r300->vs_state.state; 67 struct r300_shader_semantics* vs_outputs = &vs->outputs; 68 int i, gen_count; 69 70 /* Position. */ 71 if (vs_outputs->pos != ATTR_UNUSED) { 72 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 73 vs_outputs->pos); 74 } else { 75 assert(0); 76 } 77 78 /* Point size. */ 79 if (vs_outputs->psize != ATTR_UNUSED) { 80 r300_draw_emit_attrib(r300, EMIT_1F_PSIZE, INTERP_POS, 81 vs_outputs->psize); 82 } 83 84 /* Colors. */ 85 for (i = 0; i < ATTR_COLOR_COUNT; i++) { 86 if (vs_outputs->color[i] != ATTR_UNUSED) { 87 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR, 88 vs_outputs->color[i]); 89 } 90 } 91 92 /* Back-face colors. */ 93 for (i = 0; i < ATTR_COLOR_COUNT; i++) { 94 if (vs_outputs->bcolor[i] != ATTR_UNUSED) { 95 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_LINEAR, 96 vs_outputs->bcolor[i]); 97 } 98 } 99 100 /* Texture coordinates. */ 101 /* Only 8 generic vertex attributes can be used. If there are more, 102 * they won't be rasterized. */ 103 gen_count = 0; 104 for (i = 0; i < ATTR_GENERIC_COUNT && gen_count < 8; i++) { 105 if (vs_outputs->generic[i] != ATTR_UNUSED && 106 !(r300->sprite_coord_enable & (1 << i))) { 107 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 108 vs_outputs->generic[i]); 109 gen_count++; 110 } 111 } 112 113 /* Fog coordinates. */ 114 if (gen_count < 8 && vs_outputs->fog != ATTR_UNUSED) { 115 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 116 vs_outputs->fog); 117 gen_count++; 118 } 119 120 /* WPOS. */ 121 if (r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED && gen_count < 8) { 122 DBG(r300, DBG_SWTCL, "draw_emit_attrib: WPOS, index: %i\n", 123 vs_outputs->wpos); 124 r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, 125 vs_outputs->wpos); 126 } 127} 128 129/* Update the PSC tables for SW TCL, using Draw. */ 130static void r300_swtcl_vertex_psc(struct r300_context *r300) 131{ 132 struct r300_vertex_stream_state *vstream = r300->vertex_stream_state.state; 133 struct vertex_info *vinfo = &r300->vertex_info; 134 uint16_t type, swizzle; 135 enum pipe_format format; 136 unsigned i, attrib_count; 137 int* vs_output_tab = r300->stream_loc_notcl; 138 139 memset(vstream, 0, sizeof(struct r300_vertex_stream_state)); 140 141 /* For each Draw attribute, route it to the fragment shader according 142 * to the vs_output_tab. */ 143 attrib_count = vinfo->num_attribs; 144 DBG(r300, DBG_SWTCL, "r300: attrib count: %d\n", attrib_count); 145 for (i = 0; i < attrib_count; i++) { 146 if (vs_output_tab[i] == -1) { 147 assert(0); 148 abort(); 149 } 150 151 format = draw_translate_vinfo_format(vinfo->attrib[i].emit); 152 153 DBG(r300, DBG_SWTCL, 154 "r300: swtcl_vertex_psc [%i] <- %s\n", 155 vs_output_tab[i], util_format_short_name(format)); 156 157 /* Obtain the type of data in this attribute. */ 158 type = r300_translate_vertex_data_type(format); 159 if (type == R300_INVALID_FORMAT) { 160 fprintf(stderr, "r300: Bad vertex format %s.\n", 161 util_format_short_name(format)); 162 assert(0); 163 abort(); 164 } 165 166 type |= vs_output_tab[i] << R300_DST_VEC_LOC_SHIFT; 167 168 /* Obtain the swizzle for this attribute. Note that the default 169 * swizzle in the hardware is not XYZW! */ 170 swizzle = r300_translate_vertex_data_swizzle(format); 171 172 /* Add the attribute to the PSC table. */ 173 if (i & 1) { 174 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 175 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; 176 } else { 177 vstream->vap_prog_stream_cntl[i >> 1] |= type; 178 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 179 } 180 } 181 182 /* Set the last vector in the PSC. */ 183 if (i) { 184 i -= 1; 185 } 186 vstream->vap_prog_stream_cntl[i >> 1] |= 187 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 188 189 vstream->count = (i >> 1) + 1; 190 r300->vertex_stream_state.dirty = TRUE; 191 r300->vertex_stream_state.size = (1 + vstream->count) * 2; 192} 193 194static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr, 195 enum r300_rs_swizzle swiz) 196{ 197 rs->ip[id] |= R300_RS_COL_PTR(ptr); 198 if (swiz == SWIZ_0001) { 199 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_0001); 200 } else { 201 rs->ip[id] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA); 202 } 203 rs->inst[id] |= R300_RS_INST_COL_ID(id); 204} 205 206static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset) 207{ 208 rs->inst[id] |= R300_RS_INST_COL_CN_WRITE | 209 R300_RS_INST_COL_ADDR(fp_offset); 210} 211 212static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr, 213 enum r300_rs_swizzle swiz) 214{ 215 if (swiz == SWIZ_X001) { 216 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) | 217 R300_RS_SEL_S(R300_RS_SEL_C0) | 218 R300_RS_SEL_T(R300_RS_SEL_K0) | 219 R300_RS_SEL_R(R300_RS_SEL_K0) | 220 R300_RS_SEL_Q(R300_RS_SEL_K1); 221 } else if (swiz == SWIZ_XY01) { 222 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) | 223 R300_RS_SEL_S(R300_RS_SEL_C0) | 224 R300_RS_SEL_T(R300_RS_SEL_C1) | 225 R300_RS_SEL_R(R300_RS_SEL_K0) | 226 R300_RS_SEL_Q(R300_RS_SEL_K1); 227 } else { 228 rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) | 229 R300_RS_SEL_S(R300_RS_SEL_C0) | 230 R300_RS_SEL_T(R300_RS_SEL_C1) | 231 R300_RS_SEL_R(R300_RS_SEL_C2) | 232 R300_RS_SEL_Q(R300_RS_SEL_C3); 233 } 234 rs->inst[id] |= R300_RS_INST_TEX_ID(id); 235} 236 237static void r300_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset) 238{ 239 rs->inst[id] |= R300_RS_INST_TEX_CN_WRITE | 240 R300_RS_INST_TEX_ADDR(fp_offset); 241} 242 243static void r500_rs_col(struct r300_rs_block* rs, int id, int ptr, 244 enum r300_rs_swizzle swiz) 245{ 246 rs->ip[id] |= R500_RS_COL_PTR(ptr); 247 if (swiz == SWIZ_0001) { 248 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_0001); 249 } else { 250 rs->ip[id] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA); 251 } 252 rs->inst[id] |= R500_RS_INST_COL_ID(id); 253} 254 255static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset) 256{ 257 rs->inst[id] |= R500_RS_INST_COL_CN_WRITE | 258 R500_RS_INST_COL_ADDR(fp_offset); 259} 260 261static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr, 262 enum r300_rs_swizzle swiz) 263{ 264 int rs_tex_comp = ptr*4; 265 266 if (swiz == SWIZ_X001) { 267 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) | 268 R500_RS_SEL_T(R500_RS_IP_PTR_K0) | 269 R500_RS_SEL_R(R500_RS_IP_PTR_K0) | 270 R500_RS_SEL_Q(R500_RS_IP_PTR_K1); 271 } else if (swiz == SWIZ_XY01) { 272 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) | 273 R500_RS_SEL_T(rs_tex_comp + 1) | 274 R500_RS_SEL_R(R500_RS_IP_PTR_K0) | 275 R500_RS_SEL_Q(R500_RS_IP_PTR_K1); 276 } else { 277 rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) | 278 R500_RS_SEL_T(rs_tex_comp + 1) | 279 R500_RS_SEL_R(rs_tex_comp + 2) | 280 R500_RS_SEL_Q(rs_tex_comp + 3); 281 } 282 rs->inst[id] |= R500_RS_INST_TEX_ID(id); 283} 284 285static void r500_rs_tex_write(struct r300_rs_block* rs, int id, int fp_offset) 286{ 287 rs->inst[id] |= R500_RS_INST_TEX_CN_WRITE | 288 R500_RS_INST_TEX_ADDR(fp_offset); 289} 290 291/* Set up the RS block. 292 * 293 * This is the part of the chipset that is responsible for linking vertex 294 * and fragment shaders and stuffed texture coordinates. 295 * 296 * The rasterizer reads data from VAP, which produces vertex shader outputs, 297 * and GA, which produces stuffed texture coordinates. VAP outputs have 298 * precedence over GA. All outputs must be rasterized otherwise it locks up. 299 * If there are more outputs rasterized than is set in VAP/GA, it locks up 300 * too. The funky part is that this info has been pretty much obtained by trial 301 * and error. */ 302static void r300_update_rs_block(struct r300_context *r300) 303{ 304 struct r300_vertex_shader *vs = r300->vs_state.state; 305 struct r300_shader_semantics *vs_outputs = &vs->outputs; 306 struct r300_shader_semantics *fs_inputs = &r300_fs(r300)->shader->inputs; 307 struct r300_rs_block rs = {0}; 308 int i, col_count = 0, tex_count = 0, fp_offset = 0, count, loc = 0; 309 void (*rX00_rs_col)(struct r300_rs_block*, int, int, enum r300_rs_swizzle); 310 void (*rX00_rs_col_write)(struct r300_rs_block*, int, int); 311 void (*rX00_rs_tex)(struct r300_rs_block*, int, int, enum r300_rs_swizzle); 312 void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int); 313 boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED || 314 vs_outputs->bcolor[1] != ATTR_UNUSED; 315 int *stream_loc_notcl = r300->stream_loc_notcl; 316 317 if (r300->screen->caps.is_r500) { 318 rX00_rs_col = r500_rs_col; 319 rX00_rs_col_write = r500_rs_col_write; 320 rX00_rs_tex = r500_rs_tex; 321 rX00_rs_tex_write = r500_rs_tex_write; 322 } else { 323 rX00_rs_col = r300_rs_col; 324 rX00_rs_col_write = r300_rs_col_write; 325 rX00_rs_tex = r300_rs_tex; 326 rX00_rs_tex_write = r300_rs_tex_write; 327 } 328 329 /* The position is always present in VAP. */ 330 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_POS; 331 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; 332 stream_loc_notcl[loc++] = 0; 333 334 /* Set up the point size in VAP. */ 335 if (vs_outputs->psize != ATTR_UNUSED) { 336 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; 337 stream_loc_notcl[loc++] = 1; 338 } 339 340 /* Set up and rasterize colors. */ 341 for (i = 0; i < ATTR_COLOR_COUNT; i++) { 342 if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used || 343 vs_outputs->color[1] != ATTR_UNUSED) { 344 /* Set up the color in VAP. */ 345 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR; 346 rs.vap_out_vtx_fmt[0] |= 347 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i; 348 stream_loc_notcl[loc++] = 2 + i; 349 350 /* Rasterize it. */ 351 rX00_rs_col(&rs, col_count, col_count, SWIZ_XYZW); 352 353 /* Write it to the FS input register if it's needed by the FS. */ 354 if (fs_inputs->color[i] != ATTR_UNUSED) { 355 rX00_rs_col_write(&rs, col_count, fp_offset); 356 fp_offset++; 357 358 DBG(r300, DBG_RS, 359 "r300: Rasterized color %i written to FS.\n", i); 360 } else { 361 DBG(r300, DBG_RS, "r300: Rasterized color %i unused.\n", i); 362 } 363 col_count++; 364 } else { 365 /* Skip the FS input register, leave it uninitialized. */ 366 /* If we try to set it to (0,0,0,1), it will lock up. */ 367 if (fs_inputs->color[i] != ATTR_UNUSED) { 368 fp_offset++; 369 370 DBG(r300, DBG_RS, "r300: FS input color %i unassigned%s.\n", 371 i); 372 } 373 } 374 } 375 376 /* Set up back-face colors. The rasterizer will do the color selection 377 * automatically. */ 378 if (any_bcolor_used) { 379 if (r300->two_sided_color) { 380 /* Rasterize as back-face colors. */ 381 for (i = 0; i < ATTR_COLOR_COUNT; i++) { 382 rs.vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR; 383 rs.vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << (2+i); 384 stream_loc_notcl[loc++] = 4 + i; 385 } 386 } else { 387 /* Rasterize two fake texcoords to prevent from the two-sided color 388 * selection. */ 389 /* XXX Consider recompiling the vertex shader to save 2 RS units. */ 390 for (i = 0; i < 2; i++) { 391 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count); 392 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count)); 393 stream_loc_notcl[loc++] = 6 + tex_count; 394 395 /* Rasterize it. */ 396 rX00_rs_tex(&rs, tex_count, tex_count, SWIZ_XYZW); 397 tex_count++; 398 } 399 } 400 } 401 402 /* Rasterize texture coordinates. */ 403 for (i = 0; i < ATTR_GENERIC_COUNT && tex_count < 8; i++) { 404 bool sprite_coord = !!(r300->sprite_coord_enable & (1 << i)); 405 406 if (vs_outputs->generic[i] != ATTR_UNUSED || sprite_coord) { 407 if (!sprite_coord) { 408 /* Set up the texture coordinates in VAP. */ 409 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count); 410 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count)); 411 stream_loc_notcl[loc++] = 6 + tex_count; 412 } 413 414 /* Rasterize it. */ 415 rX00_rs_tex(&rs, tex_count, tex_count, 416 sprite_coord ? SWIZ_XY01 : SWIZ_XYZW); 417 418 /* Write it to the FS input register if it's needed by the FS. */ 419 if (fs_inputs->generic[i] != ATTR_UNUSED) { 420 rX00_rs_tex_write(&rs, tex_count, fp_offset); 421 fp_offset++; 422 423 DBG(r300, DBG_RS, 424 "r300: Rasterized generic %i written to FS%s.\n", 425 i, sprite_coord ? " (sprite coord)" : ""); 426 } else { 427 DBG(r300, DBG_RS, 428 "r300: Rasterized generic %i unused%s.\n", 429 i, sprite_coord ? " (sprite coord)" : ""); 430 } 431 tex_count++; 432 } else { 433 /* Skip the FS input register, leave it uninitialized. */ 434 /* If we try to set it to (0,0,0,1), it will lock up. */ 435 if (fs_inputs->generic[i] != ATTR_UNUSED) { 436 fp_offset++; 437 438 DBG(r300, DBG_RS, "r300: FS input generic %i unassigned%s.\n", 439 i, sprite_coord ? " (sprite coord)" : ""); 440 } 441 } 442 } 443 444 /* Rasterize fog coordinates. */ 445 if (vs_outputs->fog != ATTR_UNUSED && tex_count < 8) { 446 /* Set up the fog coordinates in VAP. */ 447 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count); 448 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count)); 449 stream_loc_notcl[loc++] = 6 + tex_count; 450 451 /* Rasterize it. */ 452 rX00_rs_tex(&rs, tex_count, tex_count, SWIZ_X001); 453 454 /* Write it to the FS input register if it's needed by the FS. */ 455 if (fs_inputs->fog != ATTR_UNUSED) { 456 rX00_rs_tex_write(&rs, tex_count, fp_offset); 457 fp_offset++; 458 459 DBG(r300, DBG_RS, "r300: Rasterized fog written to FS.\n"); 460 } else { 461 DBG(r300, DBG_RS, "r300: Rasterized fog unused.\n"); 462 } 463 tex_count++; 464 } else { 465 /* Skip the FS input register, leave it uninitialized. */ 466 /* If we try to set it to (0,0,0,1), it will lock up. */ 467 if (fs_inputs->fog != ATTR_UNUSED) { 468 fp_offset++; 469 470 DBG(r300, DBG_RS, "r300: FS input fog unassigned.\n"); 471 } 472 } 473 474 /* Rasterize WPOS. */ 475 /* Don't set it in VAP if the FS doesn't need it. */ 476 if (fs_inputs->wpos != ATTR_UNUSED && tex_count < 8) { 477 /* Set up the WPOS coordinates in VAP. */ 478 rs.vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << tex_count); 479 rs.vap_out_vtx_fmt[1] |= (4 << (3 * tex_count)); 480 stream_loc_notcl[loc++] = 6 + tex_count; 481 482 /* Rasterize it. */ 483 rX00_rs_tex(&rs, tex_count, tex_count, SWIZ_XYZW); 484 485 /* Write it to the FS input register. */ 486 rX00_rs_tex_write(&rs, tex_count, fp_offset); 487 488 DBG(r300, DBG_RS, "r300: Rasterized WPOS written to FS.\n"); 489 490 fp_offset++; 491 tex_count++; 492 } 493 494 /* Invalidate the rest of the no-TCL (GA) stream locations. */ 495 for (; loc < 16;) { 496 stream_loc_notcl[loc++] = -1; 497 } 498 499 /* Rasterize at least one color, or bad things happen. */ 500 if (col_count == 0 && tex_count == 0) { 501 rX00_rs_col(&rs, 0, 0, SWIZ_0001); 502 col_count++; 503 504 DBG(r300, DBG_RS, "r300: Rasterized color 0 to prevent lockups.\n"); 505 } 506 507 DBG(r300, DBG_RS, "r300: --- Rasterizer status ---: colors: %i, " 508 "generics: %i.\n", col_count, tex_count); 509 510 rs.count = (tex_count*4) | (col_count << R300_IC_COUNT_SHIFT) | 511 R300_HIRES_EN; 512 513 count = MAX3(col_count, tex_count, 1); 514 rs.inst_count = count - 1; 515 516 /* Now, after all that, see if we actually need to update the state. */ 517 if (memcmp(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block))) { 518 memcpy(r300->rs_block_state.state, &rs, sizeof(struct r300_rs_block)); 519 r300->rs_block_state.size = 11 + count*2; 520 } 521} 522 523static void r300_merge_textures_and_samplers(struct r300_context* r300) 524{ 525 struct r300_textures_state *state = 526 (struct r300_textures_state*)r300->textures_state.state; 527 struct r300_texture_sampler_state *texstate; 528 struct r300_sampler_state *sampler; 529 struct r300_sampler_view *view; 530 struct r300_texture *tex; 531 unsigned min_level, max_level, i, j, size; 532 unsigned count = MIN2(state->sampler_view_count, 533 state->sampler_state_count); 534 535 /* The KIL opcode fix, see below. */ 536 if (!count && !r300->screen->caps.is_r500) 537 count = 1; 538 539 state->tx_enable = 0; 540 state->count = 0; 541 size = 2; 542 543 for (i = 0; i < count; i++) { 544 if (state->sampler_views[i] && state->sampler_states[i]) { 545 state->tx_enable |= 1 << i; 546 547 view = state->sampler_views[i]; 548 tex = r300_texture(view->base.texture); 549 sampler = state->sampler_states[i]; 550 551 texstate = &state->regs[i]; 552 texstate->format = view->format; 553 texstate->filter0 = sampler->filter0; 554 texstate->filter1 = sampler->filter1; 555 texstate->border_color = sampler->border_color; 556 557 /* Assign a texture cache region. */ 558 texstate->format.format1 |= view->texcache_region; 559 560 /* Depth textures are kinda special. */ 561 if (util_format_is_depth_or_stencil(tex->desc.b.b.format)) { 562 unsigned char depth_swizzle[4]; 563 564 if (!r300->screen->caps.is_r500 && 565 util_format_get_blocksizebits(tex->desc.b.b.format) == 32) { 566 /* X24x8 is sampled as Y16X16 on r3xx-r4xx. 567 * The depth here is at the Y component. */ 568 for (j = 0; j < 4; j++) 569 depth_swizzle[j] = UTIL_FORMAT_SWIZZLE_Y; 570 } else { 571 for (j = 0; j < 4; j++) 572 depth_swizzle[j] = UTIL_FORMAT_SWIZZLE_X; 573 } 574 575 /* If compare mode is disabled, sampler view swizzles 576 * are stored in the format. 577 * Otherwise, the swizzles must be applied after the compare 578 * mode in the fragment shader. */ 579 if (sampler->state.compare_mode == PIPE_TEX_COMPARE_NONE) { 580 texstate->format.format1 |= 581 r300_get_swizzle_combined(depth_swizzle, 582 view->swizzle); 583 } else { 584 texstate->format.format1 |= 585 r300_get_swizzle_combined(depth_swizzle, 0); 586 } 587 } 588 589 /* to emulate 1D textures through 2D ones correctly */ 590 if (tex->desc.b.b.target == PIPE_TEXTURE_1D) { 591 texstate->filter0 &= ~R300_TX_WRAP_T_MASK; 592 texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE); 593 } 594 595 if (tex->desc.is_npot) { 596 /* NPOT textures don't support mip filter, unfortunately. 597 * This prevents incorrect rendering. */ 598 texstate->filter0 &= ~R300_TX_MIN_FILTER_MIP_MASK; 599 600 /* Mask out the mirrored flag. */ 601 if (texstate->filter0 & R300_TX_WRAP_S(R300_TX_MIRRORED)) { 602 texstate->filter0 &= ~R300_TX_WRAP_S(R300_TX_MIRRORED); 603 } 604 if (texstate->filter0 & R300_TX_WRAP_T(R300_TX_MIRRORED)) { 605 texstate->filter0 &= ~R300_TX_WRAP_T(R300_TX_MIRRORED); 606 } 607 608 /* Change repeat to clamp-to-edge. 609 * (the repeat bit has a value of 0, no masking needed). */ 610 if ((texstate->filter0 & R300_TX_WRAP_S_MASK) == 611 R300_TX_WRAP_S(R300_TX_REPEAT)) { 612 texstate->filter0 |= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE); 613 } 614 if ((texstate->filter0 & R300_TX_WRAP_T_MASK) == 615 R300_TX_WRAP_T(R300_TX_REPEAT)) { 616 texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE); 617 } 618 } else { 619 /* determine min/max levels */ 620 /* the MAX_MIP level is the largest (finest) one */ 621 max_level = MIN3(sampler->max_lod + view->base.first_level, 622 tex->desc.b.b.last_level, view->base.last_level); 623 min_level = MIN2(sampler->min_lod + view->base.first_level, 624 max_level); 625 texstate->format.format0 |= R300_TX_NUM_LEVELS(max_level); 626 texstate->filter0 |= R300_TX_MAX_MIP_LEVEL(min_level); 627 } 628 629 texstate->filter0 |= i << 28; 630 631 size += 16; 632 state->count = i+1; 633 } else { 634 /* For the KIL opcode to work on r3xx-r4xx, the texture unit 635 * assigned to this opcode (it's always the first one) must be 636 * enabled. Otherwise the opcode doesn't work. 637 * 638 * In order to not depend on the fragment shader, we just make 639 * the first unit enabled all the time. */ 640 if (i == 0 && !r300->screen->caps.is_r500) { 641 pipe_sampler_view_reference( 642 (struct pipe_sampler_view**)&state->sampler_views[i], 643 &r300->texkill_sampler->base); 644 645 state->tx_enable |= 1 << i; 646 647 texstate = &state->regs[i]; 648 649 /* Just set some valid state. */ 650 texstate->format = r300->texkill_sampler->format; 651 texstate->filter0 = 652 r300_translate_tex_filters(PIPE_TEX_FILTER_NEAREST, 653 PIPE_TEX_FILTER_NEAREST, 654 PIPE_TEX_FILTER_NEAREST, 655 FALSE); 656 texstate->filter1 = 0; 657 texstate->border_color = 0; 658 659 texstate->filter0 |= i << 28; 660 size += 16; 661 state->count = i+1; 662 } 663 } 664 } 665 666 r300->textures_state.size = size; 667 668 /* Pick a fragment shader based on either the texture compare state 669 * or the uses_pitch flag. */ 670 if (r300->fs.state && count) { 671 if (r300_pick_fragment_shader(r300)) { 672 r300_mark_fs_code_dirty(r300); 673 } 674 } 675} 676 677void r300_update_derived_state(struct r300_context* r300) 678{ 679 if (r300->textures_state.dirty) { 680 r300_merge_textures_and_samplers(r300); 681 } 682 683 if (r300->rs_block_state.dirty) { 684 r300_update_rs_block(r300); 685 686 if (r300->draw) { 687 memset(&r300->vertex_info, 0, sizeof(struct vertex_info)); 688 r300_draw_emit_all_attribs(r300); 689 draw_compute_vertex_size(&r300->vertex_info); 690 r300_swtcl_vertex_psc(r300); 691 } 692 } 693 694 r300_update_hyperz_state(r300); 695} 696