radeon_screen.c revision d09209f5530e8bba78e4e0ec62b2027c588cc8f3
1bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c,v 1.7 2003/03/26 20:43:51 tsi Exp $ */
25df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**************************************************************************
35df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
45df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulCopyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
55df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul                     VA Linux Systems Inc., Fremont, California.
65df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
75df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulAll Rights Reserved.
85df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
95df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulPermission is hereby granted, free of charge, to any person obtaining
105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paula copy of this software and associated documentation files (the
115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul"Software"), to deal in the Software without restriction, including
125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulwithout limitation the rights to use, copy, modify, merge, publish,
135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Pauldistribute, sublicense, and/or sell copies of the Software, and to
145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulpermit persons to whom the Software is furnished to do so, subject to
155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulthe following conditions:
165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulThe above copyright notice and this permission notice (including the
185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulnext paragraph) shall be included in all copies or substantial
195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulportions of the Software.
205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul**************************************************************************/
305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
318cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger/**
328cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \file radeon_screen.c
338cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * Screen initialization functions for the Radeon driver.
345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul *
358cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \author Kevin E. Martin <martin@valinux.com>
368cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \author  Gareth Hughes <gareth@valinux.com>
375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */
385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "glheader.h"
405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "imports.h"
415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
42462183fe4cb6df6d90632d9e2cee881c8d26b1cbAlan Hourihane#define STANDALONE_MMIO
435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_context.h"
445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_screen.h"
455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_macros.h"
465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "utils.h"
485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "context.h"
495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "vblank.h"
505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
5174d563cdfbfb07cc666d60dc909e90ddb9949cbbKeith Whitwell#include "GL/internal/dri_interface.h"
525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
53d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul/* Radeon configuration
54d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul */
55d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul#include "xmlpool.h"
56d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul
57d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paulconst char __driConfigOptions[] =
58d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian PaulDRI_CONF_BEGIN
59d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul    DRI_CONF_SECTION_PERFORMANCE
60d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul        DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
61d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul        DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
62d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul        DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
63d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul    DRI_CONF_SECTION_END
64d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul    DRI_CONF_SECTION_QUALITY
65d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul        DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
66effc73931f86c7961b4eb296d2d4c5d91624a9e3Felix Kuehling        DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
67effc73931f86c7961b4eb296d2d4c5d91624a9e3Felix Kuehling        DRI_CONF_NO_NEG_LOD_BIAS(false)
68d09209f5530e8bba78e4e0ec62b2027c588cc8f3Eric Anholt        DRI_CONF_FORCE_S3TC_ENABLE(false)
69d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul        DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
70d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul        DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
71d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul        DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
72d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul    DRI_CONF_SECTION_END
73d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul    DRI_CONF_SECTION_DEBUG
74d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul        DRI_CONF_NO_RAST(false)
75d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul    DRI_CONF_SECTION_END
76d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian PaulDRI_CONF_END;
77d09209f5530e8bba78e4e0ec62b2027c588cc8f3Eric Anholtstatic const GLuint __driNConfigOptions = 11;
78d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul
795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#if 1
805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Including xf86PciInfo.h introduces a bunch of errors...
815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */
825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QD	0x5144
835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QE	0x5145
845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QF	0x5146
855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QG	0x5147
865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QY	0x5159
885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QZ	0x515A
895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_LW	0x4C57 /* mobility 7 - has tcl */
915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_LY	0x4C59
935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_LZ	0x4C5A
945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RV200_QW	0x5157 /* Radeon 7500 - not an R200 at all */
9610095c9024efb1767fb3df0b59672299c090ad10Eric Anholt/* IGP Chipsets */
9710095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS100_4136     0x4136
9810095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS200_4137     0x4137
9910095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS250_4237     0x4237
10010095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS100_4336     0x4336
10110095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS200_4337     0x4337
10210095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS250_4437     0x4437
1035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#endif
1045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
1058cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger#ifdef USE_NEW_INTERFACE
1068cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheideggerstatic PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
1078cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger#endif /* USE_NEW_INTERFACE */
1088cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
1095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic int getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo );
1105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
1118cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger#ifdef USE_NEW_INTERFACE
1128cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheideggerstatic __GLcontextModes *
1138cff2ede6eec1dd480bb8a4835b6985955514d87Roland ScheideggerradeonFillInModes( unsigned pixel_bits, unsigned depth_bits,
1148cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger		 unsigned stencil_bits, GLboolean have_back_buffer )
1158cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger{
1168cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    __GLcontextModes * modes;
1178cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    __GLcontextModes * m;
1188cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    unsigned num_modes;
1198cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    unsigned depth_buffer_factor;
1208cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    unsigned back_buffer_factor;
121da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    GLenum fb_format;
122da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    GLenum fb_type;
1238cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
1248cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
1258cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger     * enough to add support.  Basically, if a context is created with an
1268cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger     * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
1278cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger     * will never be used.
1288cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger     */
1298cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    static const GLenum back_buffer_modes[] = {
1308cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger	GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
1318cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    };
1328cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
133da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    uint8_t depth_bits_array[2];
134da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    uint8_t stencil_bits_array[2];
1358cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
1368cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
137da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    depth_bits_array[0] = depth_bits;
138da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    depth_bits_array[1] = depth_bits;
139da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick
1408cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    /* Just like with the accumulation buffer, always provide some modes
1418cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger     * with a stencil buffer.  It will be a sw fallback, but some apps won't
1428cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger     * care about that.
1438cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger     */
144da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    stencil_bits_array[0] = 0;
145da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
1468cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
1478cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1;
1488cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    back_buffer_factor  = (have_back_buffer) ? 2 : 1;
1498cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
1508cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    num_modes = depth_buffer_factor * back_buffer_factor * 4;
1518cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
152da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    if ( pixel_bits == 16 ) {
153da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick        fb_format = GL_RGB;
154da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick        fb_type = GL_UNSIGNED_SHORT_5_6_5;
155da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    }
156da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    else {
157da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick        fb_format = GL_BGRA;
158da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick        fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
159da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    }
160da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick
1618cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    modes = (*create_context_modes)( num_modes, sizeof( __GLcontextModes ) );
1628cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    m = modes;
163da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    if ( ! driFillInModes( & m, fb_format, fb_type,
164da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
1658cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			   back_buffer_modes, back_buffer_factor,
166da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick			   GLX_TRUE_COLOR ) ) {
167da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
168da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick		 __func__, __LINE__ );
169da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick	return NULL;
1708cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    }
1718cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
172da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick    if ( ! driFillInModes( & m, fb_format, fb_type,
173da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick			   depth_bits_array, stencil_bits_array, depth_buffer_factor,
1748cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			   back_buffer_modes, back_buffer_factor,
175da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick			   GLX_DIRECT_COLOR ) ) {
176da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick	fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
177da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick		 __func__, __LINE__ );
178da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick	return NULL;
1798cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    }
1808cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
1818cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    /* Mark the visual as slow if there are "fake" stencil bits.
1828cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger     */
1838cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    for ( m = modes ; m != NULL ; m = m->next ) {
1848cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger	if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) {
1858cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger	    m->visualRating = GLX_SLOW_CONFIG;
1868cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger	}
1878cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    }
1888cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
1898cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger    return modes;
1908cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger}
1918cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger#endif /* USE_NEW_INTERFACE */
1928cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
1935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Create the device specific screen private data struct.
1945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */
1955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulradeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv )
1965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{
1975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   radeonScreenPtr screen;
1985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
19999ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane   unsigned char *RADEONMMIO;
2005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
2015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
2025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   /* Allocate the private area */
2035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen = (radeonScreenPtr) CALLOC( sizeof(*screen) );
2045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   if ( !screen ) {
2055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      __driUtilMessage("%s: Could not allocate memory for screen structure",
2065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul		       __FUNCTION__);
2075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      return NULL;
2085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
2095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
210bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl   /* parse information in __driConfigOptions */
211d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul   driParseOptionInfo (&screen->optionCache,
212d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul		       __driConfigOptions, __driNConfigOptions);
2135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
2145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   /* This is first since which regions we map depends on whether or
2155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul    * not we are using a PCI card.
2165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul    */
2175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->IsPCI = dri_priv->IsPCI;
2185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
219bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl   {
2205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      int ret;
221ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl      drm_radeon_getparam_t gp;
2225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
223bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      gp.param = RADEON_PARAM_GART_BUFFER_OFFSET;
224bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      gp.value = &screen->gart_buffer_offset;
2255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
2265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM,
2275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul				 &gp, sizeof(gp));
2285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      if (ret) {
229bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	 FREE( screen );
230ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl	 fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret);
2315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 return NULL;
2325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      }
2335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
2345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      if (sPriv->drmMinor >= 6) {
2355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 gp.param = RADEON_PARAM_IRQ_NR;
2365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 gp.value = &screen->irq;
2375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
2385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM,
2395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul				    &gp, sizeof(gp));
2405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 if (ret) {
2415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	    FREE( screen );
242ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl	    fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret);
2435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	    return NULL;
2445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 }
2455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      }
2465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
2475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
2485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->mmio.handle = dri_priv->registerHandle;
2495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->mmio.size   = dri_priv->registerSize;
2505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   if ( drmMap( sPriv->fd,
2515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul		screen->mmio.handle,
2525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul		screen->mmio.size,
2535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul		&screen->mmio.map ) ) {
2545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      FREE( screen );
2555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      __driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
2565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      return NULL;
2575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
2585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
25999ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane   RADEONMMIO = screen->mmio.map;
26099ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane
2615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->status.handle = dri_priv->statusHandle;
2625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->status.size   = dri_priv->statusSize;
2635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   if ( drmMap( sPriv->fd,
2645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul		screen->status.handle,
2655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul		screen->status.size,
2665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul		&screen->status.map ) ) {
2675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      drmUnmap( screen->mmio.map, screen->mmio.size );
2685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      FREE( screen );
2695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
2705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      return NULL;
2715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
2726af3dca18a2315ea431b5ea868913093d2111491Ian Romanick   screen->scratch = (__volatile__ uint32_t *)
2735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
2745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
2755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->buffers = drmMapBufs( sPriv->fd );
2765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   if ( !screen->buffers ) {
2775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      drmUnmap( screen->status.map, screen->status.size );
2785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      drmUnmap( screen->mmio.map, screen->mmio.size );
2795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      FREE( screen );
2805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
2815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      return NULL;
2825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
2835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
284bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl   if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
285bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      screen->gartTextures.handle = dri_priv->gartTexHandle;
286bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      screen->gartTextures.size   = dri_priv->gartTexMapSize;
2875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      if ( drmMap( sPriv->fd,
288bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl		   screen->gartTextures.handle,
289bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl		   screen->gartTextures.size,
290bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl		   (drmAddressPtr)&screen->gartTextures.map ) ) {
2915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 drmUnmapBufs( screen->buffers );
2925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 drmUnmap( screen->status.map, screen->status.size );
2935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 drmUnmap( screen->mmio.map, screen->mmio.size );
2945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 FREE( screen );
295bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	 __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
2965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	 return NULL;
2975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      }
298bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl
299bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      screen->gart_texture_offset = dri_priv->gartTexOffset + ( screen->IsPCI
300bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl		? INREG( RADEON_AIC_LO_ADDR )
301bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl		: ( ( INREG( RADEON_MC_AGP_LOCATION ) & 0x0ffffU ) << 16 ) );
3025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
3035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
3045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->chipset = 0;
3055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   switch ( dri_priv->deviceID ) {
3065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   default:
3075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      fprintf(stderr, "unknown chip id, assuming full radeon support\n");
3085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RADEON_QD:
3095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RADEON_QE:
3105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RADEON_QF:
3115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RADEON_QG:
3125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RV200_QW:
3135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RADEON_LW:
3145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      screen->chipset |= RADEON_CHIPSET_TCL;
3155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RADEON_QY:
3165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RADEON_QZ:
3175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RADEON_LY:
3185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   case PCI_CHIP_RADEON_LZ:
31910095c9024efb1767fb3df0b59672299c090ad10Eric Anholt   case PCI_CHIP_RS100_4136: /* IGPs don't have TCL */
32010095c9024efb1767fb3df0b59672299c090ad10Eric Anholt   case PCI_CHIP_RS200_4137:
32110095c9024efb1767fb3df0b59672299c090ad10Eric Anholt   case PCI_CHIP_RS250_4237:
32210095c9024efb1767fb3df0b59672299c090ad10Eric Anholt   case PCI_CHIP_RS100_4336:
32310095c9024efb1767fb3df0b59672299c090ad10Eric Anholt   case PCI_CHIP_RS200_4337:
32410095c9024efb1767fb3df0b59672299c090ad10Eric Anholt   case PCI_CHIP_RS250_4437:
3255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      break;
3265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
3275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
3285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->cpp = dri_priv->bpp / 8;
3295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->AGPMode = dri_priv->AGPMode;
3305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
33199ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane   screen->fbLocation	= ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16;
33299ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane
33399ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane   if ( sPriv->drmMinor >= 10 ) {
334ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl      drm_radeon_setparam_t sp;
33599ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane
33699ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane      sp.param = RADEON_SETPARAM_FB_LOCATION;
33799ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane      sp.value = screen->fbLocation;
33899ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane
33999ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane      drmCommandWrite( sPriv->fd, DRM_RADEON_SETPARAM,
34099ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane		       &sp, sizeof( sp ) );
34199ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane   }
34299ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane
3435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->frontOffset	= dri_priv->frontOffset;
3445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->frontPitch	= dri_priv->frontPitch;
3455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->backOffset	= dri_priv->backOffset;
3465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->backPitch	= dri_priv->backPitch;
3475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->depthOffset	= dri_priv->depthOffset;
3485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->depthPitch	= dri_priv->depthPitch;
3495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
350ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl   screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset
35199ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane				       + screen->fbLocation;
352ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl   screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize;
353ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl   screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] =
3545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      dri_priv->log2TexGran;
3555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
356bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl   if ( !screen->gartTextures.map
357bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	|| getenv( "RADEON_GARTTEXTURING_FORCE_DISABLE" ) ) {
3585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1;
359ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl      screen->texOffset[RADEON_GART_TEX_HEAP] = 0;
360ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl      screen->texSize[RADEON_GART_TEX_HEAP] = 0;
361ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl      screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0;
3625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   } else {
3635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      screen->numTexHeaps = RADEON_NR_TEX_HEAPS;
364ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl      screen->texOffset[RADEON_GART_TEX_HEAP] = screen->gart_texture_offset;
365ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl      screen->texSize[RADEON_GART_TEX_HEAP] = dri_priv->gartTexMapSize;
366ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl      screen->logTexGranularity[RADEON_GART_TEX_HEAP] =
367bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	 dri_priv->log2GARTTexGran;
3685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
369aaebfc88c08c79cd70f1e0d1d262a25e9ded47d1Jon Smirl
370bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl   if ( driCompareGLXAPIVersion( 20030813 ) >= 0 ) {
371bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
372bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl          (PFNGLXSCRENABLEEXTENSIONPROC) glXGetProcAddress( (const GLubyte *) "__glXScrEnableExtension" );
373bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      void * const psc = sPriv->psc->screenConfigs;
374bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl
375bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      if ( glx_enable_extension != NULL ) {
376bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	 if ( screen->irq != 0 ) {
377bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	    (*glx_enable_extension)( psc, "GLX_SGI_swap_control" );
378bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	    (*glx_enable_extension)( psc, "GLX_SGI_video_sync" );
379bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	    (*glx_enable_extension)( psc, "GLX_MESA_swap_control" );
380bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	 }
3815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
382bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl	 (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" );
3838cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
3848cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger         if ( driCompareGLXAPIVersion( 20030915 ) >= 0 ) {
3858cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger	    (*glx_enable_extension)( psc, "GLX_SGIX_fbconfig" );
3868cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger	    (*glx_enable_extension)( psc, "GLX_OML_swap_method" );
3878cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger	 }
3888cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
389bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      }
390bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl   }
391aaebfc88c08c79cd70f1e0d1d262a25e9ded47d1Jon Smirl
3925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->driScreen = sPriv;
3935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   screen->sarea_priv_offset = dri_priv->sarea_priv_offset;
3945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   return screen;
3955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}
3965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
3975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Destroy the device specific screen private data struct.
3985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */
3995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonDestroyScreen( __DRIscreenPrivate *sPriv )
4005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{
4015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   radeonScreenPtr screen = (radeonScreenPtr)sPriv->private;
4025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   if (!screen)
4045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      return;
4055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
406bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl   if ( screen->gartTextures.map ) {
407bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl      drmUnmap( screen->gartTextures.map, screen->gartTextures.size );
4085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
4095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   drmUnmapBufs( screen->buffers );
4105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   drmUnmap( screen->status.map, screen->status.size );
4115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   drmUnmap( screen->mmio.map, screen->mmio.size );
4125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
413bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl   /* free all option information */
414bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl   driDestroyOptionInfo (&screen->optionCache);
415bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl
4165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   FREE( screen );
4175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   sPriv->private = NULL;
4185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}
4195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Initialize the driver specific screen private data.
4225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */
4235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean
4245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulradeonInitDriver( __DRIscreenPrivate *sPriv )
4255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{
4265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   sPriv->private = (void *) radeonCreateScreen( sPriv );
4275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   if ( !sPriv->private ) {
4285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      radeonDestroyScreen( sPriv );
4295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      return GL_FALSE;
4305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
4315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   return GL_TRUE;
4335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}
4345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4378cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger/**
4388cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * Create and initialize the Mesa and driver specific pixmap buffer
4395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * data.
4408cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger *
4418cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \todo This function (and its interface) will need to be updated to support
4428cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * pbuffers.
4435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */
4445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean
4455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulradeonCreateBuffer( __DRIscreenPrivate *driScrnPriv,
4465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul                    __DRIdrawablePrivate *driDrawPriv,
4475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul                    const __GLcontextModes *mesaVis,
4485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul                    GLboolean isPixmap )
4495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{
4505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   if (isPixmap) {
4515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      return GL_FALSE; /* not implemented */
4525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
4535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   else {
4545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      const GLboolean swDepth = GL_FALSE;
4555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      const GLboolean swAlpha = GL_FALSE;
4565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      const GLboolean swAccum = mesaVis->accumRedBits > 0;
4575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      const GLboolean swStencil = mesaVis->stencilBits > 0 &&
4585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul         mesaVis->depthBits != 24;
4595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      driDrawPriv->driverPrivate = (void *)
4605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul         _mesa_create_framebuffer( mesaVis,
4615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul                                   swDepth,
4625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul                                   swStencil,
4635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul                                   swAccum,
4645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul                                   swAlpha );
4655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      return (driDrawPriv->driverPrivate != NULL);
4665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
4675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}
4685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void
4715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulradeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv)
4725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{
4735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   _mesa_destroy_framebuffer((GLframebuffer *) (driDrawPriv->driverPrivate));
4745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}
4755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic struct __DriverAPIRec radeonAPI = {
4775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .InitDriver      = radeonInitDriver,
4785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .DestroyScreen   = radeonDestroyScreen,
4795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .CreateContext   = radeonCreateContext,
4805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .DestroyContext  = radeonDestroyContext,
4815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .CreateBuffer    = radeonCreateBuffer,
4825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .DestroyBuffer   = radeonDestroyBuffer,
4835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .SwapBuffers     = radeonSwapBuffers,
4845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .MakeCurrent     = radeonMakeCurrent,
4855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .UnbindContext   = radeonUnbindContext,
4865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .GetSwapInfo     = getSwapInfo,
4875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .GetMSC          = driGetMSC32,
4885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .WaitForMSC      = driWaitForMSC32,
4895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .WaitForSBC      = NULL,
4905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   .SwapBuffersMSC  = NULL
4915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul};
4925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
4945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/*
4955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * This is the bootstrap function for the driver.
4965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * The __driCreateScreen name is the symbol that libGL.so fetches.
4975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Return:  pointer to a __DRIscreenPrivate.
4985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */
499a4436a8f4476344f1ec81cacf35f5693d58dcc06Ian Romanick#if !defined(DRI_NEW_INTERFACE_ONLY)
5005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid *__driCreateScreen(Display *dpy, int scrn, __DRIscreen *psc,
5015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul                        int numConfigs, __GLXvisualConfig *config)
5025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{
5035df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   __DRIscreenPrivate *psp;
5045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   psp = __driUtilCreateScreen(dpy, scrn, psc, numConfigs, config, &radeonAPI);
5055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   return (void *) psp;
5065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}
507a4436a8f4476344f1ec81cacf35f5693d58dcc06Ian Romanick#endif /* !defined(DRI_NEW_INTERFACE_ONLY) */
5085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
509bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl/**
5108cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * This is the bootstrap function for the driver.  libGL supplies all of the
5118cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * requisite information about the system, and the driver initializes itself.
5128cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * This routine also fills in the linked list pointed to by \c driver_modes
5138cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * with the \c __GLcontextModes that the driver can support for windows or
5148cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * pbuffers.
515bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl *
5168cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
5178cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger *         failure.
5185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */
5198cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger#ifdef USE_NEW_INTERFACE
52060b0e12830310e7c05b4043857ed277b28b1c781Ian Romanickvoid * __driCreateNewScreen( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc,
5218cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			     const __GLcontextModes * modes,
5228cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			     const __DRIversion * ddx_version,
5238cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			     const __DRIversion * dri_version,
5248cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			     const __DRIversion * drm_version,
5258cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			     const __DRIframebuffer * frame_buffer,
5268cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			     drmAddress pSAREA, int fd,
5278cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			     int internal_api_version,
5288cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger			     __GLcontextModes ** driver_modes )
5298cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
5305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{
5318cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger   __DRIscreenPrivate *psp;
5325b98ada88071a752b6000756949a1951183cdd0bIan Romanick   static const __DRIversion ddx_expected = { 4, 0, 0 };
5335b98ada88071a752b6000756949a1951183cdd0bIan Romanick   static const __DRIversion dri_expected = { 4, 0, 0 };
5345b98ada88071a752b6000756949a1951183cdd0bIan Romanick   static const __DRIversion drm_expected = { 1, 3, 0 };
5355b98ada88071a752b6000756949a1951183cdd0bIan Romanick
5365b98ada88071a752b6000756949a1951183cdd0bIan Romanick   if ( ! driCheckDriDdxDrmVersions2( "Radeon",
5375b98ada88071a752b6000756949a1951183cdd0bIan Romanick				      dri_version, & dri_expected,
5385b98ada88071a752b6000756949a1951183cdd0bIan Romanick				      ddx_version, & ddx_expected,
5395b98ada88071a752b6000756949a1951183cdd0bIan Romanick				      drm_version, & drm_expected ) ) {
5405b98ada88071a752b6000756949a1951183cdd0bIan Romanick      return NULL;
5415b98ada88071a752b6000756949a1951183cdd0bIan Romanick   }
5425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
5438cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger   psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
5448cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger				  ddx_version, dri_version, drm_version,
5458cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger				  frame_buffer, pSAREA, fd,
5468cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger				  internal_api_version, &radeonAPI);
5473623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick   if ( psp != NULL ) {
5483623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick      create_context_modes = (PFNGLXCREATECONTEXTMODES)
5493623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick	  glXGetProcAddress( (const GLubyte *) "__glXCreateContextModes" );
5503623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick      if ( create_context_modes != NULL ) {
5513623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick	 RADEONDRIPtr dri_priv = (RADEONDRIPtr) psp->pDevPriv;
5523623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick	 *driver_modes = radeonFillInModes( dri_priv->bpp,
5533623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick					    (dri_priv->bpp == 16) ? 16 : 24,
5543623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick					    (dri_priv->bpp == 16) ? 0  : 8,
5553623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick					    (dri_priv->backOffset != dri_priv->depthOffset) );
5563623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick      }
5575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
5588cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger
5598cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger   return (void *) psp;
5605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}
5618cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger#endif /* USE_NEW_INTERFACE */
5625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
5635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/**
5645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Get information about previous buffer swaps.
5655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */
5665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic int
5675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulgetSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo )
5685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{
5695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   radeonContextPtr  rmesa;
5705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
5715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL)
5725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	|| (dPriv->driContextPriv->driverPrivate == NULL)
5735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul	|| (sInfo == NULL) ) {
5745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul      return -1;
5755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   }
5765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
5775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
5785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   sInfo->swap_count = rmesa->swap_count;
5795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   sInfo->swap_ust = rmesa->swap_ust;
5805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   sInfo->swap_missed_count = rmesa->swap_missed_count;
5815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
5825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
5835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul       ? driCalculateSwapUsage( dPriv, 0, rmesa->swap_missed_ust )
5845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul       : 0.0;
5855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul
5865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul   return 0;
5875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}
588